xref: /linux/drivers/gpu/drm/xe/display/xe_initial_plane.c (revision d639d9fa162aadec1ae9980c4dcf6e50bd2f8290)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2021 Intel Corporation
4  */
5 
6 #include <drm/intel/display_parent_interface.h>
7 
8 #include "regs/xe_gtt_defs.h"
9 
10 /* FIXME move intel_remapped_info_size() & co. */
11 #include "intel_fb.h"
12 
13 /* FIXME move intel_initial_plane_config */
14 #include "intel_display_types.h"
15 
16 #include "xe_bo.h"
17 #include "xe_display_bo.h"
18 #include "xe_display_vma.h"
19 #include "xe_fb_pin.h"
20 #include "xe_ggtt.h"
21 #include "xe_mmio.h"
22 #include "xe_vram_types.h"
23 
24 static struct xe_bo *
25 initial_plane_bo(struct xe_device *xe,
26 		 struct intel_initial_plane_config *plane_config)
27 {
28 	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
29 	struct xe_bo *bo;
30 	resource_size_t phys_base;
31 	u32 base, size, flags;
32 	u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
33 
34 	if (plane_config->size == 0)
35 		return NULL;
36 
37 	flags = XE_BO_FLAG_FORCE_WC | XE_BO_FLAG_GGTT;
38 
39 	base = round_down(plane_config->base, page_size);
40 	if (IS_DGFX(xe)) {
41 		u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base);
42 
43 		if (!(pte & XE_GGTT_PTE_DM)) {
44 			drm_err(&xe->drm,
45 				"Initial plane programming missing DM bit\n");
46 			return NULL;
47 		}
48 
49 		phys_base = pte & ~(page_size - 1);
50 		flags |= XE_BO_FLAG_VRAM0;
51 
52 		/*
53 		 * We don't currently expect this to ever be placed in the
54 		 * stolen portion.
55 		 */
56 		if (phys_base >= xe_vram_region_usable_size(tile0->mem.vram)) {
57 			drm_err(&xe->drm,
58 				"Initial plane programming using invalid range, phys_base=%pa\n",
59 				&phys_base);
60 			return NULL;
61 		}
62 
63 		drm_dbg(&xe->drm,
64 			"Using phys_base=%pa, based on initial plane programming\n",
65 			&phys_base);
66 	} else {
67 		struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
68 
69 		if (!stolen)
70 			return NULL;
71 		phys_base = base;
72 		flags |= XE_BO_FLAG_STOLEN;
73 
74 		if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
75 		    IS_ENABLED(CONFIG_DRM_FBDEV_EMULATION) &&
76 		    !xe_display_bo_fbdev_prefer_stolen(xe, plane_config->size)) {
77 			drm_info(&xe->drm, "Initial FB size exceeds half of stolen, discarding\n");
78 			return NULL;
79 		}
80 	}
81 
82 	size = round_up(plane_config->base + plane_config->size,
83 			page_size);
84 	size -= base;
85 
86 	bo = xe_bo_create_pin_map_at_novm(xe, tile0, size, phys_base,
87 					  ttm_bo_type_kernel, flags, 0, false);
88 	if (IS_ERR(bo)) {
89 		drm_dbg(&xe->drm,
90 			"Failed to create bo phys_base=%pa size %u with flags %x: %li\n",
91 			&phys_base, size, flags, PTR_ERR(bo));
92 		return NULL;
93 	}
94 
95 	return bo;
96 }
97 
98 static struct drm_gem_object *
99 xe_alloc_initial_plane_obj(struct drm_device *drm,
100 			   struct intel_initial_plane_config *plane_config)
101 {
102 	struct xe_device *xe = to_xe_device(drm);
103 	struct drm_mode_fb_cmd2 mode_cmd = { 0 };
104 	struct drm_framebuffer *fb = plane_config->fb;
105 	struct xe_bo *bo;
106 
107 	mode_cmd.pixel_format = fb->format->format;
108 	mode_cmd.width = fb->width;
109 	mode_cmd.height = fb->height;
110 	mode_cmd.pitches[0] = fb->pitches[0];
111 	mode_cmd.modifier[0] = fb->modifier;
112 	mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
113 
114 	bo = initial_plane_bo(xe, plane_config);
115 	if (!bo)
116 		return NULL;
117 
118 	if (intel_framebuffer_init(to_intel_framebuffer(fb),
119 				   &bo->ttm.base, fb->format, &mode_cmd)) {
120 		drm_dbg_kms(&xe->drm, "intel fb init failed\n");
121 		goto err_bo;
122 	}
123 	/* Reference handed over to fb */
124 	xe_bo_put(bo);
125 
126 	return &bo->ttm.base;
127 
128 err_bo:
129 	xe_bo_unpin_map_no_vm(bo);
130 	return NULL;
131 }
132 
133 static int
134 xe_initial_plane_setup(struct drm_plane_state *_plane_state,
135 		       struct intel_initial_plane_config *plane_config,
136 		       struct drm_framebuffer *fb,
137 		       struct i915_vma *_unused)
138 {
139 	struct intel_plane_state *plane_state = to_intel_plane_state(_plane_state);
140 	struct i915_vma *vma;
141 	struct intel_fb_pin_params pin_params = {
142 		.view = &plane_state->view.gtt,
143 	};
144 	u32 offset;
145 	int ret;
146 
147 	ret = xe_fb_pin_ggtt_pin(intel_fb_bo(fb), &pin_params, &vma, &offset, NULL);
148 	if (ret)
149 		return ret;
150 
151 	plane_state->ggtt_vma = vma;
152 
153 	plane_state->surf = offset;
154 
155 	plane_config->vma = vma;
156 
157 	return 0;
158 }
159 
160 static void xe_plane_config_fini(struct intel_initial_plane_config *plane_config)
161 {
162 }
163 
164 const struct intel_display_initial_plane_interface xe_display_initial_plane_interface = {
165 	.alloc_obj = xe_alloc_initial_plane_obj,
166 	.setup = xe_initial_plane_setup,
167 	.config_fini = xe_plane_config_fini,
168 };
169