xref: /linux/drivers/gpu/drm/xe/display/xe_initial_plane.c (revision c0d6f52f9b62479d61f8cd4faf9fb2f8bce6e301)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2021 Intel Corporation
4  */
5 
6 /* for ioread64 */
7 #include <linux/io-64-nonatomic-lo-hi.h>
8 
9 #include <drm/intel/display_parent_interface.h>
10 
11 #include "regs/xe_gtt_defs.h"
12 #include "xe_ggtt.h"
13 #include "xe_mmio.h"
14 
15 #include "i915_vma.h"
16 #include "intel_crtc.h"
17 #include "intel_display_regs.h"
18 #include "intel_display_types.h"
19 #include "intel_fb.h"
20 #include "intel_fb_pin.h"
21 #include "xe_bo.h"
22 #include "xe_vram_types.h"
23 #include "xe_wa.h"
24 
25 #include <generated/xe_device_wa_oob.h>
26 
27 /* Early xe has no irq */
28 static void xe_initial_plane_vblank_wait(struct drm_crtc *_crtc)
29 {
30 	struct intel_crtc *crtc = to_intel_crtc(_crtc);
31 	struct xe_device *xe = to_xe_device(crtc->base.dev);
32 	struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe)));
33 	u32 timestamp;
34 	int ret;
35 
36 	timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp);
37 
38 	ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, &timestamp, false);
39 	if (ret < 0)
40 		drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret);
41 }
42 
43 static struct xe_bo *
44 initial_plane_bo(struct xe_device *xe,
45 		 struct intel_initial_plane_config *plane_config)
46 {
47 	struct xe_tile *tile0 = xe_device_get_root_tile(xe);
48 	struct xe_bo *bo;
49 	resource_size_t phys_base;
50 	u32 base, size, flags;
51 	u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
52 
53 	if (plane_config->size == 0)
54 		return NULL;
55 
56 	flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT;
57 
58 	base = round_down(plane_config->base, page_size);
59 	if (IS_DGFX(xe)) {
60 		u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base);
61 
62 		if (!(pte & XE_GGTT_PTE_DM)) {
63 			drm_err(&xe->drm,
64 				"Initial plane programming missing DM bit\n");
65 			return NULL;
66 		}
67 
68 		phys_base = pte & ~(page_size - 1);
69 		flags |= XE_BO_FLAG_VRAM0;
70 
71 		/*
72 		 * We don't currently expect this to ever be placed in the
73 		 * stolen portion.
74 		 */
75 		if (phys_base >= xe_vram_region_usable_size(tile0->mem.vram)) {
76 			drm_err(&xe->drm,
77 				"Initial plane programming using invalid range, phys_base=%pa\n",
78 				&phys_base);
79 			return NULL;
80 		}
81 
82 		drm_dbg(&xe->drm,
83 			"Using phys_base=%pa, based on initial plane programming\n",
84 			&phys_base);
85 	} else {
86 		struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN);
87 
88 		if (!stolen)
89 			return NULL;
90 		phys_base = base;
91 		flags |= XE_BO_FLAG_STOLEN;
92 
93 		if (XE_DEVICE_WA(xe, 22019338487_display))
94 			return NULL;
95 
96 		/*
97 		 * If the FB is too big, just don't use it since fbdev is not very
98 		 * important and we should probably use that space with FBC or other
99 		 * features.
100 		 */
101 		if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
102 		    plane_config->size * 2 >> PAGE_SHIFT >= stolen->size)
103 			return NULL;
104 	}
105 
106 	size = round_up(plane_config->base + plane_config->size,
107 			page_size);
108 	size -= base;
109 
110 	bo = xe_bo_create_pin_map_at_novm(xe, tile0, size, phys_base,
111 					  ttm_bo_type_kernel, flags, 0, false);
112 	if (IS_ERR(bo)) {
113 		drm_dbg(&xe->drm,
114 			"Failed to create bo phys_base=%pa size %u with flags %x: %li\n",
115 			&phys_base, size, flags, PTR_ERR(bo));
116 		return NULL;
117 	}
118 
119 	return bo;
120 }
121 
122 static struct drm_gem_object *
123 xe_alloc_initial_plane_obj(struct drm_device *drm,
124 			   struct intel_initial_plane_config *plane_config)
125 {
126 	struct xe_device *xe = to_xe_device(drm);
127 	struct drm_mode_fb_cmd2 mode_cmd = { 0 };
128 	struct drm_framebuffer *fb = &plane_config->fb->base;
129 	struct xe_bo *bo;
130 
131 	mode_cmd.pixel_format = fb->format->format;
132 	mode_cmd.width = fb->width;
133 	mode_cmd.height = fb->height;
134 	mode_cmd.pitches[0] = fb->pitches[0];
135 	mode_cmd.modifier[0] = fb->modifier;
136 	mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
137 
138 	bo = initial_plane_bo(xe, plane_config);
139 	if (!bo)
140 		return NULL;
141 
142 	if (intel_framebuffer_init(to_intel_framebuffer(fb),
143 				   &bo->ttm.base, fb->format, &mode_cmd)) {
144 		drm_dbg_kms(&xe->drm, "intel fb init failed\n");
145 		goto err_bo;
146 	}
147 	/* Reference handed over to fb */
148 	xe_bo_put(bo);
149 
150 	return &bo->ttm.base;
151 
152 err_bo:
153 	xe_bo_unpin_map_no_vm(bo);
154 	return NULL;
155 }
156 
157 static int
158 xe_initial_plane_setup(struct drm_plane_state *_plane_state,
159 		       struct intel_initial_plane_config *plane_config,
160 		       struct drm_framebuffer *fb,
161 		       struct i915_vma *_unused)
162 {
163 	struct intel_plane_state *plane_state = to_intel_plane_state(_plane_state);
164 	struct i915_vma *vma;
165 
166 	vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt,
167 				   0, 0, 0, false, &plane_state->flags);
168 	if (IS_ERR(vma))
169 		return PTR_ERR(vma);
170 
171 	plane_state->ggtt_vma = vma;
172 
173 	plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma);
174 
175 	plane_config->vma = vma;
176 
177 	return 0;
178 }
179 
180 static void xe_plane_config_fini(struct intel_initial_plane_config *plane_config)
181 {
182 }
183 
184 const struct intel_display_initial_plane_interface xe_display_initial_plane_interface = {
185 	.vblank_wait = xe_initial_plane_vblank_wait,
186 	.alloc_obj = xe_alloc_initial_plane_obj,
187 	.setup = xe_initial_plane_setup,
188 	.config_fini = xe_plane_config_fini,
189 };
190