1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2021 Intel Corporation 4 */ 5 6 /* for ioread64 */ 7 #include <linux/io-64-nonatomic-lo-hi.h> 8 9 #include <drm/intel/display_parent_interface.h> 10 11 #include "regs/xe_gtt_defs.h" 12 #include "xe_ggtt.h" 13 #include "xe_mmio.h" 14 15 #include "i915_vma.h" 16 #include "intel_crtc.h" 17 #include "intel_display.h" 18 #include "intel_display_core.h" 19 #include "intel_display_regs.h" 20 #include "intel_display_types.h" 21 #include "intel_fb.h" 22 #include "intel_fb_pin.h" 23 #include "xe_bo.h" 24 #include "xe_vram_types.h" 25 #include "xe_wa.h" 26 27 #include <generated/xe_device_wa_oob.h> 28 29 /* Early xe has no irq */ 30 static void xe_initial_plane_vblank_wait(struct drm_crtc *_crtc) 31 { 32 struct intel_crtc *crtc = to_intel_crtc(_crtc); 33 struct xe_device *xe = to_xe_device(crtc->base.dev); 34 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe))); 35 u32 timestamp; 36 int ret; 37 38 timestamp = xe_mmio_read32(xe_root_tile_mmio(xe), pipe_frmtmstmp); 39 40 ret = xe_mmio_wait32_not(xe_root_tile_mmio(xe), pipe_frmtmstmp, ~0U, timestamp, 40000U, ×tamp, false); 41 if (ret < 0) 42 drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret); 43 } 44 45 static struct xe_bo * 46 initial_plane_bo(struct xe_device *xe, 47 struct intel_initial_plane_config *plane_config) 48 { 49 struct xe_tile *tile0 = xe_device_get_root_tile(xe); 50 struct xe_bo *bo; 51 resource_size_t phys_base; 52 u32 base, size, flags; 53 u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K; 54 55 if (plane_config->size == 0) 56 return NULL; 57 58 flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT; 59 60 base = round_down(plane_config->base, page_size); 61 if (IS_DGFX(xe)) { 62 u64 pte = xe_ggtt_read_pte(tile0->mem.ggtt, base); 63 64 if (!(pte & XE_GGTT_PTE_DM)) { 65 drm_err(&xe->drm, 66 "Initial plane programming missing DM bit\n"); 67 return NULL; 68 } 69 70 phys_base = pte & ~(page_size - 1); 71 flags |= XE_BO_FLAG_VRAM0; 72 73 /* 74 * We don't currently expect this to ever be placed in the 75 * stolen portion. 76 */ 77 if (phys_base >= xe_vram_region_usable_size(tile0->mem.vram)) { 78 drm_err(&xe->drm, 79 "Initial plane programming using invalid range, phys_base=%pa\n", 80 &phys_base); 81 return NULL; 82 } 83 84 drm_dbg(&xe->drm, 85 "Using phys_base=%pa, based on initial plane programming\n", 86 &phys_base); 87 } else { 88 struct ttm_resource_manager *stolen = ttm_manager_type(&xe->ttm, XE_PL_STOLEN); 89 90 if (!stolen) 91 return NULL; 92 phys_base = base; 93 flags |= XE_BO_FLAG_STOLEN; 94 95 if (XE_DEVICE_WA(xe, 22019338487_display)) 96 return NULL; 97 98 /* 99 * If the FB is too big, just don't use it since fbdev is not very 100 * important and we should probably use that space with FBC or other 101 * features. 102 */ 103 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) && 104 plane_config->size * 2 >> PAGE_SHIFT >= stolen->size) 105 return NULL; 106 } 107 108 size = round_up(plane_config->base + plane_config->size, 109 page_size); 110 size -= base; 111 112 bo = xe_bo_create_pin_map_at_novm(xe, tile0, size, phys_base, 113 ttm_bo_type_kernel, flags, 0, false); 114 if (IS_ERR(bo)) { 115 drm_dbg(&xe->drm, 116 "Failed to create bo phys_base=%pa size %u with flags %x: %li\n", 117 &phys_base, size, flags, PTR_ERR(bo)); 118 return NULL; 119 } 120 121 return bo; 122 } 123 124 static struct drm_gem_object * 125 xe_alloc_initial_plane_obj(struct drm_crtc *_crtc, 126 struct intel_initial_plane_config *plane_config) 127 { 128 struct intel_crtc *crtc = to_intel_crtc(_crtc); 129 struct xe_device *xe = to_xe_device(crtc->base.dev); 130 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 131 struct drm_framebuffer *fb = &plane_config->fb->base; 132 struct xe_bo *bo; 133 134 mode_cmd.pixel_format = fb->format->format; 135 mode_cmd.width = fb->width; 136 mode_cmd.height = fb->height; 137 mode_cmd.pitches[0] = fb->pitches[0]; 138 mode_cmd.modifier[0] = fb->modifier; 139 mode_cmd.flags = DRM_MODE_FB_MODIFIERS; 140 141 bo = initial_plane_bo(xe, plane_config); 142 if (!bo) 143 return NULL; 144 145 if (intel_framebuffer_init(to_intel_framebuffer(fb), 146 &bo->ttm.base, fb->format, &mode_cmd)) { 147 drm_dbg_kms(&xe->drm, "intel fb init failed\n"); 148 goto err_bo; 149 } 150 /* Reference handed over to fb */ 151 xe_bo_put(bo); 152 153 return &bo->ttm.base; 154 155 err_bo: 156 xe_bo_unpin_map_no_vm(bo); 157 return NULL; 158 } 159 160 static int 161 xe_initial_plane_setup(struct drm_plane_state *_plane_state, 162 struct intel_initial_plane_config *plane_config, 163 struct drm_framebuffer *fb, 164 struct i915_vma *_unused) 165 { 166 struct intel_plane_state *plane_state = to_intel_plane_state(_plane_state); 167 struct i915_vma *vma; 168 169 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt, 170 0, 0, 0, false, &plane_state->flags); 171 if (IS_ERR(vma)) 172 return PTR_ERR(vma); 173 174 plane_state->ggtt_vma = vma; 175 176 plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma); 177 178 plane_config->vma = vma; 179 180 return 0; 181 } 182 183 static void xe_plane_config_fini(struct intel_initial_plane_config *plane_config) 184 { 185 } 186 187 const struct intel_display_initial_plane_interface xe_display_initial_plane_interface = { 188 .vblank_wait = xe_initial_plane_vblank_wait, 189 .alloc_obj = xe_alloc_initial_plane_obj, 190 .setup = xe_initial_plane_setup, 191 .config_fini = xe_plane_config_fini, 192 }; 193