xref: /linux/drivers/gpu/drm/xe/display/xe_display.c (revision a3e50e7279996cd987001fd8a3db36e72665f8f7)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2023 Intel Corporation
4  */
5 
6 #include "xe_display.h"
7 #include "regs/xe_irq_regs.h"
8 
9 #include <linux/fb.h>
10 
11 #include <drm/drm_client.h>
12 #include <drm/drm_client_event.h>
13 #include <drm/drm_drv.h>
14 #include <drm/drm_managed.h>
15 #include <drm/drm_probe_helper.h>
16 #include <drm/intel/display_member.h>
17 #include <drm/intel/display_parent_interface.h>
18 #include <uapi/drm/xe_drm.h>
19 
20 #include "intel_acpi.h"
21 #include "intel_audio.h"
22 #include "intel_bw.h"
23 #include "intel_display.h"
24 #include "intel_display_core.h"
25 #include "intel_display_device.h"
26 #include "intel_display_driver.h"
27 #include "intel_display_irq.h"
28 #include "intel_display_types.h"
29 #include "intel_dmc.h"
30 #include "intel_dmc_wl.h"
31 #include "intel_dp.h"
32 #include "intel_dram.h"
33 #include "intel_encoder.h"
34 #include "intel_fbdev.h"
35 #include "intel_hdcp.h"
36 #include "intel_hotplug.h"
37 #include "intel_opregion.h"
38 #include "skl_watermark.h"
39 #include "xe_device.h"
40 #include "xe_display_bo.h"
41 #include "xe_display_pcode.h"
42 #include "xe_display_rpm.h"
43 #include "xe_dsb_buffer.h"
44 #include "xe_fb_pin.h"
45 #include "xe_frontbuffer.h"
46 #include "xe_hdcp_gsc.h"
47 #include "xe_initial_plane.h"
48 #include "xe_module.h"
49 #include "xe_panic.h"
50 #include "xe_stolen.h"
51 
52 /* Ensure drm and display members are placed properly. */
53 INTEL_DISPLAY_MEMBER_STATIC_ASSERT(struct xe_device, drm, display);
54 
55 /* Xe device functions */
56 
57 /**
58  * xe_display_driver_probe_defer - Detect if we need to wait for other drivers
59  *				   early on
60  * @pdev: PCI device
61  *
62  * Note: This is called before xe or display device creation.
63  *
64  * Returns: true if probe needs to be deferred, false otherwise
65  */
66 bool xe_display_driver_probe_defer(struct pci_dev *pdev)
67 {
68 	if (!xe_modparam.probe_display)
69 		return 0;
70 
71 	return intel_display_driver_probe_defer(pdev);
72 }
73 
74 static void unset_display_features(struct xe_device *xe)
75 {
76 	xe->drm.driver_features &= ~XE_DISPLAY_DRIVER_FEATURES;
77 }
78 
79 static void xe_display_fini_early(void *arg)
80 {
81 	struct xe_device *xe = arg;
82 	struct intel_display *display = xe->display;
83 
84 	if (!xe->info.probe_display)
85 		return;
86 
87 	intel_hpd_cancel_work(display);
88 	intel_display_driver_remove_nogem(display);
89 	intel_display_driver_remove_noirq(display);
90 	intel_opregion_cleanup(display);
91 	intel_power_domains_cleanup(display);
92 }
93 
94 int xe_display_init_early(struct xe_device *xe)
95 {
96 	struct intel_display *display = xe->display;
97 	int err;
98 
99 	if (!xe->info.probe_display)
100 		return 0;
101 
102 	/* Fake uncore lock */
103 	spin_lock_init(&xe->uncore.lock);
104 
105 	intel_display_driver_early_probe(display);
106 
107 	/* Early display init.. */
108 	intel_opregion_setup(display);
109 
110 	/*
111 	 * Fill the dram structure to get the system dram info. This will be
112 	 * used for memory latency calculation.
113 	 */
114 	err = intel_dram_detect(display);
115 	if (err)
116 		goto err_opregion;
117 
118 	intel_bw_init_hw(display);
119 
120 	intel_display_device_info_runtime_init(display);
121 
122 	err = intel_display_driver_probe_noirq(display);
123 	if (err)
124 		goto err_opregion;
125 
126 	err = intel_display_driver_probe_nogem(display);
127 	if (err)
128 		goto err_noirq;
129 
130 	return devm_add_action_or_reset(xe->drm.dev, xe_display_fini_early, xe);
131 err_noirq:
132 	intel_display_driver_remove_noirq(display);
133 	intel_power_domains_cleanup(display);
134 err_opregion:
135 	intel_opregion_cleanup(display);
136 	return err;
137 }
138 
139 static void xe_display_fini(void *arg)
140 {
141 	struct xe_device *xe = arg;
142 	struct intel_display *display = xe->display;
143 
144 	intel_hpd_poll_fini(display);
145 	intel_hdcp_component_fini(display);
146 	intel_audio_deinit(display);
147 	intel_display_driver_remove(display);
148 }
149 
150 int xe_display_init(struct xe_device *xe)
151 {
152 	struct intel_display *display = xe->display;
153 	int err;
154 
155 	if (!xe->info.probe_display)
156 		return 0;
157 
158 	err = intel_display_driver_probe(display);
159 	if (err)
160 		return err;
161 
162 	return devm_add_action_or_reset(xe->drm.dev, xe_display_fini, xe);
163 }
164 
165 void xe_display_register(struct xe_device *xe)
166 {
167 	struct intel_display *display = xe->display;
168 
169 	if (!xe->info.probe_display)
170 		return;
171 
172 	intel_display_driver_register(display);
173 	intel_power_domains_enable(display);
174 }
175 
176 void xe_display_unregister(struct xe_device *xe)
177 {
178 	struct intel_display *display = xe->display;
179 
180 	if (!xe->info.probe_display)
181 		return;
182 
183 	intel_power_domains_disable(display);
184 	intel_display_driver_unregister(display);
185 }
186 
187 /* IRQ-related functions */
188 
189 void xe_display_irq_handler(struct xe_device *xe, u32 master_ctl)
190 {
191 	struct intel_display *display = xe->display;
192 
193 	if (!xe->info.probe_display)
194 		return;
195 
196 	if (master_ctl & DISPLAY_IRQ)
197 		gen11_display_irq_handler(display);
198 }
199 
200 void xe_display_irq_enable(struct xe_device *xe, u32 gu_misc_iir)
201 {
202 	struct intel_display *display = xe->display;
203 
204 	if (!xe->info.probe_display)
205 		return;
206 
207 	if (gu_misc_iir & GU_MISC_GSE)
208 		intel_opregion_asle_intr(display);
209 }
210 
211 void xe_display_irq_reset(struct xe_device *xe)
212 {
213 	struct intel_display *display = xe->display;
214 
215 	if (!xe->info.probe_display)
216 		return;
217 
218 	gen11_display_irq_reset(display);
219 }
220 
221 void xe_display_irq_postinstall(struct xe_device *xe)
222 {
223 	struct intel_display *display = xe->display;
224 
225 	if (!xe->info.probe_display)
226 		return;
227 
228 	gen11_de_irq_postinstall(display);
229 }
230 
231 static bool suspend_to_idle(void)
232 {
233 #if IS_ENABLED(CONFIG_ACPI_SLEEP)
234 	if (acpi_target_system_state() < ACPI_STATE_S3)
235 		return true;
236 #endif
237 	return false;
238 }
239 
240 static void xe_display_flush_cleanup_work(struct xe_device *xe)
241 {
242 	struct intel_crtc *crtc;
243 
244 	for_each_intel_crtc(&xe->drm, crtc) {
245 		struct drm_crtc_commit *commit;
246 
247 		spin_lock(&crtc->base.commit_lock);
248 		commit = list_first_entry_or_null(&crtc->base.commit_list,
249 						  struct drm_crtc_commit, commit_entry);
250 		if (commit)
251 			drm_crtc_commit_get(commit);
252 		spin_unlock(&crtc->base.commit_lock);
253 
254 		if (commit) {
255 			wait_for_completion(&commit->cleanup_done);
256 			drm_crtc_commit_put(commit);
257 		}
258 	}
259 }
260 
261 static void xe_display_enable_d3cold(struct xe_device *xe)
262 {
263 	struct intel_display *display = xe->display;
264 
265 	if (!xe->info.probe_display)
266 		return;
267 
268 	/*
269 	 * We do a lot of poking in a lot of registers, make sure they work
270 	 * properly.
271 	 */
272 	intel_power_domains_disable(display);
273 
274 	xe_display_flush_cleanup_work(xe);
275 
276 	intel_opregion_suspend(display, PCI_D3cold);
277 
278 	intel_dmc_suspend(display);
279 
280 	if (intel_display_device_present(display))
281 		intel_hpd_poll_enable(display);
282 }
283 
284 static void xe_display_disable_d3cold(struct xe_device *xe)
285 {
286 	struct intel_display *display = xe->display;
287 
288 	if (!xe->info.probe_display)
289 		return;
290 
291 	intel_dmc_resume(display);
292 
293 	if (intel_display_device_present(display))
294 		drm_mode_config_reset(&xe->drm);
295 
296 	intel_display_driver_init_hw(display);
297 
298 	intel_hpd_init(display);
299 
300 	if (intel_display_device_present(display))
301 		intel_hpd_poll_disable(display);
302 
303 	intel_opregion_resume(display);
304 
305 	intel_power_domains_enable(display);
306 }
307 
308 void xe_display_pm_suspend(struct xe_device *xe)
309 {
310 	struct intel_display *display = xe->display;
311 	bool s2idle = suspend_to_idle();
312 
313 	if (!xe->info.probe_display)
314 		return;
315 
316 	/*
317 	 * We do a lot of poking in a lot of registers, make sure they work
318 	 * properly.
319 	 */
320 	intel_power_domains_disable(display);
321 	drm_client_dev_suspend(&xe->drm);
322 
323 	if (intel_display_device_present(display)) {
324 		drm_kms_helper_poll_disable(&xe->drm);
325 		intel_display_driver_disable_user_access(display);
326 		intel_display_driver_suspend(display);
327 	}
328 
329 	xe_display_flush_cleanup_work(xe);
330 
331 	intel_encoder_block_all_hpds(display);
332 
333 	intel_hpd_cancel_work(display);
334 
335 	if (intel_display_device_present(display)) {
336 		intel_display_driver_suspend_access(display);
337 		intel_encoder_suspend_all(display);
338 	}
339 
340 	intel_opregion_suspend(display, s2idle ? PCI_D1 : PCI_D3cold);
341 
342 	intel_dmc_suspend(display);
343 }
344 
345 void xe_display_pm_shutdown(struct xe_device *xe)
346 {
347 	struct intel_display *display = xe->display;
348 
349 	if (!xe->info.probe_display)
350 		return;
351 
352 	intel_power_domains_disable(display);
353 	drm_client_dev_suspend(&xe->drm);
354 
355 	if (intel_display_device_present(display)) {
356 		drm_kms_helper_poll_disable(&xe->drm);
357 		intel_display_driver_disable_user_access(display);
358 		intel_display_driver_suspend(display);
359 	}
360 
361 	xe_display_flush_cleanup_work(xe);
362 	intel_dp_mst_suspend(display);
363 	intel_encoder_block_all_hpds(display);
364 	intel_hpd_cancel_work(display);
365 
366 	if (intel_display_device_present(display))
367 		intel_display_driver_suspend_access(display);
368 
369 	intel_encoder_suspend_all(display);
370 	intel_encoder_shutdown_all(display);
371 
372 	intel_opregion_suspend(display, PCI_D3cold);
373 
374 	intel_dmc_suspend(display);
375 }
376 
377 void xe_display_pm_runtime_suspend(struct xe_device *xe)
378 {
379 	struct intel_display *display = xe->display;
380 
381 	if (!xe->info.probe_display)
382 		return;
383 
384 	if (xe->d3cold.allowed) {
385 		xe_display_enable_d3cold(xe);
386 		return;
387 	}
388 
389 	intel_hpd_poll_enable(display);
390 }
391 
392 void xe_display_pm_suspend_late(struct xe_device *xe)
393 {
394 	struct intel_display *display = xe->display;
395 	bool s2idle = suspend_to_idle();
396 
397 	if (!xe->info.probe_display)
398 		return;
399 
400 	intel_display_power_suspend_late(display, s2idle);
401 }
402 
403 void xe_display_pm_runtime_suspend_late(struct xe_device *xe)
404 {
405 	struct intel_display *display = xe->display;
406 
407 	if (!xe->info.probe_display)
408 		return;
409 
410 	if (xe->d3cold.allowed)
411 		xe_display_pm_suspend_late(xe);
412 
413 	/*
414 	 * If xe_display_pm_suspend_late() is not called, it is likely
415 	 * that we will be on dynamic DC states with DMC wakelock enabled. We
416 	 * need to flush the release work in that case.
417 	 */
418 	intel_dmc_wl_flush_release_work(display);
419 }
420 
421 void xe_display_pm_shutdown_late(struct xe_device *xe)
422 {
423 	struct intel_display *display = xe->display;
424 
425 	if (!xe->info.probe_display)
426 		return;
427 
428 	/*
429 	 * The only requirement is to reboot with display DC states disabled,
430 	 * for now leaving all display power wells in the INIT power domain
431 	 * enabled.
432 	 */
433 	intel_power_domains_driver_remove(display);
434 }
435 
436 void xe_display_pm_resume_early(struct xe_device *xe)
437 {
438 	struct intel_display *display = xe->display;
439 
440 	if (!xe->info.probe_display)
441 		return;
442 
443 	intel_display_power_resume_early(display);
444 }
445 
446 void xe_display_pm_resume(struct xe_device *xe)
447 {
448 	struct intel_display *display = xe->display;
449 
450 	if (!xe->info.probe_display)
451 		return;
452 
453 	intel_dmc_resume(display);
454 
455 	if (intel_display_device_present(display))
456 		drm_mode_config_reset(&xe->drm);
457 
458 	intel_display_driver_init_hw(display);
459 
460 	if (intel_display_device_present(display))
461 		intel_display_driver_resume_access(display);
462 
463 	intel_hpd_init(display);
464 
465 	intel_encoder_unblock_all_hpds(display);
466 
467 	if (intel_display_device_present(display)) {
468 		intel_display_driver_resume(display);
469 		drm_kms_helper_poll_enable(&xe->drm);
470 		intel_display_driver_enable_user_access(display);
471 	}
472 
473 	if (intel_display_device_present(display))
474 		intel_hpd_poll_disable(display);
475 
476 	intel_opregion_resume(display);
477 
478 	drm_client_dev_resume(&xe->drm);
479 
480 	intel_power_domains_enable(display);
481 }
482 
483 void xe_display_pm_runtime_resume(struct xe_device *xe)
484 {
485 	struct intel_display *display = xe->display;
486 
487 	if (!xe->info.probe_display)
488 		return;
489 
490 	if (xe->d3cold.allowed) {
491 		xe_display_disable_d3cold(xe);
492 		return;
493 	}
494 
495 	intel_hpd_init(display);
496 	intel_hpd_poll_disable(display);
497 	skl_watermark_ipc_update(display);
498 }
499 
500 
501 static void display_device_remove(struct drm_device *dev, void *arg)
502 {
503 	struct xe_device *xe = arg;
504 
505 	intel_display_device_remove(xe->display);
506 	xe->display = NULL;
507 }
508 
509 static bool irq_enabled(struct drm_device *drm)
510 {
511 	struct xe_device *xe = to_xe_device(drm);
512 
513 	return atomic_read(&xe->irq.enabled);
514 }
515 
516 static void irq_synchronize(struct drm_device *drm)
517 {
518 	synchronize_irq(to_pci_dev(drm->dev)->irq);
519 }
520 
521 static const struct intel_display_irq_interface xe_display_irq_interface = {
522 	.enabled = irq_enabled,
523 	.synchronize = irq_synchronize,
524 };
525 
526 static bool has_auxccs(struct drm_device *drm)
527 {
528 	struct xe_device *xe = to_xe_device(drm);
529 
530 	return xe->info.platform == XE_ALDERLAKE_P;
531 }
532 
533 static const struct intel_display_parent_interface parent = {
534 	.bo = &xe_display_bo_interface,
535 	.dsb = &xe_display_dsb_interface,
536 	.fb_pin = &xe_display_fb_pin_interface,
537 	.frontbuffer = &xe_display_frontbuffer_interface,
538 	.hdcp = &xe_display_hdcp_interface,
539 	.initial_plane = &xe_display_initial_plane_interface,
540 	.irq = &xe_display_irq_interface,
541 	.panic = &xe_display_panic_interface,
542 	.pcode = &xe_display_pcode_interface,
543 	.rpm = &xe_display_rpm_interface,
544 	.stolen = &xe_display_stolen_interface,
545 	.has_auxccs = has_auxccs,
546 };
547 
548 /**
549  * xe_display_probe - probe display and create display struct
550  * @xe: XE device instance
551  *
552  * Initialize all fields used by the display part.
553  *
554  * TODO: once everything can be inside a single struct, make the struct opaque
555  * to the rest of xe and return it to be xe->display.
556  *
557  * Returns: 0 on success
558  */
559 int xe_display_probe(struct xe_device *xe)
560 {
561 	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
562 	struct intel_display *display;
563 	int err;
564 
565 	if (!xe->info.probe_display)
566 		goto no_display;
567 
568 	display = intel_display_device_probe(pdev, &parent);
569 	if (IS_ERR(display))
570 		return PTR_ERR(display);
571 
572 	xe->display = display;
573 
574 	err = drmm_add_action_or_reset(&xe->drm, display_device_remove, xe);
575 	if (err)
576 		return err;
577 
578 	if (intel_display_device_present(display))
579 		return 0;
580 
581 no_display:
582 	xe->info.probe_display = false;
583 	unset_display_features(xe);
584 	return 0;
585 }
586 
587 #ifdef CONFIG_DRM_FBDEV_EMULATION
588 int xe_display_driver_fbdev_probe(struct drm_fb_helper *fbh,
589 				  struct drm_fb_helper_surface_size *sizes)
590 {
591 	return intel_fbdev_driver_fbdev_probe(fbh, sizes);
592 }
593 #endif
594