xref: /linux/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c (revision cf85f810f911234a06a4ef2439e8694b93b717fc)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /**************************************************************************
3  *
4  * Copyright (c) 2009-2025 Broadcom. All Rights Reserved. The term
5  * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
6  *
7  **************************************************************************/
8 
9 #include "vmwgfx_binding.h"
10 #include "vmwgfx_bo.h"
11 #include "vmwgfx_drv.h"
12 #include "vmwgfx_mksstat.h"
13 #include "vmwgfx_so.h"
14 
15 #include <drm/ttm/ttm_bo.h>
16 #include <drm/ttm/ttm_placement.h>
17 
18 #include <linux/sync_file.h>
19 #include <linux/hashtable.h>
20 #include <linux/vmalloc.h>
21 
22 /*
23  * Helper macro to get dx_ctx_node if available otherwise print an error
24  * message. This is for use in command verifier function where if dx_ctx_node
25  * is not set then command is invalid.
26  */
27 #define VMW_GET_CTX_NODE(__sw_context)                                        \
28 ({                                                                            \
29 	__sw_context->dx_ctx_node ? __sw_context->dx_ctx_node : ({            \
30 		VMW_DEBUG_USER("SM context is not set at %s\n", __func__);    \
31 		__sw_context->dx_ctx_node;                                    \
32 	});                                                                   \
33 })
34 
35 #define VMW_DECLARE_CMD_VAR(__var, __type)                                    \
36 	struct {                                                              \
37 		SVGA3dCmdHeader header;                                       \
38 		__type body;                                                  \
39 	} __var
40 
41 /**
42  * struct vmw_relocation - Buffer object relocation
43  *
44  * @head: List head for the command submission context's relocation list
45  * @vbo: Non ref-counted pointer to buffer object
46  * @mob_loc: Pointer to location for mob id to be modified
47  * @location: Pointer to location for guest pointer to be modified
48  */
49 struct vmw_relocation {
50 	struct list_head head;
51 	struct vmw_bo *vbo;
52 	union {
53 		SVGAMobId *mob_loc;
54 		SVGAGuestPtr *location;
55 	};
56 };
57 
58 /**
59  * enum vmw_resource_relocation_type - Relocation type for resources
60  *
61  * @vmw_res_rel_normal: Traditional relocation. The resource id in the
62  * command stream is replaced with the actual id after validation.
63  * @vmw_res_rel_nop: NOP relocation. The command is unconditionally replaced
64  * with a NOP.
65  * @vmw_res_rel_cond_nop: Conditional NOP relocation. If the resource id after
66  * validation is -1, the command is replaced with a NOP. Otherwise no action.
67  * @vmw_res_rel_max: Last value in the enum - used for error checking
68 */
69 enum vmw_resource_relocation_type {
70 	vmw_res_rel_normal,
71 	vmw_res_rel_nop,
72 	vmw_res_rel_cond_nop,
73 	vmw_res_rel_max
74 };
75 
76 /**
77  * struct vmw_resource_relocation - Relocation info for resources
78  *
79  * @head: List head for the software context's relocation list.
80  * @res: Non-ref-counted pointer to the resource.
81  * @offset: Offset of single byte entries into the command buffer where the id
82  * that needs fixup is located.
83  * @rel_type: Type of relocation.
84  */
85 struct vmw_resource_relocation {
86 	struct list_head head;
87 	const struct vmw_resource *res;
88 	u32 offset:29;
89 	enum vmw_resource_relocation_type rel_type:3;
90 };
91 
92 /**
93  * struct vmw_ctx_validation_info - Extra validation metadata for contexts
94  *
95  * @head: List head of context list
96  * @ctx: The context resource
97  * @cur: The context's persistent binding state
98  * @staged: The binding state changes of this command buffer
99  */
100 struct vmw_ctx_validation_info {
101 	struct list_head head;
102 	struct vmw_resource *ctx;
103 	struct vmw_ctx_binding_state *cur;
104 	struct vmw_ctx_binding_state *staged;
105 };
106 
107 /**
108  * struct vmw_cmd_entry - Describe a command for the verifier
109  *
110  * @func: Call-back to handle the command.
111  * @user_allow: Whether allowed from the execbuf ioctl.
112  * @gb_disable: Whether disabled if guest-backed objects are available.
113  * @gb_enable: Whether enabled iff guest-backed objects are available.
114  * @cmd_name: Name of the command.
115  */
116 struct vmw_cmd_entry {
117 	int (*func) (struct vmw_private *, struct vmw_sw_context *,
118 		     SVGA3dCmdHeader *);
119 	bool user_allow;
120 	bool gb_disable;
121 	bool gb_enable;
122 	const char *cmd_name;
123 };
124 
125 #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable)	\
126 	[(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
127 				       (_gb_disable), (_gb_enable), #_cmd}
128 
129 static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
130 					struct vmw_sw_context *sw_context,
131 					struct vmw_resource *ctx);
132 static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
133 				 struct vmw_sw_context *sw_context,
134 				 SVGAMobId *id,
135 				 struct vmw_bo **vmw_bo_p);
136 /**
137  * vmw_ptr_diff - Compute the offset from a to b in bytes
138  *
139  * @a: A starting pointer.
140  * @b: A pointer offset in the same address space.
141  *
142  * Returns: The offset in bytes between the two pointers.
143  */
144 static size_t vmw_ptr_diff(void *a, void *b)
145 {
146 	return (unsigned long) b - (unsigned long) a;
147 }
148 
149 /**
150  * vmw_execbuf_bindings_commit - Commit modified binding state
151  *
152  * @sw_context: The command submission context
153  * @backoff: Whether this is part of the error path and binding state changes
154  * should be ignored
155  */
156 static void vmw_execbuf_bindings_commit(struct vmw_sw_context *sw_context,
157 					bool backoff)
158 {
159 	struct vmw_ctx_validation_info *entry;
160 
161 	list_for_each_entry(entry, &sw_context->ctx_list, head) {
162 		if (!backoff)
163 			vmw_binding_state_commit(entry->cur, entry->staged);
164 
165 		if (entry->staged != sw_context->staged_bindings)
166 			vmw_binding_state_free(entry->staged);
167 		else
168 			sw_context->staged_bindings_inuse = false;
169 	}
170 
171 	/* List entries are freed with the validation context */
172 	INIT_LIST_HEAD(&sw_context->ctx_list);
173 }
174 
175 /**
176  * vmw_bind_dx_query_mob - Bind the DX query MOB if referenced
177  *
178  * @sw_context: The command submission context
179  */
180 static void vmw_bind_dx_query_mob(struct vmw_sw_context *sw_context)
181 {
182 	if (sw_context->dx_query_mob)
183 		vmw_context_bind_dx_query(sw_context->dx_query_ctx,
184 					  sw_context->dx_query_mob);
185 }
186 
187 /**
188  * vmw_cmd_ctx_first_setup - Perform the setup needed when a context is added to
189  * the validate list.
190  *
191  * @dev_priv: Pointer to the device private:
192  * @sw_context: The command submission context
193  * @res: Pointer to the resource
194  * @node: The validation node holding the context resource metadata
195  */
196 static int vmw_cmd_ctx_first_setup(struct vmw_private *dev_priv,
197 				   struct vmw_sw_context *sw_context,
198 				   struct vmw_resource *res,
199 				   struct vmw_ctx_validation_info *node)
200 {
201 	int ret;
202 
203 	ret = vmw_resource_context_res_add(dev_priv, sw_context, res);
204 	if (unlikely(ret != 0))
205 		goto out_err;
206 
207 	if (!sw_context->staged_bindings) {
208 		sw_context->staged_bindings = vmw_binding_state_alloc(dev_priv);
209 		if (IS_ERR(sw_context->staged_bindings)) {
210 			ret = PTR_ERR(sw_context->staged_bindings);
211 			sw_context->staged_bindings = NULL;
212 			goto out_err;
213 		}
214 	}
215 
216 	if (sw_context->staged_bindings_inuse) {
217 		node->staged = vmw_binding_state_alloc(dev_priv);
218 		if (IS_ERR(node->staged)) {
219 			ret = PTR_ERR(node->staged);
220 			node->staged = NULL;
221 			goto out_err;
222 		}
223 	} else {
224 		node->staged = sw_context->staged_bindings;
225 		sw_context->staged_bindings_inuse = true;
226 	}
227 
228 	node->ctx = res;
229 	node->cur = vmw_context_binding_state(res);
230 	list_add_tail(&node->head, &sw_context->ctx_list);
231 
232 	return 0;
233 
234 out_err:
235 	return ret;
236 }
237 
238 /**
239  * vmw_execbuf_res_size - calculate extra size fore the resource validation node
240  *
241  * @dev_priv: Pointer to the device private struct.
242  * @res_type: The resource type.
243  *
244  * Guest-backed contexts and DX contexts require extra size to store execbuf
245  * private information in the validation node. Typically the binding manager
246  * associated data structures.
247  *
248  * Returns: The extra size requirement based on resource type.
249  */
250 static unsigned int vmw_execbuf_res_size(struct vmw_private *dev_priv,
251 					 enum vmw_res_type res_type)
252 {
253 	return (res_type == vmw_res_dx_context ||
254 		(res_type == vmw_res_context && dev_priv->has_mob)) ?
255 		sizeof(struct vmw_ctx_validation_info) : 0;
256 }
257 
258 /**
259  * vmw_execbuf_rcache_update - Update a resource-node cache entry
260  *
261  * @rcache: Pointer to the entry to update.
262  * @res: Pointer to the resource.
263  * @private: Pointer to the execbuf-private space in the resource validation
264  * node.
265  */
266 static void vmw_execbuf_rcache_update(struct vmw_res_cache_entry *rcache,
267 				      struct vmw_resource *res,
268 				      void *private)
269 {
270 	rcache->res = res;
271 	rcache->private = private;
272 	rcache->valid = 1;
273 	rcache->valid_handle = 0;
274 }
275 
276 enum vmw_val_add_flags {
277 	vmw_val_add_flag_none  =      0,
278 	vmw_val_add_flag_noctx = 1 << 0,
279 };
280 
281 /**
282  * vmw_execbuf_res_val_add - Add a resource to the validation list.
283  *
284  * @sw_context: Pointer to the software context.
285  * @res: Unreferenced rcu-protected pointer to the resource.
286  * @dirty: Whether to change dirty status.
287  * @flags: specifies whether to use the context or not
288  *
289  * Returns: 0 on success. Negative error code on failure. Typical error codes
290  * are %-EINVAL on inconsistency and %-ESRCH if the resource was doomed.
291  */
292 static int vmw_execbuf_res_val_add(struct vmw_sw_context *sw_context,
293 				   struct vmw_resource *res,
294 				   u32 dirty,
295 				   u32 flags)
296 {
297 	struct vmw_private *dev_priv = res->dev_priv;
298 	int ret;
299 	enum vmw_res_type res_type = vmw_res_type(res);
300 	struct vmw_res_cache_entry *rcache;
301 	struct vmw_ctx_validation_info *ctx_info;
302 	bool first_usage;
303 	unsigned int priv_size;
304 
305 	rcache = &sw_context->res_cache[res_type];
306 	if (likely(rcache->valid && rcache->res == res)) {
307 		if (dirty)
308 			vmw_validation_res_set_dirty(sw_context->ctx,
309 						     rcache->private, dirty);
310 		return 0;
311 	}
312 
313 	if ((flags & vmw_val_add_flag_noctx) != 0) {
314 		ret = vmw_validation_add_resource(sw_context->ctx, res, 0, dirty,
315 						  (void **)&ctx_info, NULL);
316 		if (ret)
317 			return ret;
318 
319 	} else {
320 		priv_size = vmw_execbuf_res_size(dev_priv, res_type);
321 		ret = vmw_validation_add_resource(sw_context->ctx, res, priv_size,
322 						  dirty, (void **)&ctx_info,
323 						  &first_usage);
324 		if (ret)
325 			return ret;
326 
327 		if (priv_size && first_usage) {
328 			ret = vmw_cmd_ctx_first_setup(dev_priv, sw_context, res,
329 						      ctx_info);
330 			if (ret) {
331 				VMW_DEBUG_USER("Failed first usage context setup.\n");
332 				return ret;
333 			}
334 		}
335 	}
336 
337 	vmw_execbuf_rcache_update(rcache, res, ctx_info);
338 	return 0;
339 }
340 
341 /**
342  * vmw_view_res_val_add - Add a view and the surface it's pointing to to the
343  * validation list
344  *
345  * @sw_context: The software context holding the validation list.
346  * @view: Pointer to the view resource.
347  *
348  * Returns 0 if success, negative error code otherwise.
349  */
350 static int vmw_view_res_val_add(struct vmw_sw_context *sw_context,
351 				struct vmw_resource *view)
352 {
353 	int ret;
354 
355 	/*
356 	 * First add the resource the view is pointing to, otherwise it may be
357 	 * swapped out when the view is validated.
358 	 */
359 	ret = vmw_execbuf_res_val_add(sw_context, vmw_view_srf(view),
360 				      vmw_view_dirtying(view), vmw_val_add_flag_noctx);
361 	if (ret)
362 		return ret;
363 
364 	return vmw_execbuf_res_val_add(sw_context, view, VMW_RES_DIRTY_NONE,
365 				       vmw_val_add_flag_noctx);
366 }
367 
368 /**
369  * vmw_view_id_val_add - Look up a view and add it and the surface it's pointing
370  * to to the validation list.
371  *
372  * @sw_context: The software context holding the validation list.
373  * @view_type: The view type to look up.
374  * @id: view id of the view.
375  *
376  * The view is represented by a view id and the DX context it's created on, or
377  * scheduled for creation on. If there is no DX context set, the function will
378  * return an -EINVAL error pointer.
379  *
380  * Returns: Unreferenced pointer to the resource on success, negative error
381  * pointer on failure.
382  */
383 static struct vmw_resource *
384 vmw_view_id_val_add(struct vmw_sw_context *sw_context,
385 		    enum vmw_view_type view_type, u32 id)
386 {
387 	struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
388 	struct vmw_resource *view;
389 	int ret;
390 
391 	if (!ctx_node)
392 		return ERR_PTR(-EINVAL);
393 
394 	view = vmw_view_lookup(sw_context->man, view_type, id);
395 	if (IS_ERR(view))
396 		return view;
397 
398 	ret = vmw_view_res_val_add(sw_context, view);
399 	if (ret)
400 		return ERR_PTR(ret);
401 
402 	return view;
403 }
404 
405 /**
406  * vmw_resource_context_res_add - Put resources previously bound to a context on
407  * the validation list
408  *
409  * @dev_priv: Pointer to a device private structure
410  * @sw_context: Pointer to a software context used for this command submission
411  * @ctx: Pointer to the context resource
412  *
413  * This function puts all resources that were previously bound to @ctx on the
414  * resource validation list. This is part of the context state reemission
415  */
416 static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
417 					struct vmw_sw_context *sw_context,
418 					struct vmw_resource *ctx)
419 {
420 	struct list_head *binding_list;
421 	struct vmw_ctx_bindinfo *entry;
422 	int ret = 0;
423 	struct vmw_resource *res;
424 	u32 i;
425 	u32 cotable_max = has_sm5_context(ctx->dev_priv) ?
426 		SVGA_COTABLE_MAX : SVGA_COTABLE_DX10_MAX;
427 
428 	/* Add all cotables to the validation list. */
429 	if (has_sm4_context(dev_priv) &&
430 	    vmw_res_type(ctx) == vmw_res_dx_context) {
431 		for (i = 0; i < cotable_max; ++i) {
432 			res = vmw_context_cotable(ctx, i);
433 			if (IS_ERR_OR_NULL(res))
434 				continue;
435 
436 			ret = vmw_execbuf_res_val_add(sw_context, res,
437 						      VMW_RES_DIRTY_SET,
438 						      vmw_val_add_flag_noctx);
439 			if (unlikely(ret != 0))
440 				return ret;
441 		}
442 	}
443 
444 	/* Add all resources bound to the context to the validation list */
445 	mutex_lock(&dev_priv->binding_mutex);
446 	binding_list = vmw_context_binding_list(ctx);
447 
448 	list_for_each_entry(entry, binding_list, ctx_list) {
449 		if (vmw_res_type(entry->res) == vmw_res_view)
450 			ret = vmw_view_res_val_add(sw_context, entry->res);
451 		else
452 			ret = vmw_execbuf_res_val_add(sw_context, entry->res,
453 						      vmw_binding_dirtying(entry->bt),
454 						      vmw_val_add_flag_noctx);
455 		if (unlikely(ret != 0))
456 			break;
457 	}
458 
459 	if (has_sm4_context(dev_priv) &&
460 	    vmw_res_type(ctx) == vmw_res_dx_context) {
461 		struct vmw_bo *dx_query_mob;
462 
463 		dx_query_mob = vmw_context_get_dx_query_mob(ctx);
464 		if (dx_query_mob) {
465 			vmw_bo_placement_set(dx_query_mob,
466 					     VMW_BO_DOMAIN_MOB,
467 					     VMW_BO_DOMAIN_MOB);
468 			ret = vmw_validation_add_bo(sw_context->ctx,
469 						    dx_query_mob);
470 		}
471 	}
472 
473 	mutex_unlock(&dev_priv->binding_mutex);
474 	return ret;
475 }
476 
477 /**
478  * vmw_resource_relocation_add - Add a relocation to the relocation list
479  *
480  * @sw_context: Pointer to the software context.
481  * @res: The resource.
482  * @offset: Offset into the command buffer currently being parsed where the id
483  * that needs fixup is located. Granularity is one byte.
484  * @rel_type: Relocation type.
485  */
486 static int vmw_resource_relocation_add(struct vmw_sw_context *sw_context,
487 				       const struct vmw_resource *res,
488 				       unsigned long offset,
489 				       enum vmw_resource_relocation_type
490 				       rel_type)
491 {
492 	struct vmw_resource_relocation *rel;
493 
494 	rel = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*rel));
495 	if (unlikely(!rel)) {
496 		VMW_DEBUG_USER("Failed to allocate a resource relocation.\n");
497 		return -ENOMEM;
498 	}
499 
500 	rel->res = res;
501 	rel->offset = offset;
502 	rel->rel_type = rel_type;
503 	list_add_tail(&rel->head, &sw_context->res_relocations);
504 
505 	return 0;
506 }
507 
508 /**
509  * vmw_resource_relocations_free - Free all relocations on a list
510  *
511  * @list: Pointer to the head of the relocation list
512  */
513 static void vmw_resource_relocations_free(struct list_head *list)
514 {
515 	/* Memory is validation context memory, so no need to free it */
516 	INIT_LIST_HEAD(list);
517 }
518 
519 /**
520  * vmw_resource_relocations_apply - Apply all relocations on a list
521  *
522  * @cb: Pointer to the start of the command buffer bein patch. This need not be
523  * the same buffer as the one being parsed when the relocation list was built,
524  * but the contents must be the same modulo the resource ids.
525  * @list: Pointer to the head of the relocation list.
526  */
527 static void vmw_resource_relocations_apply(uint32_t *cb,
528 					   struct list_head *list)
529 {
530 	struct vmw_resource_relocation *rel;
531 
532 	/* Validate the struct vmw_resource_relocation member size */
533 	BUILD_BUG_ON(SVGA_CB_MAX_SIZE >= (1 << 29));
534 	BUILD_BUG_ON(vmw_res_rel_max >= (1 << 3));
535 
536 	list_for_each_entry(rel, list, head) {
537 		u32 *addr = (u32 *)((unsigned long) cb + rel->offset);
538 		switch (rel->rel_type) {
539 		case vmw_res_rel_normal:
540 			*addr = rel->res->id;
541 			break;
542 		case vmw_res_rel_nop:
543 			*addr = SVGA_3D_CMD_NOP;
544 			break;
545 		default:
546 			if (rel->res->id == -1)
547 				*addr = SVGA_3D_CMD_NOP;
548 			break;
549 		}
550 	}
551 }
552 
553 static int vmw_cmd_invalid(struct vmw_private *dev_priv,
554 			   struct vmw_sw_context *sw_context,
555 			   SVGA3dCmdHeader *header)
556 {
557 	return -EINVAL;
558 }
559 
560 static int vmw_cmd_ok(struct vmw_private *dev_priv,
561 		      struct vmw_sw_context *sw_context,
562 		      SVGA3dCmdHeader *header)
563 {
564 	return 0;
565 }
566 
567 /**
568  * vmw_resources_reserve - Reserve all resources on the sw_context's resource
569  * list.
570  *
571  * @sw_context: Pointer to the software context.
572  *
573  * Note that since vmware's command submission currently is protected by the
574  * cmdbuf mutex, no fancy deadlock avoidance is required for resources, since
575  * only a single thread at once will attempt this.
576  */
577 static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
578 {
579 	int ret;
580 
581 	ret = vmw_validation_res_reserve(sw_context->ctx, true);
582 	if (ret)
583 		return ret;
584 
585 	if (sw_context->dx_query_mob) {
586 		struct vmw_bo *expected_dx_query_mob;
587 
588 		expected_dx_query_mob =
589 			vmw_context_get_dx_query_mob(sw_context->dx_query_ctx);
590 		if (expected_dx_query_mob &&
591 		    expected_dx_query_mob != sw_context->dx_query_mob) {
592 			ret = -EINVAL;
593 		}
594 	}
595 
596 	return ret;
597 }
598 
599 /**
600  * vmw_cmd_res_check - Check that a resource is present and if so, put it on the
601  * resource validate list unless it's already there.
602  *
603  * @dev_priv: Pointer to a device private structure.
604  * @sw_context: Pointer to the software context.
605  * @res_type: Resource type.
606  * @dirty: Whether to change dirty status.
607  * @converter: User-space visible type specific information.
608  * @id_loc: Pointer to the location in the command buffer currently being parsed
609  * from where the user-space resource id handle is located.
610  * @p_res: Pointer to pointer to resource validation node. Populated on
611  * exit.
612  */
613 static int
614 vmw_cmd_res_check(struct vmw_private *dev_priv,
615 		  struct vmw_sw_context *sw_context,
616 		  enum vmw_res_type res_type,
617 		  u32 dirty,
618 		  const struct vmw_user_resource_conv *converter,
619 		  uint32_t *id_loc,
620 		  struct vmw_resource **p_res)
621 {
622 	struct vmw_res_cache_entry *rcache = &sw_context->res_cache[res_type];
623 	struct vmw_resource *res;
624 	int ret = 0;
625 	bool needs_unref = false;
626 
627 	if (p_res)
628 		*p_res = NULL;
629 
630 	if (*id_loc == SVGA3D_INVALID_ID) {
631 		if (res_type == vmw_res_context) {
632 			VMW_DEBUG_USER("Illegal context invalid id.\n");
633 			return -EINVAL;
634 		}
635 		return 0;
636 	}
637 
638 	if (likely(rcache->valid_handle && *id_loc == rcache->handle)) {
639 		res = rcache->res;
640 		if (dirty)
641 			vmw_validation_res_set_dirty(sw_context->ctx,
642 						     rcache->private, dirty);
643 	} else {
644 		unsigned int size = vmw_execbuf_res_size(dev_priv, res_type);
645 
646 		ret = vmw_validation_preload_res(sw_context->ctx, size);
647 		if (ret)
648 			return ret;
649 
650 		ret = vmw_user_resource_lookup_handle
651 			(dev_priv, sw_context->fp->tfile, *id_loc, converter, &res);
652 		if (ret != 0) {
653 			VMW_DEBUG_USER("Could not find/use resource 0x%08x.\n",
654 				       (unsigned int) *id_loc);
655 			return ret;
656 		}
657 		needs_unref = true;
658 
659 		ret = vmw_execbuf_res_val_add(sw_context, res, dirty, vmw_val_add_flag_none);
660 		if (unlikely(ret != 0))
661 			goto res_check_done;
662 
663 		if (rcache->valid && rcache->res == res) {
664 			rcache->valid_handle = true;
665 			rcache->handle = *id_loc;
666 		}
667 	}
668 
669 	ret = vmw_resource_relocation_add(sw_context, res,
670 					  vmw_ptr_diff(sw_context->buf_start,
671 						       id_loc),
672 					  vmw_res_rel_normal);
673 	if (p_res)
674 		*p_res = res;
675 
676 res_check_done:
677 	if (needs_unref)
678 		vmw_resource_unreference(&res);
679 
680 	return ret;
681 }
682 
683 /**
684  * vmw_rebind_all_dx_query - Rebind DX query associated with the context
685  *
686  * @ctx_res: context the query belongs to
687  *
688  * This function assumes binding_mutex is held.
689  */
690 static int vmw_rebind_all_dx_query(struct vmw_resource *ctx_res)
691 {
692 	struct vmw_private *dev_priv = ctx_res->dev_priv;
693 	struct vmw_bo *dx_query_mob;
694 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindAllQuery);
695 
696 	dx_query_mob = vmw_context_get_dx_query_mob(ctx_res);
697 
698 	if (!dx_query_mob || dx_query_mob->dx_query_ctx)
699 		return 0;
700 
701 	cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), ctx_res->id);
702 	if (cmd == NULL)
703 		return -ENOMEM;
704 
705 	cmd->header.id = SVGA_3D_CMD_DX_BIND_ALL_QUERY;
706 	cmd->header.size = sizeof(cmd->body);
707 	cmd->body.cid = ctx_res->id;
708 	cmd->body.mobid = dx_query_mob->tbo.resource->start;
709 	vmw_cmd_commit(dev_priv, sizeof(*cmd));
710 
711 	vmw_context_bind_dx_query(ctx_res, dx_query_mob);
712 
713 	return 0;
714 }
715 
716 /**
717  * vmw_rebind_contexts - Rebind all resources previously bound to referenced
718  * contexts.
719  *
720  * @sw_context: Pointer to the software context.
721  *
722  * Rebind context binding points that have been scrubbed because of eviction.
723  */
724 static int vmw_rebind_contexts(struct vmw_sw_context *sw_context)
725 {
726 	struct vmw_ctx_validation_info *val;
727 	int ret;
728 
729 	list_for_each_entry(val, &sw_context->ctx_list, head) {
730 		ret = vmw_binding_rebind_all(val->cur);
731 		if (unlikely(ret != 0)) {
732 			if (ret != -ERESTARTSYS)
733 				VMW_DEBUG_USER("Failed to rebind context.\n");
734 			return ret;
735 		}
736 
737 		ret = vmw_rebind_all_dx_query(val->ctx);
738 		if (ret != 0) {
739 			VMW_DEBUG_USER("Failed to rebind queries.\n");
740 			return ret;
741 		}
742 	}
743 
744 	return 0;
745 }
746 
747 /**
748  * vmw_view_bindings_add - Add an array of view bindings to a context binding
749  * state tracker.
750  *
751  * @sw_context: The execbuf state used for this command.
752  * @view_type: View type for the bindings.
753  * @binding_type: Binding type for the bindings.
754  * @shader_slot: The shader slot to user for the bindings.
755  * @view_ids: Array of view ids to be bound.
756  * @num_views: Number of view ids in @view_ids.
757  * @first_slot: The binding slot to be used for the first view id in @view_ids.
758  */
759 static int vmw_view_bindings_add(struct vmw_sw_context *sw_context,
760 				 enum vmw_view_type view_type,
761 				 enum vmw_ctx_binding_type binding_type,
762 				 uint32 shader_slot,
763 				 uint32 view_ids[], u32 num_views,
764 				 u32 first_slot)
765 {
766 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
767 	u32 i;
768 
769 	if (!ctx_node)
770 		return -EINVAL;
771 
772 	for (i = 0; i < num_views; ++i) {
773 		struct vmw_ctx_bindinfo_view binding;
774 		struct vmw_resource *view = NULL;
775 
776 		if (view_ids[i] != SVGA3D_INVALID_ID) {
777 			view = vmw_view_id_val_add(sw_context, view_type,
778 						   view_ids[i]);
779 			if (IS_ERR(view)) {
780 				VMW_DEBUG_USER("View not found.\n");
781 				return PTR_ERR(view);
782 			}
783 		}
784 		binding.bi.ctx = ctx_node->ctx;
785 		binding.bi.res = view;
786 		binding.bi.bt = binding_type;
787 		binding.shader_slot = shader_slot;
788 		binding.slot = first_slot + i;
789 		vmw_binding_add(ctx_node->staged, &binding.bi,
790 				shader_slot, binding.slot);
791 	}
792 
793 	return 0;
794 }
795 
796 /**
797  * vmw_cmd_cid_check - Check a command header for valid context information.
798  *
799  * @dev_priv: Pointer to a device private structure.
800  * @sw_context: Pointer to the software context.
801  * @header: A command header with an embedded user-space context handle.
802  *
803  * Convenience function: Call vmw_cmd_res_check with the user-space context
804  * handle embedded in @header.
805  */
806 static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
807 			     struct vmw_sw_context *sw_context,
808 			     SVGA3dCmdHeader *header)
809 {
810 	VMW_DECLARE_CMD_VAR(*cmd, uint32_t) =
811 		container_of(header, typeof(*cmd), header);
812 
813 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
814 				 VMW_RES_DIRTY_SET, user_context_converter,
815 				 &cmd->body, NULL);
816 }
817 
818 /**
819  * vmw_execbuf_info_from_res - Get the private validation metadata for a
820  * recently validated resource
821  *
822  * @sw_context: Pointer to the command submission context
823  * @res: The resource
824  *
825  * The resource pointed to by @res needs to be present in the command submission
826  * context's resource cache and hence the last resource of that type to be
827  * processed by the validation code.
828  *
829  * Return: a pointer to the private metadata of the resource, or NULL if it
830  * wasn't found
831  */
832 static struct vmw_ctx_validation_info *
833 vmw_execbuf_info_from_res(struct vmw_sw_context *sw_context,
834 			  struct vmw_resource *res)
835 {
836 	struct vmw_res_cache_entry *rcache =
837 		&sw_context->res_cache[vmw_res_type(res)];
838 
839 	if (rcache->valid && rcache->res == res)
840 		return rcache->private;
841 
842 	WARN_ON_ONCE(true);
843 	return NULL;
844 }
845 
846 static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
847 					   struct vmw_sw_context *sw_context,
848 					   SVGA3dCmdHeader *header)
849 {
850 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetRenderTarget);
851 	struct vmw_resource *ctx;
852 	struct vmw_resource *res;
853 	int ret;
854 
855 	cmd = container_of(header, typeof(*cmd), header);
856 
857 	if (cmd->body.type >= SVGA3D_RT_MAX) {
858 		VMW_DEBUG_USER("Illegal render target type %u.\n",
859 			       (unsigned int) cmd->body.type);
860 		return -EINVAL;
861 	}
862 
863 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
864 				VMW_RES_DIRTY_SET, user_context_converter,
865 				&cmd->body.cid, &ctx);
866 	if (unlikely(ret != 0))
867 		return ret;
868 
869 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
870 				VMW_RES_DIRTY_SET, user_surface_converter,
871 				&cmd->body.target.sid, &res);
872 	if (unlikely(ret))
873 		return ret;
874 
875 	if (dev_priv->has_mob) {
876 		struct vmw_ctx_bindinfo_view binding;
877 		struct vmw_ctx_validation_info *node;
878 
879 		node = vmw_execbuf_info_from_res(sw_context, ctx);
880 		if (!node)
881 			return -EINVAL;
882 
883 		binding.bi.ctx = ctx;
884 		binding.bi.res = res;
885 		binding.bi.bt = vmw_ctx_binding_rt;
886 		binding.slot = cmd->body.type;
887 		vmw_binding_add(node->staged, &binding.bi, 0, binding.slot);
888 	}
889 
890 	return 0;
891 }
892 
893 static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
894 				      struct vmw_sw_context *sw_context,
895 				      SVGA3dCmdHeader *header)
896 {
897 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceCopy);
898 	int ret;
899 
900 	cmd = container_of(header, typeof(*cmd), header);
901 
902 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
903 				VMW_RES_DIRTY_NONE, user_surface_converter,
904 				&cmd->body.src.sid, NULL);
905 	if (ret)
906 		return ret;
907 
908 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
909 				 VMW_RES_DIRTY_SET, user_surface_converter,
910 				 &cmd->body.dest.sid, NULL);
911 }
912 
913 static int vmw_cmd_buffer_copy_check(struct vmw_private *dev_priv,
914 				     struct vmw_sw_context *sw_context,
915 				     SVGA3dCmdHeader *header)
916 {
917 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBufferCopy);
918 	int ret;
919 
920 	cmd = container_of(header, typeof(*cmd), header);
921 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
922 				VMW_RES_DIRTY_NONE, user_surface_converter,
923 				&cmd->body.src, NULL);
924 	if (ret != 0)
925 		return ret;
926 
927 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
928 				 VMW_RES_DIRTY_SET, user_surface_converter,
929 				 &cmd->body.dest, NULL);
930 }
931 
932 static int vmw_cmd_pred_copy_check(struct vmw_private *dev_priv,
933 				   struct vmw_sw_context *sw_context,
934 				   SVGA3dCmdHeader *header)
935 {
936 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXPredCopyRegion);
937 	int ret;
938 
939 	cmd = container_of(header, typeof(*cmd), header);
940 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
941 				VMW_RES_DIRTY_NONE, user_surface_converter,
942 				&cmd->body.srcSid, NULL);
943 	if (ret != 0)
944 		return ret;
945 
946 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
947 				 VMW_RES_DIRTY_SET, user_surface_converter,
948 				 &cmd->body.dstSid, NULL);
949 }
950 
951 static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
952 				     struct vmw_sw_context *sw_context,
953 				     SVGA3dCmdHeader *header)
954 {
955 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceStretchBlt);
956 	int ret;
957 
958 	cmd = container_of(header, typeof(*cmd), header);
959 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
960 				VMW_RES_DIRTY_NONE, user_surface_converter,
961 				&cmd->body.src.sid, NULL);
962 	if (unlikely(ret != 0))
963 		return ret;
964 
965 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
966 				 VMW_RES_DIRTY_SET, user_surface_converter,
967 				 &cmd->body.dest.sid, NULL);
968 }
969 
970 static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
971 					 struct vmw_sw_context *sw_context,
972 					 SVGA3dCmdHeader *header)
973 {
974 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBlitSurfaceToScreen) =
975 		container_of(header, typeof(*cmd), header);
976 
977 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
978 				 VMW_RES_DIRTY_NONE, user_surface_converter,
979 				 &cmd->body.srcImage.sid, NULL);
980 }
981 
982 static int vmw_cmd_present_check(struct vmw_private *dev_priv,
983 				 struct vmw_sw_context *sw_context,
984 				 SVGA3dCmdHeader *header)
985 {
986 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdPresent) =
987 		container_of(header, typeof(*cmd), header);
988 
989 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
990 				 VMW_RES_DIRTY_NONE, user_surface_converter,
991 				 &cmd->body.sid, NULL);
992 }
993 
994 /**
995  * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
996  *
997  * @dev_priv: The device private structure.
998  * @new_query_bo: The new buffer holding query results.
999  * @sw_context: The software context used for this command submission.
1000  *
1001  * This function checks whether @new_query_bo is suitable for holding query
1002  * results, and if another buffer currently is pinned for query results. If so,
1003  * the function prepares the state of @sw_context for switching pinned buffers
1004  * after successful submission of the current command batch.
1005  */
1006 static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
1007 				       struct vmw_bo *new_query_bo,
1008 				       struct vmw_sw_context *sw_context)
1009 {
1010 	struct vmw_res_cache_entry *ctx_entry =
1011 		&sw_context->res_cache[vmw_res_context];
1012 	int ret;
1013 
1014 	BUG_ON(!ctx_entry->valid);
1015 	sw_context->last_query_ctx = ctx_entry->res;
1016 
1017 	if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
1018 
1019 		if (unlikely(PFN_UP(new_query_bo->tbo.resource->size) > 4)) {
1020 			VMW_DEBUG_USER("Query buffer too large.\n");
1021 			return -EINVAL;
1022 		}
1023 
1024 		if (unlikely(sw_context->cur_query_bo != NULL)) {
1025 			sw_context->needs_post_query_barrier = true;
1026 			vmw_bo_placement_set_default_accelerated(sw_context->cur_query_bo);
1027 			ret = vmw_validation_add_bo(sw_context->ctx,
1028 						    sw_context->cur_query_bo);
1029 			if (unlikely(ret != 0))
1030 				return ret;
1031 		}
1032 		sw_context->cur_query_bo = new_query_bo;
1033 
1034 		vmw_bo_placement_set_default_accelerated(dev_priv->dummy_query_bo);
1035 		ret = vmw_validation_add_bo(sw_context->ctx,
1036 					    dev_priv->dummy_query_bo);
1037 		if (unlikely(ret != 0))
1038 			return ret;
1039 	}
1040 
1041 	return 0;
1042 }
1043 
1044 /**
1045  * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
1046  *
1047  * @dev_priv: The device private structure.
1048  * @sw_context: The software context used for this command submission batch.
1049  *
1050  * This function will check if we're switching query buffers, and will then,
1051  * issue a dummy occlusion query wait used as a query barrier. When the fence
1052  * object following that query wait has signaled, we are sure that all preceding
1053  * queries have finished, and the old query buffer can be unpinned. However,
1054  * since both the new query buffer and the old one are fenced with that fence,
1055  * we can do an asynchronus unpin now, and be sure that the old query buffer
1056  * won't be moved until the fence has signaled.
1057  *
1058  * As mentioned above, both the new - and old query buffers need to be fenced
1059  * using a sequence emitted *after* calling this function.
1060  */
1061 static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
1062 				     struct vmw_sw_context *sw_context)
1063 {
1064 	/*
1065 	 * The validate list should still hold references to all
1066 	 * contexts here.
1067 	 */
1068 	if (sw_context->needs_post_query_barrier) {
1069 		struct vmw_res_cache_entry *ctx_entry =
1070 			&sw_context->res_cache[vmw_res_context];
1071 		struct vmw_resource *ctx;
1072 		int ret;
1073 
1074 		BUG_ON(!ctx_entry->valid);
1075 		ctx = ctx_entry->res;
1076 
1077 		ret = vmw_cmd_emit_dummy_query(dev_priv, ctx->id);
1078 
1079 		if (unlikely(ret != 0))
1080 			VMW_DEBUG_USER("Out of fifo space for dummy query.\n");
1081 	}
1082 
1083 	if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
1084 		if (dev_priv->pinned_bo) {
1085 			vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
1086 			vmw_bo_unreference(&dev_priv->pinned_bo);
1087 		}
1088 
1089 		if (!sw_context->needs_post_query_barrier) {
1090 			vmw_bo_pin_reserved(sw_context->cur_query_bo, true);
1091 
1092 			/*
1093 			 * We pin also the dummy_query_bo buffer so that we
1094 			 * don't need to validate it when emitting dummy queries
1095 			 * in context destroy paths.
1096 			 */
1097 			if (!dev_priv->dummy_query_bo_pinned) {
1098 				vmw_bo_pin_reserved(dev_priv->dummy_query_bo,
1099 						    true);
1100 				dev_priv->dummy_query_bo_pinned = true;
1101 			}
1102 
1103 			BUG_ON(sw_context->last_query_ctx == NULL);
1104 			dev_priv->query_cid = sw_context->last_query_ctx->id;
1105 			dev_priv->query_cid_valid = true;
1106 			dev_priv->pinned_bo =
1107 				vmw_bo_reference(sw_context->cur_query_bo);
1108 		}
1109 	}
1110 }
1111 
1112 /**
1113  * vmw_translate_mob_ptr - Prepare to translate a user-space buffer handle
1114  * to a MOB id.
1115  *
1116  * @dev_priv: Pointer to a device private structure.
1117  * @sw_context: The software context used for this command batch validation.
1118  * @id: Pointer to the user-space handle to be translated.
1119  * @vmw_bo_p: Points to a location that, on successful return will carry a
1120  * non-reference-counted pointer to the buffer object identified by the
1121  * user-space handle in @id.
1122  *
1123  * This function saves information needed to translate a user-space buffer
1124  * handle to a MOB id. The translation does not take place immediately, but
1125  * during a call to vmw_apply_relocations().
1126  *
1127  * This function builds a relocation list and a list of buffers to validate. The
1128  * former needs to be freed using either vmw_apply_relocations() or
1129  * vmw_free_relocations(). The latter needs to be freed using
1130  * vmw_clear_validations.
1131  */
1132 static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
1133 				 struct vmw_sw_context *sw_context,
1134 				 SVGAMobId *id,
1135 				 struct vmw_bo **vmw_bo_p)
1136 {
1137 	struct vmw_bo *vmw_bo, *tmp_bo;
1138 	uint32_t handle = *id;
1139 	struct vmw_relocation *reloc;
1140 	int ret;
1141 
1142 	vmw_validation_preload_bo(sw_context->ctx);
1143 	ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
1144 	if (ret != 0) {
1145 		drm_dbg(&dev_priv->drm, "Could not find or use MOB buffer.\n");
1146 		return ret;
1147 	}
1148 	vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_MOB, VMW_BO_DOMAIN_MOB);
1149 	ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);
1150 	tmp_bo = vmw_bo;
1151 	vmw_user_bo_unref(&tmp_bo);
1152 	if (unlikely(ret != 0))
1153 		return ret;
1154 
1155 	reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
1156 	if (!reloc)
1157 		return -ENOMEM;
1158 
1159 	reloc->mob_loc = id;
1160 	reloc->vbo = vmw_bo;
1161 
1162 	*vmw_bo_p = vmw_bo;
1163 	list_add_tail(&reloc->head, &sw_context->bo_relocations);
1164 
1165 	return 0;
1166 }
1167 
1168 /**
1169  * vmw_translate_guest_ptr - Prepare to translate a user-space buffer handle
1170  * to a valid SVGAGuestPtr
1171  *
1172  * @dev_priv: Pointer to a device private structure.
1173  * @sw_context: The software context used for this command batch validation.
1174  * @ptr: Pointer to the user-space handle to be translated.
1175  * @vmw_bo_p: Points to a location that, on successful return will carry a
1176  * non-reference-counted pointer to the DMA buffer identified by the user-space
1177  * handle in @id.
1178  *
1179  * This function saves information needed to translate a user-space buffer
1180  * handle to a valid SVGAGuestPtr. The translation does not take place
1181  * immediately, but during a call to vmw_apply_relocations().
1182  *
1183  * This function builds a relocation list and a list of buffers to validate.
1184  * The former needs to be freed using either vmw_apply_relocations() or
1185  * vmw_free_relocations(). The latter needs to be freed using
1186  * vmw_clear_validations.
1187  */
1188 static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
1189 				   struct vmw_sw_context *sw_context,
1190 				   SVGAGuestPtr *ptr,
1191 				   struct vmw_bo **vmw_bo_p)
1192 {
1193 	struct vmw_bo *vmw_bo, *tmp_bo;
1194 	uint32_t handle = ptr->gmrId;
1195 	struct vmw_relocation *reloc;
1196 	int ret;
1197 
1198 	vmw_validation_preload_bo(sw_context->ctx);
1199 	ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
1200 	if (ret != 0) {
1201 		drm_dbg(&dev_priv->drm, "Could not find or use GMR region.\n");
1202 		return ret;
1203 	}
1204 	vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
1205 			     VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
1206 	ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);
1207 	tmp_bo = vmw_bo;
1208 	vmw_user_bo_unref(&tmp_bo);
1209 	if (unlikely(ret != 0))
1210 		return ret;
1211 
1212 	reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
1213 	if (!reloc)
1214 		return -ENOMEM;
1215 
1216 	reloc->location = ptr;
1217 	reloc->vbo = vmw_bo;
1218 	*vmw_bo_p = vmw_bo;
1219 	list_add_tail(&reloc->head, &sw_context->bo_relocations);
1220 
1221 	return 0;
1222 }
1223 
1224 /**
1225  * vmw_cmd_dx_define_query - validate SVGA_3D_CMD_DX_DEFINE_QUERY command.
1226  *
1227  * @dev_priv: Pointer to a device private struct.
1228  * @sw_context: The software context used for this command submission.
1229  * @header: Pointer to the command header in the command stream.
1230  *
1231  * This function adds the new query into the query COTABLE
1232  */
1233 static int vmw_cmd_dx_define_query(struct vmw_private *dev_priv,
1234 				   struct vmw_sw_context *sw_context,
1235 				   SVGA3dCmdHeader *header)
1236 {
1237 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineQuery);
1238 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
1239 	struct vmw_resource *cotable_res;
1240 	int ret;
1241 
1242 	if (!ctx_node)
1243 		return -EINVAL;
1244 
1245 	cmd = container_of(header, typeof(*cmd), header);
1246 
1247 	if (cmd->body.type <  SVGA3D_QUERYTYPE_MIN ||
1248 	    cmd->body.type >= SVGA3D_QUERYTYPE_MAX)
1249 		return -EINVAL;
1250 
1251 	cotable_res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXQUERY);
1252 	if (IS_ERR_OR_NULL(cotable_res))
1253 		return cotable_res ? PTR_ERR(cotable_res) : -EINVAL;
1254 	ret = vmw_cotable_notify(cotable_res, cmd->body.queryId);
1255 
1256 	return ret;
1257 }
1258 
1259 /**
1260  * vmw_cmd_dx_bind_query - validate SVGA_3D_CMD_DX_BIND_QUERY command.
1261  *
1262  * @dev_priv: Pointer to a device private struct.
1263  * @sw_context: The software context used for this command submission.
1264  * @header: Pointer to the command header in the command stream.
1265  *
1266  * The query bind operation will eventually associate the query ID with its
1267  * backing MOB.  In this function, we take the user mode MOB ID and use
1268  * vmw_translate_mob_ptr() to translate it to its kernel mode equivalent.
1269  */
1270 static int vmw_cmd_dx_bind_query(struct vmw_private *dev_priv,
1271 				 struct vmw_sw_context *sw_context,
1272 				 SVGA3dCmdHeader *header)
1273 {
1274 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindQuery);
1275 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
1276 	struct vmw_bo *vmw_bo;
1277 	int ret;
1278 
1279 	if (!ctx_node)
1280 		return -EINVAL;
1281 
1282 	cmd = container_of(header, typeof(*cmd), header);
1283 
1284 	/*
1285 	 * Look up the buffer pointed to by q.mobid, put it on the relocation
1286 	 * list so its kernel mode MOB ID can be filled in later
1287 	 */
1288 	ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
1289 				    &vmw_bo);
1290 
1291 	if (ret != 0)
1292 		return ret;
1293 
1294 	sw_context->dx_query_mob = vmw_bo;
1295 	sw_context->dx_query_ctx = ctx_node->ctx;
1296 	return 0;
1297 }
1298 
1299 /**
1300  * vmw_cmd_begin_gb_query - validate SVGA_3D_CMD_BEGIN_GB_QUERY command.
1301  *
1302  * @dev_priv: Pointer to a device private struct.
1303  * @sw_context: The software context used for this command submission.
1304  * @header: Pointer to the command header in the command stream.
1305  */
1306 static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
1307 				  struct vmw_sw_context *sw_context,
1308 				  SVGA3dCmdHeader *header)
1309 {
1310 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginGBQuery) =
1311 		container_of(header, typeof(*cmd), header);
1312 
1313 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1314 				 VMW_RES_DIRTY_SET, user_context_converter,
1315 				 &cmd->body.cid, NULL);
1316 }
1317 
1318 /**
1319  * vmw_cmd_begin_query - validate SVGA_3D_CMD_BEGIN_QUERY command.
1320  *
1321  * @dev_priv: Pointer to a device private struct.
1322  * @sw_context: The software context used for this command submission.
1323  * @header: Pointer to the command header in the command stream.
1324  */
1325 static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
1326 			       struct vmw_sw_context *sw_context,
1327 			       SVGA3dCmdHeader *header)
1328 {
1329 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginQuery) =
1330 		container_of(header, typeof(*cmd), header);
1331 
1332 	if (unlikely(dev_priv->has_mob)) {
1333 		VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdBeginGBQuery);
1334 
1335 		BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
1336 
1337 		gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
1338 		gb_cmd.header.size = cmd->header.size;
1339 		gb_cmd.body.cid = cmd->body.cid;
1340 		gb_cmd.body.type = cmd->body.type;
1341 
1342 		memcpy(cmd, &gb_cmd, sizeof(*cmd));
1343 		return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
1344 	}
1345 
1346 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1347 				 VMW_RES_DIRTY_SET, user_context_converter,
1348 				 &cmd->body.cid, NULL);
1349 }
1350 
1351 /**
1352  * vmw_cmd_end_gb_query - validate SVGA_3D_CMD_END_GB_QUERY command.
1353  *
1354  * @dev_priv: Pointer to a device private struct.
1355  * @sw_context: The software context used for this command submission.
1356  * @header: Pointer to the command header in the command stream.
1357  */
1358 static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
1359 				struct vmw_sw_context *sw_context,
1360 				SVGA3dCmdHeader *header)
1361 {
1362 	struct vmw_bo *vmw_bo;
1363 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndGBQuery);
1364 	int ret;
1365 
1366 	cmd = container_of(header, typeof(*cmd), header);
1367 	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1368 	if (unlikely(ret != 0))
1369 		return ret;
1370 
1371 	ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
1372 				    &vmw_bo);
1373 	if (unlikely(ret != 0))
1374 		return ret;
1375 
1376 	ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
1377 
1378 	return ret;
1379 }
1380 
1381 /**
1382  * vmw_cmd_end_query - validate SVGA_3D_CMD_END_QUERY command.
1383  *
1384  * @dev_priv: Pointer to a device private struct.
1385  * @sw_context: The software context used for this command submission.
1386  * @header: Pointer to the command header in the command stream.
1387  */
1388 static int vmw_cmd_end_query(struct vmw_private *dev_priv,
1389 			     struct vmw_sw_context *sw_context,
1390 			     SVGA3dCmdHeader *header)
1391 {
1392 	struct vmw_bo *vmw_bo;
1393 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndQuery);
1394 	int ret;
1395 
1396 	cmd = container_of(header, typeof(*cmd), header);
1397 	if (dev_priv->has_mob) {
1398 		VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdEndGBQuery);
1399 
1400 		BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
1401 
1402 		gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
1403 		gb_cmd.header.size = cmd->header.size;
1404 		gb_cmd.body.cid = cmd->body.cid;
1405 		gb_cmd.body.type = cmd->body.type;
1406 		gb_cmd.body.mobid = cmd->body.guestResult.gmrId;
1407 		gb_cmd.body.offset = cmd->body.guestResult.offset;
1408 
1409 		memcpy(cmd, &gb_cmd, sizeof(*cmd));
1410 		return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
1411 	}
1412 
1413 	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1414 	if (unlikely(ret != 0))
1415 		return ret;
1416 
1417 	ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1418 				      &cmd->body.guestResult, &vmw_bo);
1419 	if (unlikely(ret != 0))
1420 		return ret;
1421 
1422 	ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
1423 
1424 	return ret;
1425 }
1426 
1427 /**
1428  * vmw_cmd_wait_gb_query - validate SVGA_3D_CMD_WAIT_GB_QUERY command.
1429  *
1430  * @dev_priv: Pointer to a device private struct.
1431  * @sw_context: The software context used for this command submission.
1432  * @header: Pointer to the command header in the command stream.
1433  */
1434 static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
1435 				 struct vmw_sw_context *sw_context,
1436 				 SVGA3dCmdHeader *header)
1437 {
1438 	struct vmw_bo *vmw_bo;
1439 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForGBQuery);
1440 	int ret;
1441 
1442 	cmd = container_of(header, typeof(*cmd), header);
1443 	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1444 	if (unlikely(ret != 0))
1445 		return ret;
1446 
1447 	ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
1448 				    &vmw_bo);
1449 	if (unlikely(ret != 0))
1450 		return ret;
1451 
1452 	return 0;
1453 }
1454 
1455 /**
1456  * vmw_cmd_wait_query - validate SVGA_3D_CMD_WAIT_QUERY command.
1457  *
1458  * @dev_priv: Pointer to a device private struct.
1459  * @sw_context: The software context used for this command submission.
1460  * @header: Pointer to the command header in the command stream.
1461  */
1462 static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
1463 			      struct vmw_sw_context *sw_context,
1464 			      SVGA3dCmdHeader *header)
1465 {
1466 	struct vmw_bo *vmw_bo;
1467 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForQuery);
1468 	int ret;
1469 
1470 	cmd = container_of(header, typeof(*cmd), header);
1471 	if (dev_priv->has_mob) {
1472 		VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdWaitForGBQuery);
1473 
1474 		BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
1475 
1476 		gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
1477 		gb_cmd.header.size = cmd->header.size;
1478 		gb_cmd.body.cid = cmd->body.cid;
1479 		gb_cmd.body.type = cmd->body.type;
1480 		gb_cmd.body.mobid = cmd->body.guestResult.gmrId;
1481 		gb_cmd.body.offset = cmd->body.guestResult.offset;
1482 
1483 		memcpy(cmd, &gb_cmd, sizeof(*cmd));
1484 		return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
1485 	}
1486 
1487 	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1488 	if (unlikely(ret != 0))
1489 		return ret;
1490 
1491 	ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1492 				      &cmd->body.guestResult, &vmw_bo);
1493 	if (unlikely(ret != 0))
1494 		return ret;
1495 
1496 	return 0;
1497 }
1498 
1499 static int vmw_cmd_dma(struct vmw_private *dev_priv,
1500 		       struct vmw_sw_context *sw_context,
1501 		       SVGA3dCmdHeader *header)
1502 {
1503 	struct vmw_bo *vmw_bo = NULL;
1504 	struct vmw_resource *res;
1505 	struct vmw_surface *srf = NULL;
1506 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceDMA);
1507 	int ret;
1508 	SVGA3dCmdSurfaceDMASuffix *suffix;
1509 	uint32_t bo_size;
1510 	bool dirty;
1511 
1512 	cmd = container_of(header, typeof(*cmd), header);
1513 
1514 	if (unlikely(header->size < sizeof(cmd->body) + sizeof(*suffix))) {
1515 		VMW_DEBUG_USER("Illegal SVGA_3D_CMD_SURFACE_DMA size.\n");
1516 		return -EINVAL;
1517 	}
1518 
1519 	suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->body +
1520 					       header->size - sizeof(*suffix));
1521 
1522 	/* Make sure device and verifier stays in sync. */
1523 	if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
1524 		VMW_DEBUG_USER("Invalid DMA suffix size.\n");
1525 		return -EINVAL;
1526 	}
1527 
1528 	ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1529 				      &cmd->body.guest.ptr, &vmw_bo);
1530 	if (unlikely(ret != 0))
1531 		return ret;
1532 
1533 	/* Make sure DMA doesn't cross BO boundaries. */
1534 	bo_size = vmw_bo->tbo.base.size;
1535 	if (unlikely(cmd->body.guest.ptr.offset > bo_size)) {
1536 		VMW_DEBUG_USER("Invalid DMA offset.\n");
1537 		return -EINVAL;
1538 	}
1539 
1540 	bo_size -= cmd->body.guest.ptr.offset;
1541 	if (unlikely(suffix->maximumOffset > bo_size))
1542 		suffix->maximumOffset = bo_size;
1543 
1544 	dirty = (cmd->body.transfer == SVGA3D_WRITE_HOST_VRAM) ?
1545 		VMW_RES_DIRTY_SET : 0;
1546 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, dirty,
1547 				user_surface_converter, &cmd->body.host.sid,
1548 				NULL);
1549 	if (unlikely(ret != 0)) {
1550 		if (unlikely(ret != -ERESTARTSYS))
1551 			VMW_DEBUG_USER("could not find surface for DMA.\n");
1552 		return ret;
1553 	}
1554 
1555 	res = sw_context->res_cache[vmw_res_surface].res;
1556 	if (!res) {
1557 		VMW_DEBUG_USER("Invalid DMA surface.\n");
1558 		return -EINVAL;
1559 	}
1560 
1561 	srf = vmw_res_to_srf(res);
1562 	vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->tbo,
1563 			     header);
1564 
1565 	return 0;
1566 }
1567 
1568 static int vmw_cmd_draw(struct vmw_private *dev_priv,
1569 			struct vmw_sw_context *sw_context,
1570 			SVGA3dCmdHeader *header)
1571 {
1572 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDrawPrimitives);
1573 	SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
1574 		(unsigned long)header + sizeof(*cmd));
1575 	SVGA3dPrimitiveRange *range;
1576 	uint32_t i;
1577 	uint32_t maxnum;
1578 	int ret;
1579 
1580 	cmd = container_of(header, typeof(*cmd), header);
1581 
1582 	if (unlikely(header->size < sizeof(cmd->body))) {
1583 		VMW_DEBUG_USER("Illegal DRAW_PRIMITIVES header size.\n");
1584 		return -EINVAL;
1585 	}
1586 
1587 	ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1588 	if (unlikely(ret != 0))
1589 		return ret;
1590 
1591 	maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
1592 
1593 	if (unlikely(cmd->body.numVertexDecls > maxnum)) {
1594 		VMW_DEBUG_USER("Illegal number of vertex declarations.\n");
1595 		return -EINVAL;
1596 	}
1597 
1598 	for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
1599 		ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1600 					VMW_RES_DIRTY_NONE,
1601 					user_surface_converter,
1602 					&decl->array.surfaceId, NULL);
1603 		if (unlikely(ret != 0))
1604 			return ret;
1605 	}
1606 
1607 	maxnum = (header->size - sizeof(cmd->body) -
1608 		  cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
1609 	if (unlikely(cmd->body.numRanges > maxnum)) {
1610 		VMW_DEBUG_USER("Illegal number of index ranges.\n");
1611 		return -EINVAL;
1612 	}
1613 
1614 	range = (SVGA3dPrimitiveRange *) decl;
1615 	for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
1616 		ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1617 					VMW_RES_DIRTY_NONE,
1618 					user_surface_converter,
1619 					&range->indexArray.surfaceId, NULL);
1620 		if (unlikely(ret != 0))
1621 			return ret;
1622 	}
1623 	return 0;
1624 }
1625 
1626 static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
1627 			     struct vmw_sw_context *sw_context,
1628 			     SVGA3dCmdHeader *header)
1629 {
1630 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetTextureState);
1631 	SVGA3dTextureState *last_state = (SVGA3dTextureState *)
1632 	  ((unsigned long) header + header->size + sizeof(*header));
1633 	SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
1634 		((unsigned long) header + sizeof(*cmd));
1635 	struct vmw_resource *ctx;
1636 	struct vmw_resource *res;
1637 	int ret;
1638 
1639 	cmd = container_of(header, typeof(*cmd), header);
1640 
1641 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1642 				VMW_RES_DIRTY_SET, user_context_converter,
1643 				&cmd->body.cid, &ctx);
1644 	if (unlikely(ret != 0))
1645 		return ret;
1646 
1647 	for (; cur_state < last_state; ++cur_state) {
1648 		if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
1649 			continue;
1650 
1651 		if (cur_state->stage >= SVGA3D_NUM_TEXTURE_UNITS) {
1652 			VMW_DEBUG_USER("Illegal texture/sampler unit %u.\n",
1653 				       (unsigned int) cur_state->stage);
1654 			return -EINVAL;
1655 		}
1656 
1657 		ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1658 					VMW_RES_DIRTY_NONE,
1659 					user_surface_converter,
1660 					&cur_state->value, &res);
1661 		if (unlikely(ret != 0))
1662 			return ret;
1663 
1664 		if (dev_priv->has_mob) {
1665 			struct vmw_ctx_bindinfo_tex binding;
1666 			struct vmw_ctx_validation_info *node;
1667 
1668 			node = vmw_execbuf_info_from_res(sw_context, ctx);
1669 			if (!node)
1670 				return -EINVAL;
1671 
1672 			binding.bi.ctx = ctx;
1673 			binding.bi.res = res;
1674 			binding.bi.bt = vmw_ctx_binding_tex;
1675 			binding.texture_stage = cur_state->stage;
1676 			vmw_binding_add(node->staged, &binding.bi, 0,
1677 					binding.texture_stage);
1678 		}
1679 	}
1680 
1681 	return 0;
1682 }
1683 
1684 static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
1685 				      struct vmw_sw_context *sw_context,
1686 				      void *buf)
1687 {
1688 	struct vmw_bo *vmw_bo;
1689 
1690 	struct {
1691 		uint32_t header;
1692 		SVGAFifoCmdDefineGMRFB body;
1693 	} *cmd = buf;
1694 
1695 	return vmw_translate_guest_ptr(dev_priv, sw_context, &cmd->body.ptr,
1696 				       &vmw_bo);
1697 }
1698 
1699 /**
1700  * vmw_cmd_res_switch_backup - Utility function to handle backup buffer
1701  * switching
1702  *
1703  * @dev_priv: Pointer to a device private struct.
1704  * @sw_context: The software context being used for this batch.
1705  * @res: Pointer to the resource.
1706  * @buf_id: Pointer to the user-space backup buffer handle in the command
1707  * stream.
1708  * @backup_offset: Offset of backup into MOB.
1709  *
1710  * This function prepares for registering a switch of backup buffers in the
1711  * resource metadata just prior to unreserving. It's basically a wrapper around
1712  * vmw_cmd_res_switch_backup with a different interface.
1713  */
1714 static int vmw_cmd_res_switch_backup(struct vmw_private *dev_priv,
1715 				     struct vmw_sw_context *sw_context,
1716 				     struct vmw_resource *res, uint32_t *buf_id,
1717 				     unsigned long backup_offset)
1718 {
1719 	struct vmw_bo *vbo;
1720 	void *info;
1721 	int ret;
1722 
1723 	info = vmw_execbuf_info_from_res(sw_context, res);
1724 	if (!info)
1725 		return -EINVAL;
1726 
1727 	ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &vbo);
1728 	if (ret)
1729 		return ret;
1730 
1731 	vmw_validation_res_switch_backup(sw_context->ctx, info, vbo,
1732 					 backup_offset);
1733 	return 0;
1734 }
1735 
1736 /**
1737  * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
1738  *
1739  * @dev_priv: Pointer to a device private struct.
1740  * @sw_context: The software context being used for this batch.
1741  * @res_type: The resource type.
1742  * @converter: Information about user-space binding for this resource type.
1743  * @res_id: Pointer to the user-space resource handle in the command stream.
1744  * @buf_id: Pointer to the user-space backup buffer handle in the command
1745  * stream.
1746  * @backup_offset: Offset of backup into MOB.
1747  *
1748  * This function prepares for registering a switch of backup buffers in the
1749  * resource metadata just prior to unreserving. It's basically a wrapper around
1750  * vmw_cmd_res_switch_backup with a different interface.
1751  */
1752 static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
1753 				 struct vmw_sw_context *sw_context,
1754 				 enum vmw_res_type res_type,
1755 				 const struct vmw_user_resource_conv
1756 				 *converter, uint32_t *res_id, uint32_t *buf_id,
1757 				 unsigned long backup_offset)
1758 {
1759 	struct vmw_resource *res;
1760 	int ret;
1761 
1762 	ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
1763 				VMW_RES_DIRTY_NONE, converter, res_id, &res);
1764 	if (ret)
1765 		return ret;
1766 
1767 	return vmw_cmd_res_switch_backup(dev_priv, sw_context, res, buf_id,
1768 					 backup_offset);
1769 }
1770 
1771 /**
1772  * vmw_cmd_bind_gb_surface - Validate SVGA_3D_CMD_BIND_GB_SURFACE command
1773  *
1774  * @dev_priv: Pointer to a device private struct.
1775  * @sw_context: The software context being used for this batch.
1776  * @header: Pointer to the command header in the command stream.
1777  */
1778 static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
1779 				   struct vmw_sw_context *sw_context,
1780 				   SVGA3dCmdHeader *header)
1781 {
1782 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBSurface) =
1783 		container_of(header, typeof(*cmd), header);
1784 
1785 	return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
1786 				     user_surface_converter, &cmd->body.sid,
1787 				     &cmd->body.mobid, 0);
1788 }
1789 
1790 /**
1791  * vmw_cmd_update_gb_image - Validate SVGA_3D_CMD_UPDATE_GB_IMAGE command
1792  *
1793  * @dev_priv: Pointer to a device private struct.
1794  * @sw_context: The software context being used for this batch.
1795  * @header: Pointer to the command header in the command stream.
1796  */
1797 static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
1798 				   struct vmw_sw_context *sw_context,
1799 				   SVGA3dCmdHeader *header)
1800 {
1801 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBImage) =
1802 		container_of(header, typeof(*cmd), header);
1803 
1804 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1805 				 VMW_RES_DIRTY_NONE, user_surface_converter,
1806 				 &cmd->body.image.sid, NULL);
1807 }
1808 
1809 /**
1810  * vmw_cmd_update_gb_surface - Validate SVGA_3D_CMD_UPDATE_GB_SURFACE command
1811  *
1812  * @dev_priv: Pointer to a device private struct.
1813  * @sw_context: The software context being used for this batch.
1814  * @header: Pointer to the command header in the command stream.
1815  */
1816 static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
1817 				     struct vmw_sw_context *sw_context,
1818 				     SVGA3dCmdHeader *header)
1819 {
1820 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBSurface) =
1821 		container_of(header, typeof(*cmd), header);
1822 
1823 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1824 				 VMW_RES_DIRTY_CLEAR, user_surface_converter,
1825 				 &cmd->body.sid, NULL);
1826 }
1827 
1828 /**
1829  * vmw_cmd_readback_gb_image - Validate SVGA_3D_CMD_READBACK_GB_IMAGE command
1830  *
1831  * @dev_priv: Pointer to a device private struct.
1832  * @sw_context: The software context being used for this batch.
1833  * @header: Pointer to the command header in the command stream.
1834  */
1835 static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
1836 				     struct vmw_sw_context *sw_context,
1837 				     SVGA3dCmdHeader *header)
1838 {
1839 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBImage) =
1840 		container_of(header, typeof(*cmd), header);
1841 
1842 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1843 				 VMW_RES_DIRTY_NONE, user_surface_converter,
1844 				 &cmd->body.image.sid, NULL);
1845 }
1846 
1847 /**
1848  * vmw_cmd_readback_gb_surface - Validate SVGA_3D_CMD_READBACK_GB_SURFACE
1849  * command
1850  *
1851  * @dev_priv: Pointer to a device private struct.
1852  * @sw_context: The software context being used for this batch.
1853  * @header: Pointer to the command header in the command stream.
1854  */
1855 static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
1856 				       struct vmw_sw_context *sw_context,
1857 				       SVGA3dCmdHeader *header)
1858 {
1859 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBSurface) =
1860 		container_of(header, typeof(*cmd), header);
1861 
1862 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1863 				 VMW_RES_DIRTY_CLEAR, user_surface_converter,
1864 				 &cmd->body.sid, NULL);
1865 }
1866 
1867 /**
1868  * vmw_cmd_invalidate_gb_image - Validate SVGA_3D_CMD_INVALIDATE_GB_IMAGE
1869  * command
1870  *
1871  * @dev_priv: Pointer to a device private struct.
1872  * @sw_context: The software context being used for this batch.
1873  * @header: Pointer to the command header in the command stream.
1874  */
1875 static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
1876 				       struct vmw_sw_context *sw_context,
1877 				       SVGA3dCmdHeader *header)
1878 {
1879 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBImage) =
1880 		container_of(header, typeof(*cmd), header);
1881 
1882 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1883 				 VMW_RES_DIRTY_NONE, user_surface_converter,
1884 				 &cmd->body.image.sid, NULL);
1885 }
1886 
1887 /**
1888  * vmw_cmd_invalidate_gb_surface - Validate SVGA_3D_CMD_INVALIDATE_GB_SURFACE
1889  * command
1890  *
1891  * @dev_priv: Pointer to a device private struct.
1892  * @sw_context: The software context being used for this batch.
1893  * @header: Pointer to the command header in the command stream.
1894  */
1895 static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
1896 					 struct vmw_sw_context *sw_context,
1897 					 SVGA3dCmdHeader *header)
1898 {
1899 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBSurface) =
1900 		container_of(header, typeof(*cmd), header);
1901 
1902 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1903 				 VMW_RES_DIRTY_CLEAR, user_surface_converter,
1904 				 &cmd->body.sid, NULL);
1905 }
1906 
1907 /**
1908  * vmw_cmd_shader_define - Validate SVGA_3D_CMD_SHADER_DEFINE command
1909  *
1910  * @dev_priv: Pointer to a device private struct.
1911  * @sw_context: The software context being used for this batch.
1912  * @header: Pointer to the command header in the command stream.
1913  */
1914 static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
1915 				 struct vmw_sw_context *sw_context,
1916 				 SVGA3dCmdHeader *header)
1917 {
1918 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDefineShader);
1919 	int ret;
1920 	size_t size;
1921 	struct vmw_resource *ctx;
1922 
1923 	cmd = container_of(header, typeof(*cmd), header);
1924 
1925 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1926 				VMW_RES_DIRTY_SET, user_context_converter,
1927 				&cmd->body.cid, &ctx);
1928 	if (unlikely(ret != 0))
1929 		return ret;
1930 
1931 	if (unlikely(!dev_priv->has_mob))
1932 		return 0;
1933 
1934 	size = cmd->header.size - sizeof(cmd->body);
1935 	ret = vmw_compat_shader_add(dev_priv, vmw_context_res_man(ctx),
1936 				    cmd->body.shid, cmd + 1, cmd->body.type,
1937 				    size, &sw_context->staged_cmd_res);
1938 	if (unlikely(ret != 0))
1939 		return ret;
1940 
1941 	return vmw_resource_relocation_add(sw_context, NULL,
1942 					   vmw_ptr_diff(sw_context->buf_start,
1943 							&cmd->header.id),
1944 					   vmw_res_rel_nop);
1945 }
1946 
1947 /**
1948  * vmw_cmd_shader_destroy - Validate SVGA_3D_CMD_SHADER_DESTROY command
1949  *
1950  * @dev_priv: Pointer to a device private struct.
1951  * @sw_context: The software context being used for this batch.
1952  * @header: Pointer to the command header in the command stream.
1953  */
1954 static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
1955 				  struct vmw_sw_context *sw_context,
1956 				  SVGA3dCmdHeader *header)
1957 {
1958 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDestroyShader);
1959 	int ret;
1960 	struct vmw_resource *ctx;
1961 
1962 	cmd = container_of(header, typeof(*cmd), header);
1963 
1964 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1965 				VMW_RES_DIRTY_SET, user_context_converter,
1966 				&cmd->body.cid, &ctx);
1967 	if (unlikely(ret != 0))
1968 		return ret;
1969 
1970 	if (unlikely(!dev_priv->has_mob))
1971 		return 0;
1972 
1973 	ret = vmw_shader_remove(vmw_context_res_man(ctx), cmd->body.shid,
1974 				cmd->body.type, &sw_context->staged_cmd_res);
1975 	if (unlikely(ret != 0))
1976 		return ret;
1977 
1978 	return vmw_resource_relocation_add(sw_context, NULL,
1979 					   vmw_ptr_diff(sw_context->buf_start,
1980 							&cmd->header.id),
1981 					   vmw_res_rel_nop);
1982 }
1983 
1984 /**
1985  * vmw_cmd_set_shader - Validate SVGA_3D_CMD_SET_SHADER command
1986  *
1987  * @dev_priv: Pointer to a device private struct.
1988  * @sw_context: The software context being used for this batch.
1989  * @header: Pointer to the command header in the command stream.
1990  */
1991 static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
1992 			      struct vmw_sw_context *sw_context,
1993 			      SVGA3dCmdHeader *header)
1994 {
1995 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShader);
1996 	struct vmw_ctx_bindinfo_shader binding;
1997 	struct vmw_resource *ctx, *res = NULL;
1998 	struct vmw_ctx_validation_info *ctx_info;
1999 	int ret;
2000 
2001 	cmd = container_of(header, typeof(*cmd), header);
2002 
2003 	if (!vmw_shadertype_is_valid(VMW_SM_LEGACY, cmd->body.type)) {
2004 		VMW_DEBUG_USER("Illegal shader type %u.\n",
2005 			       (unsigned int) cmd->body.type);
2006 		return -EINVAL;
2007 	}
2008 
2009 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
2010 				VMW_RES_DIRTY_SET, user_context_converter,
2011 				&cmd->body.cid, &ctx);
2012 	if (unlikely(ret != 0))
2013 		return ret;
2014 
2015 	if (!dev_priv->has_mob)
2016 		return 0;
2017 
2018 	if (cmd->body.shid != SVGA3D_INVALID_ID) {
2019 		/*
2020 		 * This is the compat shader path - Per device guest-backed
2021 		 * shaders, but user-space thinks it's per context host-
2022 		 * backed shaders.
2023 		 */
2024 		res = vmw_shader_lookup(vmw_context_res_man(ctx),
2025 					cmd->body.shid, cmd->body.type);
2026 		if (!IS_ERR(res)) {
2027 			ret = vmw_execbuf_res_val_add(sw_context, res,
2028 						      VMW_RES_DIRTY_NONE,
2029 						      vmw_val_add_flag_noctx);
2030 			if (unlikely(ret != 0))
2031 				return ret;
2032 
2033 			ret = vmw_resource_relocation_add
2034 				(sw_context, res,
2035 				 vmw_ptr_diff(sw_context->buf_start,
2036 					      &cmd->body.shid),
2037 				 vmw_res_rel_normal);
2038 			if (unlikely(ret != 0))
2039 				return ret;
2040 		}
2041 	}
2042 
2043 	if (IS_ERR_OR_NULL(res)) {
2044 		ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_shader,
2045 					VMW_RES_DIRTY_NONE,
2046 					user_shader_converter, &cmd->body.shid,
2047 					&res);
2048 		if (unlikely(ret != 0))
2049 			return ret;
2050 	}
2051 
2052 	ctx_info = vmw_execbuf_info_from_res(sw_context, ctx);
2053 	if (!ctx_info)
2054 		return -EINVAL;
2055 
2056 	binding.bi.ctx = ctx;
2057 	binding.bi.res = res;
2058 	binding.bi.bt = vmw_ctx_binding_shader;
2059 	binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
2060 	vmw_binding_add(ctx_info->staged, &binding.bi, binding.shader_slot, 0);
2061 
2062 	return 0;
2063 }
2064 
2065 /**
2066  * vmw_cmd_set_shader_const - Validate SVGA_3D_CMD_SET_SHADER_CONST command
2067  *
2068  * @dev_priv: Pointer to a device private struct.
2069  * @sw_context: The software context being used for this batch.
2070  * @header: Pointer to the command header in the command stream.
2071  */
2072 static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
2073 				    struct vmw_sw_context *sw_context,
2074 				    SVGA3dCmdHeader *header)
2075 {
2076 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShaderConst);
2077 	int ret;
2078 
2079 	cmd = container_of(header, typeof(*cmd), header);
2080 
2081 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
2082 				VMW_RES_DIRTY_SET, user_context_converter,
2083 				&cmd->body.cid, NULL);
2084 	if (unlikely(ret != 0))
2085 		return ret;
2086 
2087 	if (dev_priv->has_mob)
2088 		header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
2089 
2090 	return 0;
2091 }
2092 
2093 /**
2094  * vmw_cmd_bind_gb_shader - Validate SVGA_3D_CMD_BIND_GB_SHADER command
2095  *
2096  * @dev_priv: Pointer to a device private struct.
2097  * @sw_context: The software context being used for this batch.
2098  * @header: Pointer to the command header in the command stream.
2099  */
2100 static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
2101 				  struct vmw_sw_context *sw_context,
2102 				  SVGA3dCmdHeader *header)
2103 {
2104 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBShader) =
2105 		container_of(header, typeof(*cmd), header);
2106 
2107 	return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
2108 				     user_shader_converter, &cmd->body.shid,
2109 				     &cmd->body.mobid, cmd->body.offsetInBytes);
2110 }
2111 
2112 /**
2113  * vmw_cmd_dx_set_single_constant_buffer - Validate
2114  * SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER command.
2115  *
2116  * @dev_priv: Pointer to a device private struct.
2117  * @sw_context: The software context being used for this batch.
2118  * @header: Pointer to the command header in the command stream.
2119  */
2120 static int
2121 vmw_cmd_dx_set_single_constant_buffer(struct vmw_private *dev_priv,
2122 				      struct vmw_sw_context *sw_context,
2123 				      SVGA3dCmdHeader *header)
2124 {
2125 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetSingleConstantBuffer);
2126 
2127 	struct vmw_resource *res = NULL;
2128 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2129 	struct vmw_ctx_bindinfo_cb binding;
2130 	int ret;
2131 
2132 	if (!ctx_node)
2133 		return -EINVAL;
2134 
2135 	cmd = container_of(header, typeof(*cmd), header);
2136 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2137 				VMW_RES_DIRTY_NONE, user_surface_converter,
2138 				&cmd->body.sid, &res);
2139 	if (unlikely(ret != 0))
2140 		return ret;
2141 
2142 	if (!vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type) ||
2143 	    cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
2144 		VMW_DEBUG_USER("Illegal const buffer shader %u slot %u.\n",
2145 			       (unsigned int) cmd->body.type,
2146 			       (unsigned int) cmd->body.slot);
2147 		return -EINVAL;
2148 	}
2149 
2150 	binding.bi.ctx = ctx_node->ctx;
2151 	binding.bi.res = res;
2152 	binding.bi.bt = vmw_ctx_binding_cb;
2153 	binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
2154 	binding.offset = cmd->body.offsetInBytes;
2155 	binding.size = cmd->body.sizeInBytes;
2156 	binding.slot = cmd->body.slot;
2157 
2158 	vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot,
2159 			binding.slot);
2160 
2161 	return 0;
2162 }
2163 
2164 /**
2165  * vmw_cmd_dx_set_constant_buffer_offset - Validate
2166  * SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET command.
2167  *
2168  * @dev_priv: Pointer to a device private struct.
2169  * @sw_context: The software context being used for this batch.
2170  * @header: Pointer to the command header in the command stream.
2171  */
2172 static int
2173 vmw_cmd_dx_set_constant_buffer_offset(struct vmw_private *dev_priv,
2174 				      struct vmw_sw_context *sw_context,
2175 				      SVGA3dCmdHeader *header)
2176 {
2177 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetConstantBufferOffset);
2178 
2179 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2180 	u32 shader_slot;
2181 
2182 	if (!has_sm5_context(dev_priv))
2183 		return -EINVAL;
2184 
2185 	if (!ctx_node)
2186 		return -EINVAL;
2187 
2188 	cmd = container_of(header, typeof(*cmd), header);
2189 	if (cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
2190 		VMW_DEBUG_USER("Illegal const buffer slot %u.\n",
2191 			       (unsigned int) cmd->body.slot);
2192 		return -EINVAL;
2193 	}
2194 
2195 	shader_slot = cmd->header.id - SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET;
2196 	vmw_binding_cb_offset_update(ctx_node->staged, shader_slot,
2197 				     cmd->body.slot, cmd->body.offsetInBytes);
2198 
2199 	return 0;
2200 }
2201 
2202 /**
2203  * vmw_cmd_dx_set_shader_res - Validate SVGA_3D_CMD_DX_SET_SHADER_RESOURCES
2204  * command
2205  *
2206  * @dev_priv: Pointer to a device private struct.
2207  * @sw_context: The software context being used for this batch.
2208  * @header: Pointer to the command header in the command stream.
2209  */
2210 static int vmw_cmd_dx_set_shader_res(struct vmw_private *dev_priv,
2211 				     struct vmw_sw_context *sw_context,
2212 				     SVGA3dCmdHeader *header)
2213 {
2214 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShaderResources) =
2215 		container_of(header, typeof(*cmd), header);
2216 
2217 	u32 num_sr_view = (cmd->header.size - sizeof(cmd->body)) /
2218 		sizeof(SVGA3dShaderResourceViewId);
2219 
2220 	if ((u64) cmd->body.startView + (u64) num_sr_view >
2221 	    (u64) SVGA3D_DX_MAX_SRVIEWS ||
2222 	    !vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type)) {
2223 		VMW_DEBUG_USER("Invalid shader binding.\n");
2224 		return -EINVAL;
2225 	}
2226 
2227 	return vmw_view_bindings_add(sw_context, vmw_view_sr,
2228 				     vmw_ctx_binding_sr,
2229 				     cmd->body.type - SVGA3D_SHADERTYPE_MIN,
2230 				     (void *) &cmd[1], num_sr_view,
2231 				     cmd->body.startView);
2232 }
2233 
2234 /**
2235  * vmw_cmd_dx_set_shader - Validate SVGA_3D_CMD_DX_SET_SHADER command
2236  *
2237  * @dev_priv: Pointer to a device private struct.
2238  * @sw_context: The software context being used for this batch.
2239  * @header: Pointer to the command header in the command stream.
2240  */
2241 static int vmw_cmd_dx_set_shader(struct vmw_private *dev_priv,
2242 				 struct vmw_sw_context *sw_context,
2243 				 SVGA3dCmdHeader *header)
2244 {
2245 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShader);
2246 	struct vmw_resource *res = NULL;
2247 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2248 	struct vmw_ctx_bindinfo_shader binding;
2249 	int ret = 0;
2250 
2251 	if (!ctx_node)
2252 		return -EINVAL;
2253 
2254 	cmd = container_of(header, typeof(*cmd), header);
2255 
2256 	if (!vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type)) {
2257 		VMW_DEBUG_USER("Illegal shader type %u.\n",
2258 			       (unsigned int) cmd->body.type);
2259 		return -EINVAL;
2260 	}
2261 
2262 	if (cmd->body.shaderId != SVGA3D_INVALID_ID) {
2263 		res = vmw_shader_lookup(sw_context->man, cmd->body.shaderId, 0);
2264 		if (IS_ERR(res)) {
2265 			VMW_DEBUG_USER("Could not find shader for binding.\n");
2266 			return PTR_ERR(res);
2267 		}
2268 
2269 		ret = vmw_execbuf_res_val_add(sw_context, res,
2270 					      VMW_RES_DIRTY_NONE,
2271 					      vmw_val_add_flag_noctx);
2272 		if (ret)
2273 			return ret;
2274 	}
2275 
2276 	binding.bi.ctx = ctx_node->ctx;
2277 	binding.bi.res = res;
2278 	binding.bi.bt = vmw_ctx_binding_dx_shader;
2279 	binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
2280 
2281 	vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot, 0);
2282 
2283 	return 0;
2284 }
2285 
2286 /**
2287  * vmw_cmd_dx_set_vertex_buffers - Validates SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS
2288  * command
2289  *
2290  * @dev_priv: Pointer to a device private struct.
2291  * @sw_context: The software context being used for this batch.
2292  * @header: Pointer to the command header in the command stream.
2293  */
2294 static int vmw_cmd_dx_set_vertex_buffers(struct vmw_private *dev_priv,
2295 					 struct vmw_sw_context *sw_context,
2296 					 SVGA3dCmdHeader *header)
2297 {
2298 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2299 	struct vmw_ctx_bindinfo_vb binding;
2300 	struct vmw_resource *res;
2301 	struct {
2302 		SVGA3dCmdHeader header;
2303 		SVGA3dCmdDXSetVertexBuffers body;
2304 		SVGA3dVertexBuffer buf[];
2305 	} *cmd;
2306 	int i, ret, num;
2307 
2308 	if (!ctx_node)
2309 		return -EINVAL;
2310 
2311 	cmd = container_of(header, typeof(*cmd), header);
2312 	num = (cmd->header.size - sizeof(cmd->body)) /
2313 		sizeof(SVGA3dVertexBuffer);
2314 	if ((u64)num + (u64)cmd->body.startBuffer >
2315 	    (u64)SVGA3D_DX_MAX_VERTEXBUFFERS) {
2316 		VMW_DEBUG_USER("Invalid number of vertex buffers.\n");
2317 		return -EINVAL;
2318 	}
2319 
2320 	for (i = 0; i < num; i++) {
2321 		ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2322 					VMW_RES_DIRTY_NONE,
2323 					user_surface_converter,
2324 					&cmd->buf[i].sid, &res);
2325 		if (unlikely(ret != 0))
2326 			return ret;
2327 
2328 		binding.bi.ctx = ctx_node->ctx;
2329 		binding.bi.bt = vmw_ctx_binding_vb;
2330 		binding.bi.res = res;
2331 		binding.offset = cmd->buf[i].offset;
2332 		binding.stride = cmd->buf[i].stride;
2333 		binding.slot = i + cmd->body.startBuffer;
2334 
2335 		vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot);
2336 	}
2337 
2338 	return 0;
2339 }
2340 
2341 /**
2342  * vmw_cmd_dx_set_index_buffer - Validate
2343  * SVGA_3D_CMD_DX_IA_SET_INDEX_BUFFER command.
2344  *
2345  * @dev_priv: Pointer to a device private struct.
2346  * @sw_context: The software context being used for this batch.
2347  * @header: Pointer to the command header in the command stream.
2348  */
2349 static int vmw_cmd_dx_set_index_buffer(struct vmw_private *dev_priv,
2350 				       struct vmw_sw_context *sw_context,
2351 				       SVGA3dCmdHeader *header)
2352 {
2353 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2354 	struct vmw_ctx_bindinfo_ib binding;
2355 	struct vmw_resource *res;
2356 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetIndexBuffer);
2357 	int ret;
2358 
2359 	if (!ctx_node)
2360 		return -EINVAL;
2361 
2362 	cmd = container_of(header, typeof(*cmd), header);
2363 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2364 				VMW_RES_DIRTY_NONE, user_surface_converter,
2365 				&cmd->body.sid, &res);
2366 	if (unlikely(ret != 0))
2367 		return ret;
2368 
2369 	binding.bi.ctx = ctx_node->ctx;
2370 	binding.bi.res = res;
2371 	binding.bi.bt = vmw_ctx_binding_ib;
2372 	binding.offset = cmd->body.offset;
2373 	binding.format = cmd->body.format;
2374 
2375 	vmw_binding_add(ctx_node->staged, &binding.bi, 0, 0);
2376 
2377 	return 0;
2378 }
2379 
2380 /**
2381  * vmw_cmd_dx_set_rendertargets - Validate SVGA_3D_CMD_DX_SET_RENDERTARGETS
2382  * command
2383  *
2384  * @dev_priv: Pointer to a device private struct.
2385  * @sw_context: The software context being used for this batch.
2386  * @header: Pointer to the command header in the command stream.
2387  */
2388 static int vmw_cmd_dx_set_rendertargets(struct vmw_private *dev_priv,
2389 					struct vmw_sw_context *sw_context,
2390 					SVGA3dCmdHeader *header)
2391 {
2392 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetRenderTargets) =
2393 		container_of(header, typeof(*cmd), header);
2394 	u32 num_rt_view = (cmd->header.size - sizeof(cmd->body)) /
2395 		sizeof(SVGA3dRenderTargetViewId);
2396 	int ret;
2397 
2398 	if (num_rt_view > SVGA3D_DX_MAX_RENDER_TARGETS) {
2399 		VMW_DEBUG_USER("Invalid DX Rendertarget binding.\n");
2400 		return -EINVAL;
2401 	}
2402 
2403 	ret = vmw_view_bindings_add(sw_context, vmw_view_ds, vmw_ctx_binding_ds,
2404 				    0, &cmd->body.depthStencilViewId, 1, 0);
2405 	if (ret)
2406 		return ret;
2407 
2408 	return vmw_view_bindings_add(sw_context, vmw_view_rt,
2409 				     vmw_ctx_binding_dx_rt, 0, (void *)&cmd[1],
2410 				     num_rt_view, 0);
2411 }
2412 
2413 /**
2414  * vmw_cmd_dx_clear_rendertarget_view - Validate
2415  * SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW command
2416  *
2417  * @dev_priv: Pointer to a device private struct.
2418  * @sw_context: The software context being used for this batch.
2419  * @header: Pointer to the command header in the command stream.
2420  */
2421 static int vmw_cmd_dx_clear_rendertarget_view(struct vmw_private *dev_priv,
2422 					      struct vmw_sw_context *sw_context,
2423 					      SVGA3dCmdHeader *header)
2424 {
2425 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearRenderTargetView) =
2426 		container_of(header, typeof(*cmd), header);
2427 	struct vmw_resource *ret;
2428 
2429 	ret = vmw_view_id_val_add(sw_context, vmw_view_rt,
2430 				  cmd->body.renderTargetViewId);
2431 
2432 	return PTR_ERR_OR_ZERO(ret);
2433 }
2434 
2435 /**
2436  * vmw_cmd_dx_clear_depthstencil_view - Validate
2437  * SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW command
2438  *
2439  * @dev_priv: Pointer to a device private struct.
2440  * @sw_context: The software context being used for this batch.
2441  * @header: Pointer to the command header in the command stream.
2442  */
2443 static int vmw_cmd_dx_clear_depthstencil_view(struct vmw_private *dev_priv,
2444 					      struct vmw_sw_context *sw_context,
2445 					      SVGA3dCmdHeader *header)
2446 {
2447 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearDepthStencilView) =
2448 		container_of(header, typeof(*cmd), header);
2449 	struct vmw_resource *ret;
2450 
2451 	ret = vmw_view_id_val_add(sw_context, vmw_view_ds,
2452 				  cmd->body.depthStencilViewId);
2453 
2454 	return PTR_ERR_OR_ZERO(ret);
2455 }
2456 
2457 static int vmw_cmd_dx_view_define(struct vmw_private *dev_priv,
2458 				  struct vmw_sw_context *sw_context,
2459 				  SVGA3dCmdHeader *header)
2460 {
2461 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2462 	struct vmw_resource *srf;
2463 	struct vmw_resource *res;
2464 	enum vmw_view_type view_type;
2465 	int ret;
2466 	/*
2467 	 * This is based on the fact that all affected define commands have the
2468 	 * same initial command body layout.
2469 	 */
2470 	struct {
2471 		SVGA3dCmdHeader header;
2472 		uint32 defined_id;
2473 		uint32 sid;
2474 	} *cmd;
2475 
2476 	if (!ctx_node)
2477 		return -EINVAL;
2478 
2479 	view_type = vmw_view_cmd_to_type(header->id);
2480 	if (view_type == vmw_view_max)
2481 		return -EINVAL;
2482 
2483 	cmd = container_of(header, typeof(*cmd), header);
2484 	if (unlikely(cmd->sid == SVGA3D_INVALID_ID)) {
2485 		VMW_DEBUG_USER("Invalid surface id.\n");
2486 		return -EINVAL;
2487 	}
2488 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2489 				VMW_RES_DIRTY_NONE, user_surface_converter,
2490 				&cmd->sid, &srf);
2491 	if (unlikely(ret != 0))
2492 		return ret;
2493 
2494 	res = vmw_context_cotable(ctx_node->ctx, vmw_view_cotables[view_type]);
2495 	if (IS_ERR_OR_NULL(res))
2496 		return res ? PTR_ERR(res) : -EINVAL;
2497 	ret = vmw_cotable_notify(res, cmd->defined_id);
2498 	if (unlikely(ret != 0))
2499 		return ret;
2500 
2501 	return vmw_view_add(sw_context->man, ctx_node->ctx, srf, view_type,
2502 			    cmd->defined_id, header,
2503 			    header->size + sizeof(*header),
2504 			    &sw_context->staged_cmd_res);
2505 }
2506 
2507 /**
2508  * vmw_cmd_dx_set_so_targets - Validate SVGA_3D_CMD_DX_SET_SOTARGETS command.
2509  *
2510  * @dev_priv: Pointer to a device private struct.
2511  * @sw_context: The software context being used for this batch.
2512  * @header: Pointer to the command header in the command stream.
2513  */
2514 static int vmw_cmd_dx_set_so_targets(struct vmw_private *dev_priv,
2515 				     struct vmw_sw_context *sw_context,
2516 				     SVGA3dCmdHeader *header)
2517 {
2518 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2519 	struct vmw_ctx_bindinfo_so_target binding;
2520 	struct vmw_resource *res;
2521 	struct {
2522 		SVGA3dCmdHeader header;
2523 		SVGA3dCmdDXSetSOTargets body;
2524 		SVGA3dSoTarget targets[];
2525 	} *cmd;
2526 	int i, ret, num;
2527 
2528 	if (!ctx_node)
2529 		return -EINVAL;
2530 
2531 	cmd = container_of(header, typeof(*cmd), header);
2532 	num = (cmd->header.size - sizeof(cmd->body)) / sizeof(SVGA3dSoTarget);
2533 
2534 	if (num > SVGA3D_DX_MAX_SOTARGETS) {
2535 		VMW_DEBUG_USER("Invalid DX SO binding.\n");
2536 		return -EINVAL;
2537 	}
2538 
2539 	for (i = 0; i < num; i++) {
2540 		ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2541 					VMW_RES_DIRTY_SET,
2542 					user_surface_converter,
2543 					&cmd->targets[i].sid, &res);
2544 		if (unlikely(ret != 0))
2545 			return ret;
2546 
2547 		binding.bi.ctx = ctx_node->ctx;
2548 		binding.bi.res = res;
2549 		binding.bi.bt = vmw_ctx_binding_so_target;
2550 		binding.offset = cmd->targets[i].offset;
2551 		binding.size = cmd->targets[i].sizeInBytes;
2552 		binding.slot = i;
2553 
2554 		vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot);
2555 	}
2556 
2557 	return 0;
2558 }
2559 
2560 static int vmw_cmd_dx_so_define(struct vmw_private *dev_priv,
2561 				struct vmw_sw_context *sw_context,
2562 				SVGA3dCmdHeader *header)
2563 {
2564 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2565 	struct vmw_resource *res;
2566 	/*
2567 	 * This is based on the fact that all affected define commands have
2568 	 * the same initial command body layout.
2569 	 */
2570 	struct {
2571 		SVGA3dCmdHeader header;
2572 		uint32 defined_id;
2573 	} *cmd;
2574 	enum vmw_so_type so_type;
2575 	int ret;
2576 
2577 	if (!ctx_node)
2578 		return -EINVAL;
2579 
2580 	so_type = vmw_so_cmd_to_type(header->id);
2581 	res = vmw_context_cotable(ctx_node->ctx, vmw_so_cotables[so_type]);
2582 	if (IS_ERR_OR_NULL(res))
2583 		return res ? PTR_ERR(res) : -EINVAL;
2584 	cmd = container_of(header, typeof(*cmd), header);
2585 	ret = vmw_cotable_notify(res, cmd->defined_id);
2586 
2587 	return ret;
2588 }
2589 
2590 /**
2591  * vmw_cmd_dx_check_subresource - Validate SVGA_3D_CMD_DX_[X]_SUBRESOURCE
2592  * command
2593  *
2594  * @dev_priv: Pointer to a device private struct.
2595  * @sw_context: The software context being used for this batch.
2596  * @header: Pointer to the command header in the command stream.
2597  */
2598 static int vmw_cmd_dx_check_subresource(struct vmw_private *dev_priv,
2599 					struct vmw_sw_context *sw_context,
2600 					SVGA3dCmdHeader *header)
2601 {
2602 	struct {
2603 		SVGA3dCmdHeader header;
2604 		union {
2605 			SVGA3dCmdDXReadbackSubResource r_body;
2606 			SVGA3dCmdDXInvalidateSubResource i_body;
2607 			SVGA3dCmdDXUpdateSubResource u_body;
2608 			SVGA3dSurfaceId sid;
2609 		};
2610 	} *cmd;
2611 
2612 	BUILD_BUG_ON(offsetof(typeof(*cmd), r_body.sid) !=
2613 		     offsetof(typeof(*cmd), sid));
2614 	BUILD_BUG_ON(offsetof(typeof(*cmd), i_body.sid) !=
2615 		     offsetof(typeof(*cmd), sid));
2616 	BUILD_BUG_ON(offsetof(typeof(*cmd), u_body.sid) !=
2617 		     offsetof(typeof(*cmd), sid));
2618 
2619 	cmd = container_of(header, typeof(*cmd), header);
2620 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2621 				 VMW_RES_DIRTY_NONE, user_surface_converter,
2622 				 &cmd->sid, NULL);
2623 }
2624 
2625 static int vmw_cmd_dx_cid_check(struct vmw_private *dev_priv,
2626 				struct vmw_sw_context *sw_context,
2627 				SVGA3dCmdHeader *header)
2628 {
2629 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2630 
2631 	if (!ctx_node)
2632 		return -EINVAL;
2633 
2634 	return 0;
2635 }
2636 
2637 /**
2638  * vmw_cmd_dx_view_remove - validate a view remove command and schedule the view
2639  * resource for removal.
2640  *
2641  * @dev_priv: Pointer to a device private struct.
2642  * @sw_context: The software context being used for this batch.
2643  * @header: Pointer to the command header in the command stream.
2644  *
2645  * Check that the view exists, and if it was not created using this command
2646  * batch, conditionally make this command a NOP.
2647  */
2648 static int vmw_cmd_dx_view_remove(struct vmw_private *dev_priv,
2649 				  struct vmw_sw_context *sw_context,
2650 				  SVGA3dCmdHeader *header)
2651 {
2652 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2653 	struct {
2654 		SVGA3dCmdHeader header;
2655 		union vmw_view_destroy body;
2656 	} *cmd = container_of(header, typeof(*cmd), header);
2657 	enum vmw_view_type view_type = vmw_view_cmd_to_type(header->id);
2658 	struct vmw_resource *view;
2659 	int ret;
2660 
2661 	if (!ctx_node)
2662 		return -EINVAL;
2663 
2664 	ret = vmw_view_remove(sw_context->man, cmd->body.view_id, view_type,
2665 			      &sw_context->staged_cmd_res, &view);
2666 	if (ret || !view)
2667 		return ret;
2668 
2669 	/*
2670 	 * If the view wasn't created during this command batch, it might
2671 	 * have been removed due to a context swapout, so add a
2672 	 * relocation to conditionally make this command a NOP to avoid
2673 	 * device errors.
2674 	 */
2675 	return vmw_resource_relocation_add(sw_context, view,
2676 					   vmw_ptr_diff(sw_context->buf_start,
2677 							&cmd->header.id),
2678 					   vmw_res_rel_cond_nop);
2679 }
2680 
2681 /**
2682  * vmw_cmd_dx_define_shader - Validate SVGA_3D_CMD_DX_DEFINE_SHADER command
2683  *
2684  * @dev_priv: Pointer to a device private struct.
2685  * @sw_context: The software context being used for this batch.
2686  * @header: Pointer to the command header in the command stream.
2687  */
2688 static int vmw_cmd_dx_define_shader(struct vmw_private *dev_priv,
2689 				    struct vmw_sw_context *sw_context,
2690 				    SVGA3dCmdHeader *header)
2691 {
2692 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2693 	struct vmw_resource *res;
2694 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineShader) =
2695 		container_of(header, typeof(*cmd), header);
2696 	int ret;
2697 
2698 	if (!ctx_node)
2699 		return -EINVAL;
2700 
2701 	res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXSHADER);
2702 	if (IS_ERR_OR_NULL(res))
2703 		return res ? PTR_ERR(res) : -EINVAL;
2704 	ret = vmw_cotable_notify(res, cmd->body.shaderId);
2705 	if (ret)
2706 		return ret;
2707 
2708 	return vmw_dx_shader_add(sw_context->man, ctx_node->ctx,
2709 				 cmd->body.shaderId, cmd->body.type,
2710 				 &sw_context->staged_cmd_res);
2711 }
2712 
2713 /**
2714  * vmw_cmd_dx_destroy_shader - Validate SVGA_3D_CMD_DX_DESTROY_SHADER command
2715  *
2716  * @dev_priv: Pointer to a device private struct.
2717  * @sw_context: The software context being used for this batch.
2718  * @header: Pointer to the command header in the command stream.
2719  */
2720 static int vmw_cmd_dx_destroy_shader(struct vmw_private *dev_priv,
2721 				     struct vmw_sw_context *sw_context,
2722 				     SVGA3dCmdHeader *header)
2723 {
2724 	struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
2725 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDestroyShader) =
2726 		container_of(header, typeof(*cmd), header);
2727 	int ret;
2728 
2729 	if (!ctx_node)
2730 		return -EINVAL;
2731 
2732 	ret = vmw_shader_remove(sw_context->man, cmd->body.shaderId, 0,
2733 				&sw_context->staged_cmd_res);
2734 
2735 	return ret;
2736 }
2737 
2738 /**
2739  * vmw_cmd_dx_bind_shader - Validate SVGA_3D_CMD_DX_BIND_SHADER command
2740  *
2741  * @dev_priv: Pointer to a device private struct.
2742  * @sw_context: The software context being used for this batch.
2743  * @header: Pointer to the command header in the command stream.
2744  */
2745 static int vmw_cmd_dx_bind_shader(struct vmw_private *dev_priv,
2746 				  struct vmw_sw_context *sw_context,
2747 				  SVGA3dCmdHeader *header)
2748 {
2749 	struct vmw_resource *ctx;
2750 	struct vmw_resource *res;
2751 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindShader) =
2752 		container_of(header, typeof(*cmd), header);
2753 	int ret;
2754 
2755 	if (cmd->body.cid != SVGA3D_INVALID_ID) {
2756 		ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
2757 					VMW_RES_DIRTY_SET,
2758 					user_context_converter, &cmd->body.cid,
2759 					&ctx);
2760 		if (ret)
2761 			return ret;
2762 	} else {
2763 		struct vmw_ctx_validation_info *ctx_node =
2764 			VMW_GET_CTX_NODE(sw_context);
2765 
2766 		if (!ctx_node)
2767 			return -EINVAL;
2768 
2769 		ctx = ctx_node->ctx;
2770 	}
2771 
2772 	res = vmw_shader_lookup(vmw_context_res_man(ctx), cmd->body.shid, 0);
2773 	if (IS_ERR(res)) {
2774 		VMW_DEBUG_USER("Could not find shader to bind.\n");
2775 		return PTR_ERR(res);
2776 	}
2777 
2778 	ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
2779 				      vmw_val_add_flag_noctx);
2780 	if (ret) {
2781 		VMW_DEBUG_USER("Error creating resource validation node.\n");
2782 		return ret;
2783 	}
2784 
2785 	return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
2786 					 &cmd->body.mobid,
2787 					 cmd->body.offsetInBytes);
2788 }
2789 
2790 /**
2791  * vmw_cmd_dx_genmips - Validate SVGA_3D_CMD_DX_GENMIPS command
2792  *
2793  * @dev_priv: Pointer to a device private struct.
2794  * @sw_context: The software context being used for this batch.
2795  * @header: Pointer to the command header in the command stream.
2796  */
2797 static int vmw_cmd_dx_genmips(struct vmw_private *dev_priv,
2798 			      struct vmw_sw_context *sw_context,
2799 			      SVGA3dCmdHeader *header)
2800 {
2801 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXGenMips) =
2802 		container_of(header, typeof(*cmd), header);
2803 	struct vmw_resource *view;
2804 	struct vmw_res_cache_entry *rcache;
2805 
2806 	view = vmw_view_id_val_add(sw_context, vmw_view_sr,
2807 				   cmd->body.shaderResourceViewId);
2808 	if (IS_ERR(view))
2809 		return PTR_ERR(view);
2810 
2811 	/*
2812 	 * Normally the shader-resource view is not gpu-dirtying, but for
2813 	 * this particular command it is...
2814 	 * So mark the last looked-up surface, which is the surface
2815 	 * the view points to, gpu-dirty.
2816 	 */
2817 	rcache = &sw_context->res_cache[vmw_res_surface];
2818 	vmw_validation_res_set_dirty(sw_context->ctx, rcache->private,
2819 				     VMW_RES_DIRTY_SET);
2820 	return 0;
2821 }
2822 
2823 /**
2824  * vmw_cmd_dx_transfer_from_buffer - Validate
2825  * SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER command
2826  *
2827  * @dev_priv: Pointer to a device private struct.
2828  * @sw_context: The software context being used for this batch.
2829  * @header: Pointer to the command header in the command stream.
2830  */
2831 static int vmw_cmd_dx_transfer_from_buffer(struct vmw_private *dev_priv,
2832 					   struct vmw_sw_context *sw_context,
2833 					   SVGA3dCmdHeader *header)
2834 {
2835 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXTransferFromBuffer) =
2836 		container_of(header, typeof(*cmd), header);
2837 	int ret;
2838 
2839 	ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2840 				VMW_RES_DIRTY_NONE, user_surface_converter,
2841 				&cmd->body.srcSid, NULL);
2842 	if (ret != 0)
2843 		return ret;
2844 
2845 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2846 				 VMW_RES_DIRTY_SET, user_surface_converter,
2847 				 &cmd->body.destSid, NULL);
2848 }
2849 
2850 /**
2851  * vmw_cmd_intra_surface_copy - Validate SVGA_3D_CMD_INTRA_SURFACE_COPY command
2852  *
2853  * @dev_priv: Pointer to a device private struct.
2854  * @sw_context: The software context being used for this batch.
2855  * @header: Pointer to the command header in the command stream.
2856  */
2857 static int vmw_cmd_intra_surface_copy(struct vmw_private *dev_priv,
2858 					   struct vmw_sw_context *sw_context,
2859 					   SVGA3dCmdHeader *header)
2860 {
2861 	VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdIntraSurfaceCopy) =
2862 		container_of(header, typeof(*cmd), header);
2863 
2864 	if (!(dev_priv->capabilities2 & SVGA_CAP2_INTRA_SURFACE_COPY))
2865 		return -EINVAL;
2866 
2867 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
2868 				 VMW_RES_DIRTY_SET, user_surface_converter,
2869 				 &cmd->body.surface.sid, NULL);
2870 }
2871 
2872 static int vmw_cmd_sm5(struct vmw_private *dev_priv,
2873 		       struct vmw_sw_context *sw_context,
2874 		       SVGA3dCmdHeader *header)
2875 {
2876 	if (!has_sm5_context(dev_priv))
2877 		return -EINVAL;
2878 
2879 	return 0;
2880 }
2881 
2882 static int vmw_cmd_sm5_view_define(struct vmw_private *dev_priv,
2883 				   struct vmw_sw_context *sw_context,
2884 				   SVGA3dCmdHeader *header)
2885 {
2886 	if (!has_sm5_context(dev_priv))
2887 		return -EINVAL;
2888 
2889 	return vmw_cmd_dx_view_define(dev_priv, sw_context, header);
2890 }
2891 
2892 static int vmw_cmd_sm5_view_remove(struct vmw_private *dev_priv,
2893 				   struct vmw_sw_context *sw_context,
2894 				   SVGA3dCmdHeader *header)
2895 {
2896 	if (!has_sm5_context(dev_priv))
2897 		return -EINVAL;
2898 
2899 	return vmw_cmd_dx_view_remove(dev_priv, sw_context, header);
2900 }
2901 
2902 static int vmw_cmd_clear_uav_uint(struct vmw_private *dev_priv,
2903 				  struct vmw_sw_context *sw_context,
2904 				  SVGA3dCmdHeader *header)
2905 {
2906 	struct {
2907 		SVGA3dCmdHeader header;
2908 		SVGA3dCmdDXClearUAViewUint body;
2909 	} *cmd = container_of(header, typeof(*cmd), header);
2910 	struct vmw_resource *ret;
2911 
2912 	if (!has_sm5_context(dev_priv))
2913 		return -EINVAL;
2914 
2915 	ret = vmw_view_id_val_add(sw_context, vmw_view_ua,
2916 				  cmd->body.uaViewId);
2917 
2918 	return PTR_ERR_OR_ZERO(ret);
2919 }
2920 
2921 static int vmw_cmd_clear_uav_float(struct vmw_private *dev_priv,
2922 				   struct vmw_sw_context *sw_context,
2923 				   SVGA3dCmdHeader *header)
2924 {
2925 	struct {
2926 		SVGA3dCmdHeader header;
2927 		SVGA3dCmdDXClearUAViewFloat body;
2928 	} *cmd = container_of(header, typeof(*cmd), header);
2929 	struct vmw_resource *ret;
2930 
2931 	if (!has_sm5_context(dev_priv))
2932 		return -EINVAL;
2933 
2934 	ret = vmw_view_id_val_add(sw_context, vmw_view_ua,
2935 				  cmd->body.uaViewId);
2936 
2937 	return PTR_ERR_OR_ZERO(ret);
2938 }
2939 
2940 static int vmw_cmd_set_uav(struct vmw_private *dev_priv,
2941 			   struct vmw_sw_context *sw_context,
2942 			   SVGA3dCmdHeader *header)
2943 {
2944 	struct {
2945 		SVGA3dCmdHeader header;
2946 		SVGA3dCmdDXSetUAViews body;
2947 	} *cmd = container_of(header, typeof(*cmd), header);
2948 	u32 num_uav = (cmd->header.size - sizeof(cmd->body)) /
2949 		sizeof(SVGA3dUAViewId);
2950 	int ret;
2951 
2952 	if (!has_sm5_context(dev_priv))
2953 		return -EINVAL;
2954 
2955 	if (num_uav > vmw_max_num_uavs(dev_priv)) {
2956 		VMW_DEBUG_USER("Invalid UAV binding.\n");
2957 		return -EINVAL;
2958 	}
2959 
2960 	ret = vmw_view_bindings_add(sw_context, vmw_view_ua,
2961 				    vmw_ctx_binding_uav, 0, (void *)&cmd[1],
2962 				    num_uav, 0);
2963 	if (ret)
2964 		return ret;
2965 
2966 	vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 0,
2967 					 cmd->body.uavSpliceIndex);
2968 
2969 	return ret;
2970 }
2971 
2972 static int vmw_cmd_set_cs_uav(struct vmw_private *dev_priv,
2973 			      struct vmw_sw_context *sw_context,
2974 			      SVGA3dCmdHeader *header)
2975 {
2976 	struct {
2977 		SVGA3dCmdHeader header;
2978 		SVGA3dCmdDXSetCSUAViews body;
2979 	} *cmd = container_of(header, typeof(*cmd), header);
2980 	u32 num_uav = (cmd->header.size - sizeof(cmd->body)) /
2981 		sizeof(SVGA3dUAViewId);
2982 	int ret;
2983 
2984 	if (!has_sm5_context(dev_priv))
2985 		return -EINVAL;
2986 
2987 	if (num_uav > vmw_max_num_uavs(dev_priv)) {
2988 		VMW_DEBUG_USER("Invalid UAV binding.\n");
2989 		return -EINVAL;
2990 	}
2991 
2992 	ret = vmw_view_bindings_add(sw_context, vmw_view_ua,
2993 				    vmw_ctx_binding_cs_uav, 0, (void *)&cmd[1],
2994 				    num_uav, 0);
2995 	if (ret)
2996 		return ret;
2997 
2998 	vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 1,
2999 				  cmd->body.startIndex);
3000 
3001 	return ret;
3002 }
3003 
3004 static int vmw_cmd_dx_define_streamoutput(struct vmw_private *dev_priv,
3005 					  struct vmw_sw_context *sw_context,
3006 					  SVGA3dCmdHeader *header)
3007 {
3008 	struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
3009 	struct vmw_resource *res;
3010 	struct {
3011 		SVGA3dCmdHeader header;
3012 		SVGA3dCmdDXDefineStreamOutputWithMob body;
3013 	} *cmd = container_of(header, typeof(*cmd), header);
3014 	int ret;
3015 
3016 	if (!has_sm5_context(dev_priv))
3017 		return -EINVAL;
3018 
3019 	if (!ctx_node) {
3020 		DRM_ERROR("DX Context not set.\n");
3021 		return -EINVAL;
3022 	}
3023 
3024 	res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_STREAMOUTPUT);
3025 	if (IS_ERR_OR_NULL(res))
3026 		return res ? PTR_ERR(res) : -EINVAL;
3027 	ret = vmw_cotable_notify(res, cmd->body.soid);
3028 	if (ret)
3029 		return ret;
3030 
3031 	return vmw_dx_streamoutput_add(sw_context->man, ctx_node->ctx,
3032 				       cmd->body.soid,
3033 				       &sw_context->staged_cmd_res);
3034 }
3035 
3036 static int vmw_cmd_dx_destroy_streamoutput(struct vmw_private *dev_priv,
3037 					   struct vmw_sw_context *sw_context,
3038 					   SVGA3dCmdHeader *header)
3039 {
3040 	struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
3041 	struct vmw_resource *res;
3042 	struct {
3043 		SVGA3dCmdHeader header;
3044 		SVGA3dCmdDXDestroyStreamOutput body;
3045 	} *cmd = container_of(header, typeof(*cmd), header);
3046 
3047 	if (!ctx_node) {
3048 		DRM_ERROR("DX Context not set.\n");
3049 		return -EINVAL;
3050 	}
3051 
3052 	/*
3053 	 * When device does not support SM5 then streamoutput with mob command is
3054 	 * not available to user-space. Simply return in this case.
3055 	 */
3056 	if (!has_sm5_context(dev_priv))
3057 		return 0;
3058 
3059 	/*
3060 	 * With SM5 capable device if lookup fails then user-space probably used
3061 	 * old streamoutput define command. Return without an error.
3062 	 */
3063 	res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
3064 					 cmd->body.soid);
3065 	if (IS_ERR(res))
3066 		return 0;
3067 
3068 	return vmw_dx_streamoutput_remove(sw_context->man, cmd->body.soid,
3069 					  &sw_context->staged_cmd_res);
3070 }
3071 
3072 static int vmw_cmd_dx_bind_streamoutput(struct vmw_private *dev_priv,
3073 					struct vmw_sw_context *sw_context,
3074 					SVGA3dCmdHeader *header)
3075 {
3076 	struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
3077 	struct vmw_resource *res;
3078 	struct {
3079 		SVGA3dCmdHeader header;
3080 		SVGA3dCmdDXBindStreamOutput body;
3081 	} *cmd = container_of(header, typeof(*cmd), header);
3082 	int ret;
3083 
3084 	if (!has_sm5_context(dev_priv))
3085 		return -EINVAL;
3086 
3087 	if (!ctx_node) {
3088 		DRM_ERROR("DX Context not set.\n");
3089 		return -EINVAL;
3090 	}
3091 
3092 	res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
3093 					 cmd->body.soid);
3094 	if (IS_ERR(res)) {
3095 		DRM_ERROR("Could not find streamoutput to bind.\n");
3096 		return PTR_ERR(res);
3097 	}
3098 
3099 	vmw_dx_streamoutput_set_size(res, cmd->body.sizeInBytes);
3100 
3101 	ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
3102 				      vmw_val_add_flag_noctx);
3103 	if (ret) {
3104 		DRM_ERROR("Error creating resource validation node.\n");
3105 		return ret;
3106 	}
3107 
3108 	return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
3109 					 &cmd->body.mobid,
3110 					 cmd->body.offsetInBytes);
3111 }
3112 
3113 static int vmw_cmd_dx_set_streamoutput(struct vmw_private *dev_priv,
3114 				       struct vmw_sw_context *sw_context,
3115 				       SVGA3dCmdHeader *header)
3116 {
3117 	struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
3118 	struct vmw_resource *res;
3119 	struct vmw_ctx_bindinfo_so binding;
3120 	struct {
3121 		SVGA3dCmdHeader header;
3122 		SVGA3dCmdDXSetStreamOutput body;
3123 	} *cmd = container_of(header, typeof(*cmd), header);
3124 	int ret;
3125 
3126 	if (!ctx_node) {
3127 		DRM_ERROR("DX Context not set.\n");
3128 		return -EINVAL;
3129 	}
3130 
3131 	if (cmd->body.soid == SVGA3D_INVALID_ID)
3132 		return 0;
3133 
3134 	/*
3135 	 * When device does not support SM5 then streamoutput with mob command is
3136 	 * not available to user-space. Simply return in this case.
3137 	 */
3138 	if (!has_sm5_context(dev_priv))
3139 		return 0;
3140 
3141 	/*
3142 	 * With SM5 capable device if lookup fails then user-space probably used
3143 	 * old streamoutput define command. Return without an error.
3144 	 */
3145 	res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
3146 					 cmd->body.soid);
3147 	if (IS_ERR(res)) {
3148 		return 0;
3149 	}
3150 
3151 	ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
3152 				      vmw_val_add_flag_noctx);
3153 	if (ret) {
3154 		DRM_ERROR("Error creating resource validation node.\n");
3155 		return ret;
3156 	}
3157 
3158 	binding.bi.ctx = ctx_node->ctx;
3159 	binding.bi.res = res;
3160 	binding.bi.bt = vmw_ctx_binding_so;
3161 	binding.slot = 0; /* Only one SO set to context at a time. */
3162 
3163 	vmw_binding_add(sw_context->dx_ctx_node->staged, &binding.bi, 0,
3164 			binding.slot);
3165 
3166 	return ret;
3167 }
3168 
3169 static int vmw_cmd_indexed_instanced_indirect(struct vmw_private *dev_priv,
3170 					      struct vmw_sw_context *sw_context,
3171 					      SVGA3dCmdHeader *header)
3172 {
3173 	struct vmw_draw_indexed_instanced_indirect_cmd {
3174 		SVGA3dCmdHeader header;
3175 		SVGA3dCmdDXDrawIndexedInstancedIndirect body;
3176 	} *cmd = container_of(header, typeof(*cmd), header);
3177 
3178 	if (!has_sm5_context(dev_priv))
3179 		return -EINVAL;
3180 
3181 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
3182 				 VMW_RES_DIRTY_NONE, user_surface_converter,
3183 				 &cmd->body.argsBufferSid, NULL);
3184 }
3185 
3186 static int vmw_cmd_instanced_indirect(struct vmw_private *dev_priv,
3187 				      struct vmw_sw_context *sw_context,
3188 				      SVGA3dCmdHeader *header)
3189 {
3190 	struct vmw_draw_instanced_indirect_cmd {
3191 		SVGA3dCmdHeader header;
3192 		SVGA3dCmdDXDrawInstancedIndirect body;
3193 	} *cmd = container_of(header, typeof(*cmd), header);
3194 
3195 	if (!has_sm5_context(dev_priv))
3196 		return -EINVAL;
3197 
3198 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
3199 				 VMW_RES_DIRTY_NONE, user_surface_converter,
3200 				 &cmd->body.argsBufferSid, NULL);
3201 }
3202 
3203 static int vmw_cmd_dispatch_indirect(struct vmw_private *dev_priv,
3204 				     struct vmw_sw_context *sw_context,
3205 				     SVGA3dCmdHeader *header)
3206 {
3207 	struct vmw_dispatch_indirect_cmd {
3208 		SVGA3dCmdHeader header;
3209 		SVGA3dCmdDXDispatchIndirect body;
3210 	} *cmd = container_of(header, typeof(*cmd), header);
3211 
3212 	if (!has_sm5_context(dev_priv))
3213 		return -EINVAL;
3214 
3215 	return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
3216 				 VMW_RES_DIRTY_NONE, user_surface_converter,
3217 				 &cmd->body.argsBufferSid, NULL);
3218 }
3219 
3220 static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
3221 				struct vmw_sw_context *sw_context,
3222 				void *buf, uint32_t *size)
3223 {
3224 	uint32_t size_remaining = *size;
3225 	uint32_t cmd_id;
3226 
3227 	cmd_id = ((uint32_t *)buf)[0];
3228 	switch (cmd_id) {
3229 	case SVGA_CMD_UPDATE:
3230 		*size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
3231 		break;
3232 	case SVGA_CMD_DEFINE_GMRFB:
3233 		*size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
3234 		break;
3235 	case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
3236 		*size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
3237 		break;
3238 	case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
3239 		*size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
3240 		break;
3241 	default:
3242 		VMW_DEBUG_USER("Unsupported SVGA command: %u.\n", cmd_id);
3243 		return -EINVAL;
3244 	}
3245 
3246 	if (*size > size_remaining) {
3247 		VMW_DEBUG_USER("Invalid SVGA command (size mismatch): %u.\n",
3248 			       cmd_id);
3249 		return -EINVAL;
3250 	}
3251 
3252 	if (unlikely(!sw_context->kernel)) {
3253 		VMW_DEBUG_USER("Kernel only SVGA command: %u.\n", cmd_id);
3254 		return -EPERM;
3255 	}
3256 
3257 	if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
3258 		return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
3259 
3260 	return 0;
3261 }
3262 
3263 static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
3264 	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
3265 		    false, false, false),
3266 	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
3267 		    false, false, false),
3268 	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
3269 		    true, false, false),
3270 	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
3271 		    true, false, false),
3272 	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
3273 		    true, false, false),
3274 	VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
3275 		    false, false, false),
3276 	VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
3277 		    false, false, false),
3278 	VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
3279 		    true, false, false),
3280 	VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
3281 		    true, false, false),
3282 	VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
3283 		    true, false, false),
3284 	VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
3285 		    &vmw_cmd_set_render_target_check, true, false, false),
3286 	VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
3287 		    true, false, false),
3288 	VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
3289 		    true, false, false),
3290 	VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
3291 		    true, false, false),
3292 	VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
3293 		    true, false, false),
3294 	VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
3295 		    true, false, false),
3296 	VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
3297 		    true, false, false),
3298 	VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
3299 		    true, false, false),
3300 	VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
3301 		    false, false, false),
3302 	VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
3303 		    true, false, false),
3304 	VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
3305 		    true, false, false),
3306 	VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
3307 		    true, false, false),
3308 	VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
3309 		    true, false, false),
3310 	VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
3311 		    true, false, false),
3312 	VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
3313 		    true, false, false),
3314 	VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
3315 		    true, false, false),
3316 	VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
3317 		    true, false, false),
3318 	VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
3319 		    true, false, false),
3320 	VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
3321 		    true, false, false),
3322 	VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
3323 		    &vmw_cmd_blt_surf_screen_check, false, false, false),
3324 	VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
3325 		    false, false, false),
3326 	VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
3327 		    false, false, false),
3328 	VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
3329 		    false, false, false),
3330 	VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
3331 		    false, false, false),
3332 	VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
3333 		    false, false, false),
3334 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD1, &vmw_cmd_invalid,
3335 		    false, false, false),
3336 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD2, &vmw_cmd_invalid,
3337 		    false, false, false),
3338 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD12, &vmw_cmd_invalid, false, false, false),
3339 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD13, &vmw_cmd_invalid, false, false, false),
3340 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD14, &vmw_cmd_invalid, false, false, false),
3341 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD15, &vmw_cmd_invalid, false, false, false),
3342 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD16, &vmw_cmd_invalid, false, false, false),
3343 	VMW_CMD_DEF(SVGA_3D_CMD_DEAD17, &vmw_cmd_invalid, false, false, false),
3344 	VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
3345 		    false, false, true),
3346 	VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
3347 		    false, false, true),
3348 	VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
3349 		    false, false, true),
3350 	VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
3351 		    false, false, true),
3352 	VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB64, &vmw_cmd_invalid,
3353 		    false, false, true),
3354 	VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
3355 		    false, false, true),
3356 	VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
3357 		    false, false, true),
3358 	VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
3359 		    false, false, true),
3360 	VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
3361 		    true, false, true),
3362 	VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
3363 		    false, false, true),
3364 	VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
3365 		    true, false, true),
3366 	VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
3367 		    &vmw_cmd_update_gb_surface, true, false, true),
3368 	VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
3369 		    &vmw_cmd_readback_gb_image, true, false, true),
3370 	VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
3371 		    &vmw_cmd_readback_gb_surface, true, false, true),
3372 	VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
3373 		    &vmw_cmd_invalidate_gb_image, true, false, true),
3374 	VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
3375 		    &vmw_cmd_invalidate_gb_surface, true, false, true),
3376 	VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
3377 		    false, false, true),
3378 	VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
3379 		    false, false, true),
3380 	VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
3381 		    false, false, true),
3382 	VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
3383 		    false, false, true),
3384 	VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
3385 		    false, false, true),
3386 	VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
3387 		    false, false, true),
3388 	VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
3389 		    true, false, true),
3390 	VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
3391 		    false, false, true),
3392 	VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
3393 		    false, false, false),
3394 	VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
3395 		    true, false, true),
3396 	VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
3397 		    true, false, true),
3398 	VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
3399 		    true, false, true),
3400 	VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
3401 		    true, false, true),
3402 	VMW_CMD_DEF(SVGA_3D_CMD_NOP_ERROR, &vmw_cmd_ok,
3403 		    true, false, true),
3404 	VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
3405 		    false, false, true),
3406 	VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
3407 		    false, false, true),
3408 	VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
3409 		    false, false, true),
3410 	VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
3411 		    false, false, true),
3412 	VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
3413 		    false, false, true),
3414 	VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
3415 		    false, false, true),
3416 	VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
3417 		    false, false, true),
3418 	VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
3419 		    false, false, true),
3420 	VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
3421 		    false, false, true),
3422 	VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
3423 		    false, false, true),
3424 	VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
3425 		    true, false, true),
3426 	VMW_CMD_DEF(SVGA_3D_CMD_GB_SCREEN_DMA, &vmw_cmd_invalid,
3427 		    false, false, true),
3428 	VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH, &vmw_cmd_invalid,
3429 		    false, false, true),
3430 	VMW_CMD_DEF(SVGA_3D_CMD_GB_MOB_FENCE, &vmw_cmd_invalid,
3431 		    false, false, true),
3432 	VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V2, &vmw_cmd_invalid,
3433 		    false, false, true),
3434 
3435 	/* SM commands */
3436 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_CONTEXT, &vmw_cmd_invalid,
3437 		    false, false, true),
3438 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_CONTEXT, &vmw_cmd_invalid,
3439 		    false, false, true),
3440 	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_CONTEXT, &vmw_cmd_invalid,
3441 		    false, false, true),
3442 	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_CONTEXT, &vmw_cmd_invalid,
3443 		    false, false, true),
3444 	VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_CONTEXT, &vmw_cmd_invalid,
3445 		    false, false, true),
3446 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
3447 		    &vmw_cmd_dx_set_single_constant_buffer, true, false, true),
3448 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
3449 		    &vmw_cmd_dx_set_shader_res, true, false, true),
3450 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER, &vmw_cmd_dx_set_shader,
3451 		    true, false, true),
3452 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SAMPLERS, &vmw_cmd_dx_cid_check,
3453 		    true, false, true),
3454 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW, &vmw_cmd_dx_cid_check,
3455 		    true, false, true),
3456 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED, &vmw_cmd_dx_cid_check,
3457 		    true, false, true),
3458 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED, &vmw_cmd_dx_cid_check,
3459 		    true, false, true),
3460 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED,
3461 		    &vmw_cmd_dx_cid_check, true, false, true),
3462 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_AUTO, &vmw_cmd_dx_cid_check,
3463 		    true, false, true),
3464 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
3465 		    &vmw_cmd_dx_set_vertex_buffers, true, false, true),
3466 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
3467 		    &vmw_cmd_dx_set_index_buffer, true, false, true),
3468 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RENDERTARGETS,
3469 		    &vmw_cmd_dx_set_rendertargets, true, false, true),
3470 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_BLEND_STATE, &vmw_cmd_dx_cid_check,
3471 		    true, false, true),
3472 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE,
3473 		    &vmw_cmd_dx_cid_check, true, false, true),
3474 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RASTERIZER_STATE,
3475 		    &vmw_cmd_dx_cid_check, true, false, true),
3476 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,
3477 		    true, false, true),
3478 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check,
3479 		    true, false, true),
3480 	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,
3481 		    true, false, true),
3482 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,
3483 		    &vmw_cmd_dx_cid_check, true, false, true),
3484 	VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check,
3485 		    true, false, true),
3486 	VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check,
3487 		    true, false, true),
3488 	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,
3489 		    true, false, true),
3490 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check,
3491 		    true, false, true),
3492 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,
3493 		    true, false, true),
3494 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SCISSORRECTS, &vmw_cmd_dx_cid_check,
3495 		    true, false, true),
3496 	VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
3497 		    &vmw_cmd_dx_clear_rendertarget_view, true, false, true),
3498 	VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
3499 		    &vmw_cmd_dx_clear_depthstencil_view, true, false, true),
3500 	VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY, &vmw_cmd_invalid,
3501 		    true, false, true),
3502 	VMW_CMD_DEF(SVGA_3D_CMD_DX_GENMIPS, &vmw_cmd_dx_genmips,
3503 		    true, false, true),
3504 	VMW_CMD_DEF(SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
3505 		    &vmw_cmd_dx_check_subresource, true, false, true),
3506 	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
3507 		    &vmw_cmd_dx_check_subresource, true, false, true),
3508 	VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE,
3509 		    &vmw_cmd_dx_check_subresource, true, false, true),
3510 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
3511 		    &vmw_cmd_dx_view_define, true, false, true),
3512 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW,
3513 		    &vmw_cmd_dx_view_remove, true, false, true),
3514 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
3515 		    &vmw_cmd_dx_view_define, true, false, true),
3516 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW,
3517 		    &vmw_cmd_dx_view_remove, true, false, true),
3518 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
3519 		    &vmw_cmd_dx_view_define, true, false, true),
3520 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW,
3521 		    &vmw_cmd_dx_view_remove, true, false, true),
3522 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
3523 		    &vmw_cmd_dx_so_define, true, false, true),
3524 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT,
3525 		    &vmw_cmd_dx_cid_check, true, false, true),
3526 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_BLEND_STATE,
3527 		    &vmw_cmd_dx_so_define, true, false, true),
3528 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_BLEND_STATE,
3529 		    &vmw_cmd_dx_cid_check, true, false, true),
3530 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE,
3531 		    &vmw_cmd_dx_so_define, true, false, true),
3532 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE,
3533 		    &vmw_cmd_dx_cid_check, true, false, true),
3534 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE,
3535 		    &vmw_cmd_dx_so_define, true, false, true),
3536 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE,
3537 		    &vmw_cmd_dx_cid_check, true, false, true),
3538 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE,
3539 		    &vmw_cmd_dx_so_define, true, false, true),
3540 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE,
3541 		    &vmw_cmd_dx_cid_check, true, false, true),
3542 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADER,
3543 		    &vmw_cmd_dx_define_shader, true, false, true),
3544 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADER,
3545 		    &vmw_cmd_dx_destroy_shader, true, false, true),
3546 	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_SHADER,
3547 		    &vmw_cmd_dx_bind_shader, true, false, true),
3548 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT,
3549 		    &vmw_cmd_dx_so_define, true, false, true),
3550 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT,
3551 		    &vmw_cmd_dx_destroy_streamoutput, true, false, true),
3552 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_STREAMOUTPUT,
3553 		    &vmw_cmd_dx_set_streamoutput, true, false, true),
3554 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SOTARGETS,
3555 		    &vmw_cmd_dx_set_so_targets, true, false, true),
3556 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INPUT_LAYOUT,
3557 		    &vmw_cmd_dx_cid_check, true, false, true),
3558 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_TOPOLOGY,
3559 		    &vmw_cmd_dx_cid_check, true, false, true),
3560 	VMW_CMD_DEF(SVGA_3D_CMD_DX_BUFFER_COPY,
3561 		    &vmw_cmd_buffer_copy_check, true, false, true),
3562 	VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY_REGION,
3563 		    &vmw_cmd_pred_copy_check, true, false, true),
3564 	VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
3565 		    &vmw_cmd_dx_transfer_from_buffer,
3566 		    true, false, true),
3567 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET,
3568 		    &vmw_cmd_dx_set_constant_buffer_offset,
3569 		    true, false, true),
3570 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET,
3571 		    &vmw_cmd_dx_set_constant_buffer_offset,
3572 		    true, false, true),
3573 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET,
3574 		    &vmw_cmd_dx_set_constant_buffer_offset,
3575 		    true, false, true),
3576 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET,
3577 		    &vmw_cmd_dx_set_constant_buffer_offset,
3578 		    true, false, true),
3579 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET,
3580 		    &vmw_cmd_dx_set_constant_buffer_offset,
3581 		    true, false, true),
3582 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET,
3583 		    &vmw_cmd_dx_set_constant_buffer_offset,
3584 		    true, false, true),
3585 	VMW_CMD_DEF(SVGA_3D_CMD_INTRA_SURFACE_COPY, &vmw_cmd_intra_surface_copy,
3586 		    true, false, true),
3587 
3588 	/*
3589 	 * SM5 commands
3590 	 */
3591 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_UA_VIEW, &vmw_cmd_sm5_view_define,
3592 		    true, false, true),
3593 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_UA_VIEW, &vmw_cmd_sm5_view_remove,
3594 		    true, false, true),
3595 	VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT, &vmw_cmd_clear_uav_uint,
3596 		    true, false, true),
3597 	VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT,
3598 		    &vmw_cmd_clear_uav_float, true, false, true),
3599 	VMW_CMD_DEF(SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT, &vmw_cmd_invalid, true,
3600 		    false, true),
3601 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_UA_VIEWS, &vmw_cmd_set_uav, true, false,
3602 		    true),
3603 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT,
3604 		    &vmw_cmd_indexed_instanced_indirect, true, false, true),
3605 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT,
3606 		    &vmw_cmd_instanced_indirect, true, false, true),
3607 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH, &vmw_cmd_sm5, true, false, true),
3608 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH_INDIRECT,
3609 		    &vmw_cmd_dispatch_indirect, true, false, true),
3610 	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_UA_VIEWS, &vmw_cmd_set_cs_uav, true,
3611 		    false, true),
3612 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2,
3613 		    &vmw_cmd_sm5_view_define, true, false, true),
3614 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB,
3615 		    &vmw_cmd_dx_define_streamoutput, true, false, true),
3616 	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_STREAMOUTPUT,
3617 		    &vmw_cmd_dx_bind_streamoutput, true, false, true),
3618 	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2,
3619 		    &vmw_cmd_dx_so_define, true, false, true),
3620 	VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V4,
3621 		    &vmw_cmd_invalid, false, false, true),
3622 };
3623 
3624 bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd)
3625 {
3626 	u32 cmd_id = ((u32 *) buf)[0];
3627 
3628 	if (cmd_id >= SVGA_CMD_MAX) {
3629 		SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
3630 		const struct vmw_cmd_entry *entry;
3631 
3632 		*size = header->size + sizeof(SVGA3dCmdHeader);
3633 		cmd_id = header->id;
3634 		if (cmd_id >= SVGA_3D_CMD_MAX)
3635 			return false;
3636 
3637 		cmd_id -= SVGA_3D_CMD_BASE;
3638 		entry = &vmw_cmd_entries[cmd_id];
3639 		*cmd = entry->cmd_name;
3640 		return true;
3641 	}
3642 
3643 	switch (cmd_id) {
3644 	case SVGA_CMD_UPDATE:
3645 		*cmd = "SVGA_CMD_UPDATE";
3646 		*size = sizeof(u32) + sizeof(SVGAFifoCmdUpdate);
3647 		break;
3648 	case SVGA_CMD_DEFINE_GMRFB:
3649 		*cmd = "SVGA_CMD_DEFINE_GMRFB";
3650 		*size = sizeof(u32) + sizeof(SVGAFifoCmdDefineGMRFB);
3651 		break;
3652 	case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
3653 		*cmd = "SVGA_CMD_BLIT_GMRFB_TO_SCREEN";
3654 		*size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
3655 		break;
3656 	case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
3657 		*cmd = "SVGA_CMD_BLIT_SCREEN_TO_GMRFB";
3658 		*size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
3659 		break;
3660 	default:
3661 		*cmd = "UNKNOWN";
3662 		*size = 0;
3663 		return false;
3664 	}
3665 
3666 	return true;
3667 }
3668 
3669 static int vmw_cmd_check(struct vmw_private *dev_priv,
3670 			 struct vmw_sw_context *sw_context, void *buf,
3671 			 uint32_t *size)
3672 {
3673 	uint32_t cmd_id;
3674 	uint32_t size_remaining = *size;
3675 	SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
3676 	int ret;
3677 	const struct vmw_cmd_entry *entry;
3678 	bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
3679 
3680 	cmd_id = ((uint32_t *)buf)[0];
3681 	/* Handle any none 3D commands */
3682 	if (unlikely(cmd_id < SVGA_CMD_MAX))
3683 		return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
3684 
3685 
3686 	cmd_id = header->id;
3687 	if (header->size > SVGA_CMD_MAX_DATASIZE) {
3688 		VMW_DEBUG_USER("SVGA3D command: %d is too big.\n",
3689 			       cmd_id + SVGA_3D_CMD_BASE);
3690 		return -E2BIG;
3691 	}
3692 	*size = header->size + sizeof(SVGA3dCmdHeader);
3693 
3694 	cmd_id -= SVGA_3D_CMD_BASE;
3695 	if (unlikely(*size > size_remaining))
3696 		goto out_invalid;
3697 
3698 	if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
3699 		goto out_invalid;
3700 
3701 	entry = &vmw_cmd_entries[cmd_id];
3702 	if (unlikely(!entry->func))
3703 		goto out_invalid;
3704 
3705 	if (unlikely(!entry->user_allow && !sw_context->kernel))
3706 		goto out_privileged;
3707 
3708 	if (unlikely(entry->gb_disable && gb))
3709 		goto out_old;
3710 
3711 	if (unlikely(entry->gb_enable && !gb))
3712 		goto out_new;
3713 
3714 	ret = entry->func(dev_priv, sw_context, header);
3715 	if (unlikely(ret != 0)) {
3716 		VMW_DEBUG_USER("SVGA3D command: %d failed with error %d\n",
3717 			       cmd_id + SVGA_3D_CMD_BASE, ret);
3718 		return ret;
3719 	}
3720 
3721 	return 0;
3722 out_invalid:
3723 	VMW_DEBUG_USER("Invalid SVGA3D command: %d\n",
3724 		       cmd_id + SVGA_3D_CMD_BASE);
3725 	return -EINVAL;
3726 out_privileged:
3727 	VMW_DEBUG_USER("Privileged SVGA3D command: %d\n",
3728 		       cmd_id + SVGA_3D_CMD_BASE);
3729 	return -EPERM;
3730 out_old:
3731 	VMW_DEBUG_USER("Deprecated (disallowed) SVGA3D command: %d\n",
3732 		       cmd_id + SVGA_3D_CMD_BASE);
3733 	return -EINVAL;
3734 out_new:
3735 	VMW_DEBUG_USER("SVGA3D command: %d not supported by virtual device.\n",
3736 		       cmd_id + SVGA_3D_CMD_BASE);
3737 	return -EINVAL;
3738 }
3739 
3740 static int vmw_cmd_check_all(struct vmw_private *dev_priv,
3741 			     struct vmw_sw_context *sw_context, void *buf,
3742 			     uint32_t size)
3743 {
3744 	int32_t cur_size = size;
3745 	int ret;
3746 
3747 	sw_context->buf_start = buf;
3748 
3749 	while (cur_size > 0) {
3750 		size = cur_size;
3751 		ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
3752 		if (unlikely(ret != 0))
3753 			return ret;
3754 		buf = (void *)((unsigned long) buf + size);
3755 		cur_size -= size;
3756 	}
3757 
3758 	if (unlikely(cur_size != 0)) {
3759 		VMW_DEBUG_USER("Command verifier out of sync.\n");
3760 		return -EINVAL;
3761 	}
3762 
3763 	return 0;
3764 }
3765 
3766 static void vmw_free_relocations(struct vmw_sw_context *sw_context)
3767 {
3768 	/* Memory is validation context memory, so no need to free it */
3769 	INIT_LIST_HEAD(&sw_context->bo_relocations);
3770 }
3771 
3772 static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
3773 {
3774 	struct vmw_relocation *reloc;
3775 	struct ttm_buffer_object *bo;
3776 
3777 	list_for_each_entry(reloc, &sw_context->bo_relocations, head) {
3778 		bo = &reloc->vbo->tbo;
3779 		switch (bo->resource->mem_type) {
3780 		case TTM_PL_VRAM:
3781 			reloc->location->offset += bo->resource->start << PAGE_SHIFT;
3782 			reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
3783 			break;
3784 		case VMW_PL_GMR:
3785 			reloc->location->gmrId = bo->resource->start;
3786 			break;
3787 		case VMW_PL_MOB:
3788 			*reloc->mob_loc = bo->resource->start;
3789 			break;
3790 		default:
3791 			BUG();
3792 		}
3793 	}
3794 	vmw_free_relocations(sw_context);
3795 }
3796 
3797 static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
3798 				 uint32_t size)
3799 {
3800 	if (likely(sw_context->cmd_bounce_size >= size))
3801 		return 0;
3802 
3803 	if (sw_context->cmd_bounce_size == 0)
3804 		sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
3805 
3806 	while (sw_context->cmd_bounce_size < size) {
3807 		sw_context->cmd_bounce_size =
3808 			PAGE_ALIGN(sw_context->cmd_bounce_size +
3809 				   (sw_context->cmd_bounce_size >> 1));
3810 	}
3811 
3812 	vfree(sw_context->cmd_bounce);
3813 	sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
3814 
3815 	if (sw_context->cmd_bounce == NULL) {
3816 		VMW_DEBUG_USER("Failed to allocate command bounce buffer.\n");
3817 		sw_context->cmd_bounce_size = 0;
3818 		return -ENOMEM;
3819 	}
3820 
3821 	return 0;
3822 }
3823 
3824 /*
3825  * vmw_execbuf_fence_commands - create and submit a command stream fence
3826  *
3827  * Creates a fence object and submits a command stream marker.
3828  * If this fails for some reason, We sync the fifo and return NULL.
3829  * It is then safe to fence buffers with a NULL pointer.
3830  *
3831  * If @p_handle is not NULL @file_priv must also not be NULL. Creates a
3832  * userspace handle if @p_handle is not NULL, otherwise not.
3833  */
3834 
3835 int vmw_execbuf_fence_commands(struct drm_file *file_priv,
3836 			       struct vmw_private *dev_priv,
3837 			       struct vmw_fence_obj **p_fence,
3838 			       uint32_t *p_handle)
3839 {
3840 	uint32_t sequence;
3841 	int ret;
3842 	bool synced = false;
3843 
3844 	/* p_handle implies file_priv. */
3845 	BUG_ON(p_handle != NULL && file_priv == NULL);
3846 
3847 	ret = vmw_cmd_send_fence(dev_priv, &sequence);
3848 	if (unlikely(ret != 0)) {
3849 		VMW_DEBUG_USER("Fence submission error. Syncing.\n");
3850 		synced = true;
3851 	}
3852 
3853 	if (p_handle != NULL)
3854 		ret = vmw_user_fence_create(file_priv, dev_priv->fman,
3855 					    sequence, p_fence, p_handle);
3856 	else
3857 		ret = vmw_fence_create(dev_priv->fman, sequence, p_fence);
3858 
3859 	if (unlikely(ret != 0 && !synced)) {
3860 		(void) vmw_fallback_wait(dev_priv, false, false, sequence,
3861 					 false, VMW_FENCE_WAIT_TIMEOUT);
3862 		*p_fence = NULL;
3863 	}
3864 
3865 	return ret;
3866 }
3867 
3868 /**
3869  * vmw_execbuf_copy_fence_user - copy fence object information to user-space.
3870  *
3871  * @dev_priv: Pointer to a vmw_private struct.
3872  * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
3873  * @ret: Return value from fence object creation.
3874  * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to which
3875  * the information should be copied.
3876  * @fence: Pointer to the fenc object.
3877  * @fence_handle: User-space fence handle.
3878  * @out_fence_fd: exported file descriptor for the fence.  -1 if not used
3879  *
3880  * This function copies fence information to user-space. If copying fails, the
3881  * user-space struct drm_vmw_fence_rep::error member is hopefully left
3882  * untouched, and if it's preloaded with an -EFAULT by user-space, the error
3883  * will hopefully be detected.
3884  *
3885  * Also if copying fails, user-space will be unable to signal the fence object
3886  * so we wait for it immediately, and then unreference the user-space reference.
3887  */
3888 int
3889 vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
3890 			    struct vmw_fpriv *vmw_fp, int ret,
3891 			    struct drm_vmw_fence_rep __user *user_fence_rep,
3892 			    struct vmw_fence_obj *fence, uint32_t fence_handle,
3893 			    int32_t out_fence_fd)
3894 {
3895 	struct drm_vmw_fence_rep fence_rep;
3896 
3897 	if (user_fence_rep == NULL)
3898 		return 0;
3899 
3900 	memset(&fence_rep, 0, sizeof(fence_rep));
3901 
3902 	fence_rep.error = ret;
3903 	fence_rep.fd = out_fence_fd;
3904 	if (ret == 0) {
3905 		BUG_ON(fence == NULL);
3906 
3907 		fence_rep.handle = fence_handle;
3908 		fence_rep.seqno = fence->base.seqno;
3909 		fence_rep.passed_seqno = vmw_fences_update(dev_priv->fman);
3910 	}
3911 
3912 	/*
3913 	 * copy_to_user errors will be detected by user space not seeing
3914 	 * fence_rep::error filled in. Typically user-space would have pre-set
3915 	 * that member to -EFAULT.
3916 	 */
3917 	ret = copy_to_user(user_fence_rep, &fence_rep,
3918 			   sizeof(fence_rep));
3919 
3920 	/*
3921 	 * User-space lost the fence object. We need to sync and unreference the
3922 	 * handle.
3923 	 */
3924 	if (unlikely(ret != 0) && (fence_rep.error == 0)) {
3925 		ttm_ref_object_base_unref(vmw_fp->tfile, fence_handle);
3926 		VMW_DEBUG_USER("Fence copy error. Syncing.\n");
3927 		(void) vmw_fence_obj_wait(fence, false, false,
3928 					  VMW_FENCE_WAIT_TIMEOUT);
3929 	}
3930 
3931 	return ret ? -EFAULT : 0;
3932 }
3933 
3934 /**
3935  * vmw_execbuf_submit_fifo - Patch a command batch and submit it using the fifo.
3936  *
3937  * @dev_priv: Pointer to a device private structure.
3938  * @kernel_commands: Pointer to the unpatched command batch.
3939  * @command_size: Size of the unpatched command batch.
3940  * @sw_context: Structure holding the relocation lists.
3941  *
3942  * Side effects: If this function returns 0, then the command batch pointed to
3943  * by @kernel_commands will have been modified.
3944  */
3945 static int vmw_execbuf_submit_fifo(struct vmw_private *dev_priv,
3946 				   void *kernel_commands, u32 command_size,
3947 				   struct vmw_sw_context *sw_context)
3948 {
3949 	void *cmd;
3950 
3951 	if (sw_context->dx_ctx_node)
3952 		cmd = VMW_CMD_CTX_RESERVE(dev_priv, command_size,
3953 					  sw_context->dx_ctx_node->ctx->id);
3954 	else
3955 		cmd = VMW_CMD_RESERVE(dev_priv, command_size);
3956 
3957 	if (!cmd)
3958 		return -ENOMEM;
3959 
3960 	vmw_apply_relocations(sw_context);
3961 	memcpy(cmd, kernel_commands, command_size);
3962 	vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
3963 	vmw_resource_relocations_free(&sw_context->res_relocations);
3964 	vmw_cmd_commit(dev_priv, command_size);
3965 
3966 	return 0;
3967 }
3968 
3969 /**
3970  * vmw_execbuf_submit_cmdbuf - Patch a command batch and submit it using the
3971  * command buffer manager.
3972  *
3973  * @dev_priv: Pointer to a device private structure.
3974  * @header: Opaque handle to the command buffer allocation.
3975  * @command_size: Size of the unpatched command batch.
3976  * @sw_context: Structure holding the relocation lists.
3977  *
3978  * Side effects: If this function returns 0, then the command buffer represented
3979  * by @header will have been modified.
3980  */
3981 static int vmw_execbuf_submit_cmdbuf(struct vmw_private *dev_priv,
3982 				     struct vmw_cmdbuf_header *header,
3983 				     u32 command_size,
3984 				     struct vmw_sw_context *sw_context)
3985 {
3986 	u32 id = ((sw_context->dx_ctx_node) ? sw_context->dx_ctx_node->ctx->id :
3987 		  SVGA3D_INVALID_ID);
3988 	void *cmd = vmw_cmdbuf_reserve(dev_priv->cman, command_size, id, false,
3989 				       header);
3990 
3991 	vmw_apply_relocations(sw_context);
3992 	vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
3993 	vmw_resource_relocations_free(&sw_context->res_relocations);
3994 	vmw_cmdbuf_commit(dev_priv->cman, command_size, header, false);
3995 
3996 	return 0;
3997 }
3998 
3999 /**
4000  * vmw_execbuf_cmdbuf - Prepare, if possible, a user-space command batch for
4001  * submission using a command buffer.
4002  *
4003  * @dev_priv: Pointer to a device private structure.
4004  * @user_commands: User-space pointer to the commands to be submitted.
4005  * @command_size: Size of the unpatched command batch.
4006  * @header: Out parameter returning the opaque pointer to the command buffer.
4007  *
4008  * This function checks whether we can use the command buffer manager for
4009  * submission and if so, creates a command buffer of suitable size and copies
4010  * the user data into that buffer.
4011  *
4012  * On successful return, the function returns a pointer to the data in the
4013  * command buffer and *@header is set to non-NULL.
4014  *
4015  * @kernel_commands: If command buffers could not be used, the function will
4016  * return the value of @kernel_commands on function call. That value may be
4017  * NULL. In that case, the value of *@header will be set to NULL.
4018  *
4019  * If an error is encountered, the function will return a pointer error value.
4020  * If the function is interrupted by a signal while sleeping, it will return
4021  * -ERESTARTSYS casted to a pointer error value.
4022  */
4023 static void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv,
4024 				void __user *user_commands,
4025 				void *kernel_commands, u32 command_size,
4026 				struct vmw_cmdbuf_header **header)
4027 {
4028 	size_t cmdbuf_size;
4029 	int ret;
4030 
4031 	*header = NULL;
4032 	if (command_size > SVGA_CB_MAX_SIZE) {
4033 		VMW_DEBUG_USER("Command buffer is too large.\n");
4034 		return ERR_PTR(-EINVAL);
4035 	}
4036 
4037 	if (!dev_priv->cman || kernel_commands)
4038 		return kernel_commands;
4039 
4040 	/* If possible, add a little space for fencing. */
4041 	cmdbuf_size = command_size + 512;
4042 	cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE);
4043 	kernel_commands = vmw_cmdbuf_alloc(dev_priv->cman, cmdbuf_size, true,
4044 					   header);
4045 	if (IS_ERR(kernel_commands))
4046 		return kernel_commands;
4047 
4048 	ret = copy_from_user(kernel_commands, user_commands, command_size);
4049 	if (ret) {
4050 		VMW_DEBUG_USER("Failed copying commands.\n");
4051 		vmw_cmdbuf_header_free(*header);
4052 		*header = NULL;
4053 		return ERR_PTR(-EFAULT);
4054 	}
4055 
4056 	return kernel_commands;
4057 }
4058 
4059 static int vmw_execbuf_tie_context(struct vmw_private *dev_priv,
4060 				   struct vmw_sw_context *sw_context,
4061 				   uint32_t handle)
4062 {
4063 	struct vmw_resource *res;
4064 	int ret;
4065 	unsigned int size;
4066 
4067 	if (handle == SVGA3D_INVALID_ID)
4068 		return 0;
4069 
4070 	size = vmw_execbuf_res_size(dev_priv, vmw_res_dx_context);
4071 	ret = vmw_validation_preload_res(sw_context->ctx, size);
4072 	if (ret)
4073 		return ret;
4074 
4075 	ret = vmw_user_resource_lookup_handle
4076 		(dev_priv, sw_context->fp->tfile, handle,
4077 		 user_context_converter, &res);
4078 	if (ret != 0) {
4079 		VMW_DEBUG_USER("Could not find or user DX context 0x%08x.\n",
4080 			       (unsigned int) handle);
4081 		return ret;
4082 	}
4083 
4084 	ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_SET,
4085 				      vmw_val_add_flag_none);
4086 	if (unlikely(ret != 0)) {
4087 		vmw_resource_unreference(&res);
4088 		return ret;
4089 	}
4090 
4091 	sw_context->dx_ctx_node = vmw_execbuf_info_from_res(sw_context, res);
4092 	sw_context->man = vmw_context_res_man(res);
4093 
4094 	vmw_resource_unreference(&res);
4095 	return 0;
4096 }
4097 
4098 int vmw_execbuf_process(struct drm_file *file_priv,
4099 			struct vmw_private *dev_priv,
4100 			void __user *user_commands, void *kernel_commands,
4101 			uint32_t command_size, uint64_t throttle_us,
4102 			uint32_t dx_context_handle,
4103 			struct drm_vmw_fence_rep __user *user_fence_rep,
4104 			struct vmw_fence_obj **out_fence, uint32_t flags)
4105 {
4106 	struct vmw_sw_context *sw_context = &dev_priv->ctx;
4107 	struct vmw_fence_obj *fence = NULL;
4108 	struct vmw_cmdbuf_header *header;
4109 	uint32_t handle = 0;
4110 	int ret;
4111 	int32_t out_fence_fd = -1;
4112 	struct sync_file *sync_file = NULL;
4113 	DECLARE_VAL_CONTEXT(val_ctx, sw_context, 1);
4114 
4115 	if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
4116 		out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
4117 		if (out_fence_fd < 0) {
4118 			VMW_DEBUG_USER("Failed to get a fence fd.\n");
4119 			return out_fence_fd;
4120 		}
4121 	}
4122 
4123 	if (throttle_us) {
4124 		VMW_DEBUG_USER("Throttling is no longer supported.\n");
4125 	}
4126 
4127 	kernel_commands = vmw_execbuf_cmdbuf(dev_priv, user_commands,
4128 					     kernel_commands, command_size,
4129 					     &header);
4130 	if (IS_ERR(kernel_commands)) {
4131 		ret = PTR_ERR(kernel_commands);
4132 		goto out_free_fence_fd;
4133 	}
4134 
4135 	ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
4136 	if (ret) {
4137 		ret = -ERESTARTSYS;
4138 		goto out_free_header;
4139 	}
4140 
4141 	sw_context->kernel = false;
4142 	if (kernel_commands == NULL) {
4143 		ret = vmw_resize_cmd_bounce(sw_context, command_size);
4144 		if (unlikely(ret != 0))
4145 			goto out_unlock;
4146 
4147 		ret = copy_from_user(sw_context->cmd_bounce, user_commands,
4148 				     command_size);
4149 		if (unlikely(ret != 0)) {
4150 			ret = -EFAULT;
4151 			VMW_DEBUG_USER("Failed copying commands.\n");
4152 			goto out_unlock;
4153 		}
4154 
4155 		kernel_commands = sw_context->cmd_bounce;
4156 	} else if (!header) {
4157 		sw_context->kernel = true;
4158 	}
4159 
4160 	sw_context->filp = file_priv;
4161 	sw_context->fp = vmw_fpriv(file_priv);
4162 	INIT_LIST_HEAD(&sw_context->ctx_list);
4163 	sw_context->cur_query_bo = dev_priv->pinned_bo;
4164 	sw_context->last_query_ctx = NULL;
4165 	sw_context->needs_post_query_barrier = false;
4166 	sw_context->dx_ctx_node = NULL;
4167 	sw_context->dx_query_mob = NULL;
4168 	sw_context->dx_query_ctx = NULL;
4169 	memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
4170 	INIT_LIST_HEAD(&sw_context->res_relocations);
4171 	INIT_LIST_HEAD(&sw_context->bo_relocations);
4172 
4173 	if (sw_context->staged_bindings)
4174 		vmw_binding_state_reset(sw_context->staged_bindings);
4175 
4176 	INIT_LIST_HEAD(&sw_context->staged_cmd_res);
4177 	sw_context->ctx = &val_ctx;
4178 	ret = vmw_execbuf_tie_context(dev_priv, sw_context, dx_context_handle);
4179 	if (unlikely(ret != 0))
4180 		goto out_err_nores;
4181 
4182 	ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
4183 				command_size);
4184 	if (unlikely(ret != 0))
4185 		goto out_err_nores;
4186 
4187 	ret = vmw_resources_reserve(sw_context);
4188 	if (unlikely(ret != 0))
4189 		goto out_err_nores;
4190 
4191 	ret = vmw_validation_bo_reserve(&val_ctx, true);
4192 	if (unlikely(ret != 0))
4193 		goto out_err_nores;
4194 
4195 	ret = vmw_validation_bo_validate(&val_ctx, true);
4196 	if (unlikely(ret != 0))
4197 		goto out_err;
4198 
4199 	ret = vmw_validation_res_validate(&val_ctx, true);
4200 	if (unlikely(ret != 0))
4201 		goto out_err;
4202 
4203 	vmw_validation_drop_ht(&val_ctx);
4204 
4205 	ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
4206 	if (unlikely(ret != 0)) {
4207 		ret = -ERESTARTSYS;
4208 		goto out_err;
4209 	}
4210 
4211 	if (dev_priv->has_mob) {
4212 		ret = vmw_rebind_contexts(sw_context);
4213 		if (unlikely(ret != 0))
4214 			goto out_unlock_binding;
4215 	}
4216 
4217 	if (!header) {
4218 		ret = vmw_execbuf_submit_fifo(dev_priv, kernel_commands,
4219 					      command_size, sw_context);
4220 	} else {
4221 		ret = vmw_execbuf_submit_cmdbuf(dev_priv, header, command_size,
4222 						sw_context);
4223 		header = NULL;
4224 	}
4225 	mutex_unlock(&dev_priv->binding_mutex);
4226 	if (ret)
4227 		goto out_err;
4228 
4229 	vmw_query_bo_switch_commit(dev_priv, sw_context);
4230 	ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
4231 					 (user_fence_rep) ? &handle : NULL);
4232 	/*
4233 	 * This error is harmless, because if fence submission fails,
4234 	 * vmw_fifo_send_fence will sync. The error will be propagated to
4235 	 * user-space in @fence_rep
4236 	 */
4237 	if (ret != 0)
4238 		VMW_DEBUG_USER("Fence submission error. Syncing.\n");
4239 
4240 	vmw_execbuf_bindings_commit(sw_context, false);
4241 	vmw_bind_dx_query_mob(sw_context);
4242 	vmw_validation_res_unreserve(&val_ctx, false);
4243 
4244 	vmw_validation_bo_fence(sw_context->ctx, fence);
4245 
4246 	if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid))
4247 		__vmw_execbuf_release_pinned_bo(dev_priv, fence);
4248 
4249 	/*
4250 	 * If anything fails here, give up trying to export the fence and do a
4251 	 * sync since the user mode will not be able to sync the fence itself.
4252 	 * This ensures we are still functionally correct.
4253 	 */
4254 	if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
4255 
4256 		sync_file = sync_file_create(&fence->base);
4257 		if (!sync_file) {
4258 			VMW_DEBUG_USER("Sync file create failed for fence\n");
4259 			put_unused_fd(out_fence_fd);
4260 			out_fence_fd = -1;
4261 
4262 			(void) vmw_fence_obj_wait(fence, false, false,
4263 						  VMW_FENCE_WAIT_TIMEOUT);
4264 		}
4265 	}
4266 
4267 	ret = vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
4268 				    user_fence_rep, fence, handle, out_fence_fd);
4269 
4270 	if (sync_file) {
4271 		if (ret) {
4272 			/* usercopy of fence failed, put the file object */
4273 			fput(sync_file->file);
4274 			put_unused_fd(out_fence_fd);
4275 		} else {
4276 			/* Link the fence with the FD created earlier */
4277 			fd_install(out_fence_fd, sync_file->file);
4278 		}
4279 	}
4280 
4281 	/* Don't unreference when handing fence out */
4282 	if (unlikely(out_fence != NULL)) {
4283 		*out_fence = fence;
4284 		fence = NULL;
4285 	} else if (likely(fence != NULL)) {
4286 		vmw_fence_obj_unreference(&fence);
4287 	}
4288 
4289 	vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res);
4290 	mutex_unlock(&dev_priv->cmdbuf_mutex);
4291 
4292 	/*
4293 	 * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks
4294 	 * in resource destruction paths.
4295 	 */
4296 	vmw_validation_unref_lists(&val_ctx);
4297 
4298 	return ret;
4299 
4300 out_unlock_binding:
4301 	mutex_unlock(&dev_priv->binding_mutex);
4302 out_err:
4303 	vmw_validation_bo_backoff(&val_ctx);
4304 out_err_nores:
4305 	vmw_execbuf_bindings_commit(sw_context, true);
4306 	vmw_validation_res_unreserve(&val_ctx, true);
4307 	vmw_resource_relocations_free(&sw_context->res_relocations);
4308 	vmw_free_relocations(sw_context);
4309 	if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid))
4310 		__vmw_execbuf_release_pinned_bo(dev_priv, NULL);
4311 out_unlock:
4312 	vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res);
4313 	vmw_validation_drop_ht(&val_ctx);
4314 	WARN_ON(!list_empty(&sw_context->ctx_list));
4315 	mutex_unlock(&dev_priv->cmdbuf_mutex);
4316 
4317 	/*
4318 	 * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks
4319 	 * in resource destruction paths.
4320 	 */
4321 	vmw_validation_unref_lists(&val_ctx);
4322 out_free_header:
4323 	if (header)
4324 		vmw_cmdbuf_header_free(header);
4325 out_free_fence_fd:
4326 	if (out_fence_fd >= 0)
4327 		put_unused_fd(out_fence_fd);
4328 
4329 	return ret;
4330 }
4331 
4332 /**
4333  * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
4334  *
4335  * @dev_priv: The device private structure.
4336  *
4337  * This function is called to idle the fifo and unpin the query buffer if the
4338  * normal way to do this hits an error, which should typically be extremely
4339  * rare.
4340  */
4341 static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
4342 {
4343 	VMW_DEBUG_USER("Can't unpin query buffer. Trying to recover.\n");
4344 
4345 	(void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
4346 	vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
4347 	if (dev_priv->dummy_query_bo_pinned) {
4348 		vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
4349 		dev_priv->dummy_query_bo_pinned = false;
4350 	}
4351 }
4352 
4353 
4354 /**
4355  * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query
4356  * bo.
4357  *
4358  * @dev_priv: The device private structure.
4359  * @fence: If non-NULL should point to a struct vmw_fence_obj issued _after_ a
4360  * query barrier that flushes all queries touching the current buffer pointed to
4361  * by @dev_priv->pinned_bo
4362  *
4363  * This function should be used to unpin the pinned query bo, or as a query
4364  * barrier when we need to make sure that all queries have finished before the
4365  * next fifo command. (For example on hardware context destructions where the
4366  * hardware may otherwise leak unfinished queries).
4367  *
4368  * This function does not return any failure codes, but make attempts to do safe
4369  * unpinning in case of errors.
4370  *
4371  * The function will synchronize on the previous query barrier, and will thus
4372  * not finish until that barrier has executed.
4373  *
4374  * the @dev_priv->cmdbuf_mutex needs to be held by the current thread before
4375  * calling this function.
4376  */
4377 void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
4378 				     struct vmw_fence_obj *fence)
4379 {
4380 	int ret = 0;
4381 	struct vmw_fence_obj *lfence = NULL;
4382 	DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
4383 
4384 	if (dev_priv->pinned_bo == NULL)
4385 		goto out_unlock;
4386 
4387 	vmw_bo_placement_set(dev_priv->pinned_bo,
4388 			     VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
4389 			     VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
4390 	ret = vmw_validation_add_bo(&val_ctx, dev_priv->pinned_bo);
4391 	if (ret)
4392 		goto out_no_reserve;
4393 
4394 	vmw_bo_placement_set(dev_priv->dummy_query_bo,
4395 			     VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
4396 			     VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
4397 	ret = vmw_validation_add_bo(&val_ctx, dev_priv->dummy_query_bo);
4398 	if (ret)
4399 		goto out_no_reserve;
4400 
4401 	ret = vmw_validation_bo_reserve(&val_ctx, false);
4402 	if (ret)
4403 		goto out_no_reserve;
4404 
4405 	if (dev_priv->query_cid_valid) {
4406 		BUG_ON(fence != NULL);
4407 		ret = vmw_cmd_emit_dummy_query(dev_priv, dev_priv->query_cid);
4408 		if (ret)
4409 			goto out_no_emit;
4410 		dev_priv->query_cid_valid = false;
4411 	}
4412 
4413 	vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
4414 	if (dev_priv->dummy_query_bo_pinned) {
4415 		vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
4416 		dev_priv->dummy_query_bo_pinned = false;
4417 	}
4418 	if (fence == NULL) {
4419 		(void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
4420 						  NULL);
4421 		fence = lfence;
4422 	}
4423 	vmw_validation_bo_fence(&val_ctx, fence);
4424 	if (lfence != NULL)
4425 		vmw_fence_obj_unreference(&lfence);
4426 
4427 	vmw_validation_unref_lists(&val_ctx);
4428 	vmw_bo_unreference(&dev_priv->pinned_bo);
4429 
4430 out_unlock:
4431 	return;
4432 out_no_emit:
4433 	vmw_validation_bo_backoff(&val_ctx);
4434 out_no_reserve:
4435 	vmw_validation_unref_lists(&val_ctx);
4436 	vmw_execbuf_unpin_panic(dev_priv);
4437 	vmw_bo_unreference(&dev_priv->pinned_bo);
4438 }
4439 
4440 /**
4441  * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query bo.
4442  *
4443  * @dev_priv: The device private structure.
4444  *
4445  * This function should be used to unpin the pinned query bo, or as a query
4446  * barrier when we need to make sure that all queries have finished before the
4447  * next fifo command. (For example on hardware context destructions where the
4448  * hardware may otherwise leak unfinished queries).
4449  *
4450  * This function does not return any failure codes, but make attempts to do safe
4451  * unpinning in case of errors.
4452  *
4453  * The function will synchronize on the previous query barrier, and will thus
4454  * not finish until that barrier has executed.
4455  */
4456 void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
4457 {
4458 	mutex_lock(&dev_priv->cmdbuf_mutex);
4459 	if (dev_priv->query_cid_valid)
4460 		__vmw_execbuf_release_pinned_bo(dev_priv, NULL);
4461 	mutex_unlock(&dev_priv->cmdbuf_mutex);
4462 }
4463 
4464 int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
4465 		      struct drm_file *file_priv)
4466 {
4467 	struct vmw_private *dev_priv = vmw_priv(dev);
4468 	struct drm_vmw_execbuf_arg *arg = data;
4469 	int ret;
4470 	struct dma_fence *in_fence = NULL;
4471 
4472 	MKS_STAT_TIME_DECL(MKSSTAT_KERN_EXECBUF);
4473 	MKS_STAT_TIME_PUSH(MKSSTAT_KERN_EXECBUF);
4474 
4475 	/*
4476 	 * Extend the ioctl argument while maintaining backwards compatibility:
4477 	 * We take different code paths depending on the value of arg->version.
4478 	 *
4479 	 * Note: The ioctl argument is extended and zeropadded by core DRM.
4480 	 */
4481 	if (unlikely(arg->version > DRM_VMW_EXECBUF_VERSION ||
4482 		     arg->version == 0)) {
4483 		VMW_DEBUG_USER("Incorrect execbuf version.\n");
4484 		ret = -EINVAL;
4485 		goto mksstats_out;
4486 	}
4487 
4488 	switch (arg->version) {
4489 	case 1:
4490 		/* For v1 core DRM have extended + zeropadded the data */
4491 		arg->context_handle = (uint32_t) -1;
4492 		break;
4493 	case 2:
4494 	default:
4495 		/* For v2 and later core DRM would have correctly copied it */
4496 		break;
4497 	}
4498 
4499 	/* If imported a fence FD from elsewhere, then wait on it */
4500 	if (arg->flags & DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD) {
4501 		in_fence = sync_file_get_fence(arg->imported_fence_fd);
4502 
4503 		if (!in_fence) {
4504 			VMW_DEBUG_USER("Cannot get imported fence\n");
4505 			ret = -EINVAL;
4506 			goto mksstats_out;
4507 		}
4508 
4509 		ret = dma_fence_wait(in_fence, true);
4510 		if (ret)
4511 			goto out;
4512 	}
4513 
4514 	ret = vmw_execbuf_process(file_priv, dev_priv,
4515 				  (void __user *)(unsigned long)arg->commands,
4516 				  NULL, arg->command_size, arg->throttle_us,
4517 				  arg->context_handle,
4518 				  (void __user *)(unsigned long)arg->fence_rep,
4519 				  NULL, arg->flags);
4520 
4521 	if (unlikely(ret != 0))
4522 		goto out;
4523 
4524 out:
4525 	if (in_fence)
4526 		dma_fence_put(in_fence);
4527 
4528 mksstats_out:
4529 	MKS_STAT_TIME_POP(MKSSTAT_KERN_EXECBUF);
4530 	return ret;
4531 }
4532