1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #include <linux/virtio.h> 27 #include <linux/virtio_config.h> 28 #include <drm/drmP.h> 29 #include "virtgpu_drv.h" 30 31 static int virtio_gpu_fbdev = 1; 32 33 MODULE_PARM_DESC(fbdev, "Disable/Enable framebuffer device & console"); 34 module_param_named(fbdev, virtio_gpu_fbdev, int, 0400); 35 36 static void virtio_gpu_config_changed_work_func(struct work_struct *work) 37 { 38 struct virtio_gpu_device *vgdev = 39 container_of(work, struct virtio_gpu_device, 40 config_changed_work); 41 u32 events_read, events_clear = 0; 42 43 /* read the config space */ 44 virtio_cread(vgdev->vdev, struct virtio_gpu_config, 45 events_read, &events_read); 46 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) { 47 virtio_gpu_cmd_get_display_info(vgdev); 48 drm_helper_hpd_irq_event(vgdev->ddev); 49 events_clear |= VIRTIO_GPU_EVENT_DISPLAY; 50 } 51 virtio_cwrite(vgdev->vdev, struct virtio_gpu_config, 52 events_clear, &events_clear); 53 } 54 55 static void virtio_gpu_ctx_id_get(struct virtio_gpu_device *vgdev, 56 uint32_t *resid) 57 { 58 int handle; 59 60 idr_preload(GFP_KERNEL); 61 spin_lock(&vgdev->ctx_id_idr_lock); 62 handle = idr_alloc(&vgdev->ctx_id_idr, NULL, 1, 0, 0); 63 spin_unlock(&vgdev->ctx_id_idr_lock); 64 idr_preload_end(); 65 *resid = handle; 66 } 67 68 static void virtio_gpu_ctx_id_put(struct virtio_gpu_device *vgdev, uint32_t id) 69 { 70 spin_lock(&vgdev->ctx_id_idr_lock); 71 idr_remove(&vgdev->ctx_id_idr, id); 72 spin_unlock(&vgdev->ctx_id_idr_lock); 73 } 74 75 static void virtio_gpu_context_create(struct virtio_gpu_device *vgdev, 76 uint32_t nlen, const char *name, 77 uint32_t *ctx_id) 78 { 79 virtio_gpu_ctx_id_get(vgdev, ctx_id); 80 virtio_gpu_cmd_context_create(vgdev, *ctx_id, nlen, name); 81 } 82 83 static void virtio_gpu_context_destroy(struct virtio_gpu_device *vgdev, 84 uint32_t ctx_id) 85 { 86 virtio_gpu_cmd_context_destroy(vgdev, ctx_id); 87 virtio_gpu_ctx_id_put(vgdev, ctx_id); 88 } 89 90 static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq, 91 void (*work_func)(struct work_struct *work)) 92 { 93 spin_lock_init(&vgvq->qlock); 94 init_waitqueue_head(&vgvq->ack_queue); 95 INIT_WORK(&vgvq->dequeue_work, work_func); 96 } 97 98 static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev, 99 int num_capsets) 100 { 101 int i, ret; 102 103 vgdev->capsets = kcalloc(num_capsets, 104 sizeof(struct virtio_gpu_drv_capset), 105 GFP_KERNEL); 106 if (!vgdev->capsets) { 107 DRM_ERROR("failed to allocate cap sets\n"); 108 return; 109 } 110 for (i = 0; i < num_capsets; i++) { 111 virtio_gpu_cmd_get_capset_info(vgdev, i); 112 ret = wait_event_timeout(vgdev->resp_wq, 113 vgdev->capsets[i].id > 0, 5 * HZ); 114 if (ret == 0) { 115 DRM_ERROR("timed out waiting for cap set %d\n", i); 116 kfree(vgdev->capsets); 117 vgdev->capsets = NULL; 118 return; 119 } 120 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n", 121 i, vgdev->capsets[i].id, 122 vgdev->capsets[i].max_version, 123 vgdev->capsets[i].max_size); 124 } 125 vgdev->num_capsets = num_capsets; 126 } 127 128 int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags) 129 { 130 static vq_callback_t *callbacks[] = { 131 virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack 132 }; 133 static const char * const names[] = { "control", "cursor" }; 134 135 struct virtio_gpu_device *vgdev; 136 /* this will expand later */ 137 struct virtqueue *vqs[2]; 138 u32 num_scanouts, num_capsets; 139 int ret; 140 141 if (!virtio_has_feature(dev->virtdev, VIRTIO_F_VERSION_1)) 142 return -ENODEV; 143 144 vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL); 145 if (!vgdev) 146 return -ENOMEM; 147 148 vgdev->ddev = dev; 149 dev->dev_private = vgdev; 150 vgdev->vdev = dev->virtdev; 151 vgdev->dev = dev->dev; 152 153 spin_lock_init(&vgdev->display_info_lock); 154 spin_lock_init(&vgdev->ctx_id_idr_lock); 155 idr_init(&vgdev->ctx_id_idr); 156 spin_lock_init(&vgdev->resource_idr_lock); 157 idr_init(&vgdev->resource_idr); 158 init_waitqueue_head(&vgdev->resp_wq); 159 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func); 160 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func); 161 162 vgdev->fence_drv.context = dma_fence_context_alloc(1); 163 spin_lock_init(&vgdev->fence_drv.lock); 164 INIT_LIST_HEAD(&vgdev->fence_drv.fences); 165 INIT_LIST_HEAD(&vgdev->cap_cache); 166 INIT_WORK(&vgdev->config_changed_work, 167 virtio_gpu_config_changed_work_func); 168 169 #ifdef __LITTLE_ENDIAN 170 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL)) 171 vgdev->has_virgl_3d = true; 172 DRM_INFO("virgl 3d acceleration %s\n", 173 vgdev->has_virgl_3d ? "enabled" : "not supported by host"); 174 #else 175 DRM_INFO("virgl 3d acceleration not supported by guest\n"); 176 #endif 177 178 ret = vgdev->vdev->config->find_vqs(vgdev->vdev, 2, vqs, 179 callbacks, names, NULL); 180 if (ret) { 181 DRM_ERROR("failed to find virt queues\n"); 182 goto err_vqs; 183 } 184 vgdev->ctrlq.vq = vqs[0]; 185 vgdev->cursorq.vq = vqs[1]; 186 ret = virtio_gpu_alloc_vbufs(vgdev); 187 if (ret) { 188 DRM_ERROR("failed to alloc vbufs\n"); 189 goto err_vbufs; 190 } 191 192 ret = virtio_gpu_ttm_init(vgdev); 193 if (ret) { 194 DRM_ERROR("failed to init ttm %d\n", ret); 195 goto err_ttm; 196 } 197 198 /* get display info */ 199 virtio_cread(vgdev->vdev, struct virtio_gpu_config, 200 num_scanouts, &num_scanouts); 201 vgdev->num_scanouts = min_t(uint32_t, num_scanouts, 202 VIRTIO_GPU_MAX_SCANOUTS); 203 if (!vgdev->num_scanouts) { 204 DRM_ERROR("num_scanouts is zero\n"); 205 ret = -EINVAL; 206 goto err_scanouts; 207 } 208 DRM_INFO("number of scanouts: %d\n", num_scanouts); 209 210 virtio_cread(vgdev->vdev, struct virtio_gpu_config, 211 num_capsets, &num_capsets); 212 DRM_INFO("number of cap sets: %d\n", num_capsets); 213 214 ret = virtio_gpu_modeset_init(vgdev); 215 if (ret) 216 goto err_modeset; 217 218 virtio_device_ready(vgdev->vdev); 219 vgdev->vqs_ready = true; 220 221 if (num_capsets) 222 virtio_gpu_get_capsets(vgdev, num_capsets); 223 virtio_gpu_cmd_get_display_info(vgdev); 224 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending, 225 5 * HZ); 226 if (virtio_gpu_fbdev) 227 virtio_gpu_fbdev_init(vgdev); 228 229 return 0; 230 231 err_modeset: 232 err_scanouts: 233 virtio_gpu_ttm_fini(vgdev); 234 err_ttm: 235 virtio_gpu_free_vbufs(vgdev); 236 err_vbufs: 237 vgdev->vdev->config->del_vqs(vgdev->vdev); 238 err_vqs: 239 kfree(vgdev); 240 return ret; 241 } 242 243 static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev) 244 { 245 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp; 246 247 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) { 248 kfree(cache_ent->caps_cache); 249 kfree(cache_ent); 250 } 251 } 252 253 void virtio_gpu_driver_unload(struct drm_device *dev) 254 { 255 struct virtio_gpu_device *vgdev = dev->dev_private; 256 257 vgdev->vqs_ready = false; 258 flush_work(&vgdev->ctrlq.dequeue_work); 259 flush_work(&vgdev->cursorq.dequeue_work); 260 flush_work(&vgdev->config_changed_work); 261 vgdev->vdev->config->del_vqs(vgdev->vdev); 262 263 virtio_gpu_modeset_fini(vgdev); 264 virtio_gpu_ttm_fini(vgdev); 265 virtio_gpu_free_vbufs(vgdev); 266 virtio_gpu_cleanup_cap_cache(vgdev); 267 kfree(vgdev->capsets); 268 kfree(vgdev); 269 } 270 271 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file) 272 { 273 struct virtio_gpu_device *vgdev = dev->dev_private; 274 struct virtio_gpu_fpriv *vfpriv; 275 uint32_t id; 276 char dbgname[64], tmpname[TASK_COMM_LEN]; 277 278 /* can't create contexts without 3d renderer */ 279 if (!vgdev->has_virgl_3d) 280 return 0; 281 282 get_task_comm(tmpname, current); 283 snprintf(dbgname, sizeof(dbgname), "%s", tmpname); 284 dbgname[63] = 0; 285 /* allocate a virt GPU context for this opener */ 286 vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL); 287 if (!vfpriv) 288 return -ENOMEM; 289 290 virtio_gpu_context_create(vgdev, strlen(dbgname), dbgname, &id); 291 292 vfpriv->ctx_id = id; 293 file->driver_priv = vfpriv; 294 return 0; 295 } 296 297 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file) 298 { 299 struct virtio_gpu_device *vgdev = dev->dev_private; 300 struct virtio_gpu_fpriv *vfpriv; 301 302 if (!vgdev->has_virgl_3d) 303 return; 304 305 vfpriv = file->driver_priv; 306 307 virtio_gpu_context_destroy(vgdev, vfpriv->ctx_id); 308 kfree(vfpriv); 309 file->driver_priv = NULL; 310 } 311