1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #include <linux/virtio.h> 27 #include <linux/virtio_config.h> 28 #include <linux/virtio_ring.h> 29 30 #include <drm/drm_file.h> 31 #include <drm/drm_managed.h> 32 #include <drm/drm_print.h> 33 34 #include "virtgpu_drv.h" 35 36 static void virtio_gpu_config_changed_work_func(struct work_struct *work) 37 { 38 struct virtio_gpu_device *vgdev = 39 container_of(work, struct virtio_gpu_device, 40 config_changed_work); 41 u32 events_read, events_clear = 0; 42 43 /* read the config space */ 44 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 45 events_read, &events_read); 46 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) { 47 if (vgdev->num_scanouts) { 48 if (vgdev->has_edid) 49 virtio_gpu_cmd_get_edids(vgdev); 50 virtio_gpu_cmd_get_display_info(vgdev); 51 virtio_gpu_notify(vgdev); 52 drm_helper_hpd_irq_event(vgdev->ddev); 53 } 54 events_clear |= VIRTIO_GPU_EVENT_DISPLAY; 55 } 56 virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config, 57 events_clear, &events_clear); 58 } 59 60 static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq, 61 void (*work_func)(struct work_struct *work)) 62 { 63 spin_lock_init(&vgvq->qlock); 64 init_waitqueue_head(&vgvq->ack_queue); 65 INIT_WORK(&vgvq->dequeue_work, work_func); 66 } 67 68 static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev, 69 int num_capsets) 70 { 71 int i, ret; 72 bool invalid_capset_id = false; 73 struct drm_device *drm = vgdev->ddev; 74 75 vgdev->capsets = drmm_kcalloc(drm, num_capsets, 76 sizeof(struct virtio_gpu_drv_capset), 77 GFP_KERNEL); 78 if (!vgdev->capsets) { 79 DRM_ERROR("failed to allocate cap sets\n"); 80 return; 81 } 82 for (i = 0; i < num_capsets; i++) { 83 virtio_gpu_cmd_get_capset_info(vgdev, i); 84 virtio_gpu_notify(vgdev); 85 ret = wait_event_timeout(vgdev->resp_wq, 86 vgdev->capsets[i].id > 0, 5 * HZ); 87 /* 88 * Capability ids are defined in the virtio-gpu spec and are 89 * between 1 to 63, inclusive. 90 */ 91 if (!vgdev->capsets[i].id || 92 vgdev->capsets[i].id > MAX_CAPSET_ID) 93 invalid_capset_id = true; 94 95 if (ret == 0) 96 DRM_ERROR("timed out waiting for cap set %d\n", i); 97 else if (invalid_capset_id) 98 DRM_ERROR("invalid capset id %u", vgdev->capsets[i].id); 99 100 if (ret == 0 || invalid_capset_id) { 101 spin_lock(&vgdev->display_info_lock); 102 drmm_kfree(drm, vgdev->capsets); 103 vgdev->capsets = NULL; 104 spin_unlock(&vgdev->display_info_lock); 105 return; 106 } 107 108 vgdev->capset_id_mask |= 1 << vgdev->capsets[i].id; 109 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n", 110 i, vgdev->capsets[i].id, 111 vgdev->capsets[i].max_version, 112 vgdev->capsets[i].max_size); 113 } 114 115 vgdev->num_capsets = num_capsets; 116 } 117 118 int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev) 119 { 120 struct virtqueue_info vqs_info[] = { 121 { "control", virtio_gpu_ctrl_ack }, 122 { "cursor", virtio_gpu_cursor_ack }, 123 }; 124 struct virtio_gpu_device *vgdev; 125 /* this will expand later */ 126 struct virtqueue *vqs[2]; 127 u32 num_scanouts, num_capsets, blob_alignment; 128 int ret = 0; 129 130 if (!virtio_has_feature(vdev, VIRTIO_F_VERSION_1)) 131 return -ENODEV; 132 133 vgdev = drmm_kzalloc(dev, sizeof(struct virtio_gpu_device), GFP_KERNEL); 134 if (!vgdev) 135 return -ENOMEM; 136 137 vgdev->ddev = dev; 138 dev->dev_private = vgdev; 139 vgdev->vdev = vdev; 140 141 spin_lock_init(&vgdev->display_info_lock); 142 spin_lock_init(&vgdev->resource_export_lock); 143 spin_lock_init(&vgdev->host_visible_lock); 144 ida_init(&vgdev->ctx_id_ida); 145 ida_init(&vgdev->resource_ida); 146 init_waitqueue_head(&vgdev->resp_wq); 147 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func); 148 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func); 149 150 vgdev->fence_drv.context = dma_fence_context_alloc(1); 151 spin_lock_init(&vgdev->fence_drv.lock); 152 INIT_LIST_HEAD(&vgdev->fence_drv.fences); 153 INIT_LIST_HEAD(&vgdev->cap_cache); 154 INIT_WORK(&vgdev->config_changed_work, 155 virtio_gpu_config_changed_work_func); 156 157 INIT_WORK(&vgdev->obj_free_work, 158 virtio_gpu_array_put_free_work); 159 INIT_LIST_HEAD(&vgdev->obj_free_list); 160 spin_lock_init(&vgdev->obj_free_lock); 161 162 #ifdef __LITTLE_ENDIAN 163 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL)) 164 vgdev->has_virgl_3d = true; 165 #endif 166 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) 167 vgdev->has_edid = true; 168 169 if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) 170 vgdev->has_indirect = true; 171 172 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) 173 vgdev->has_resource_assign_uuid = true; 174 175 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_BLOB)) 176 vgdev->has_resource_blob = true; 177 178 if (virtio_get_shm_region(vgdev->vdev, &vgdev->host_visible_region, 179 VIRTIO_GPU_SHM_ID_HOST_VISIBLE)) { 180 if (!devm_request_mem_region(&vgdev->vdev->dev, 181 vgdev->host_visible_region.addr, 182 vgdev->host_visible_region.len, 183 dev_name(&vgdev->vdev->dev))) { 184 DRM_ERROR("Could not reserve host visible region\n"); 185 ret = -EBUSY; 186 goto err_vqs; 187 } 188 189 DRM_INFO("Host memory window: 0x%lx +0x%lx\n", 190 (unsigned long)vgdev->host_visible_region.addr, 191 (unsigned long)vgdev->host_visible_region.len); 192 vgdev->has_host_visible = true; 193 drm_mm_init(&vgdev->host_visible_mm, 194 (unsigned long)vgdev->host_visible_region.addr, 195 (unsigned long)vgdev->host_visible_region.len); 196 } 197 198 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_CONTEXT_INIT)) 199 vgdev->has_context_init = true; 200 201 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_BLOB_ALIGNMENT)) { 202 vgdev->has_blob_alignment = true; 203 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 204 blob_alignment, &blob_alignment); 205 vgdev->blob_alignment = blob_alignment; 206 } 207 208 DRM_INFO("features: %cvirgl %cedid %cresource_blob %chost_visible", 209 vgdev->has_virgl_3d ? '+' : '-', 210 vgdev->has_edid ? '+' : '-', 211 vgdev->has_resource_blob ? '+' : '-', 212 vgdev->has_host_visible ? '+' : '-'); 213 214 DRM_INFO("features: %ccontext_init %cblob_alignment\n", 215 vgdev->has_context_init ? '+' : '-', 216 vgdev->has_blob_alignment ? '+' : '-'); 217 218 ret = virtio_find_vqs(vgdev->vdev, 2, vqs, vqs_info, NULL); 219 if (ret) { 220 DRM_ERROR("failed to find virt queues\n"); 221 goto err_vqs; 222 } 223 vgdev->ctrlq.vq = vqs[0]; 224 vgdev->cursorq.vq = vqs[1]; 225 ret = virtio_gpu_alloc_vbufs(vgdev); 226 if (ret) { 227 DRM_ERROR("failed to alloc vbufs\n"); 228 goto err_vbufs; 229 } 230 231 /* get display info */ 232 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 233 num_scanouts, &num_scanouts); 234 vgdev->num_scanouts = min_t(uint32_t, num_scanouts, 235 VIRTIO_GPU_MAX_SCANOUTS); 236 237 if (!IS_ENABLED(CONFIG_DRM_VIRTIO_GPU_KMS) || !vgdev->num_scanouts) { 238 DRM_INFO("KMS disabled\n"); 239 vgdev->num_scanouts = 0; 240 vgdev->has_edid = false; 241 dev->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC); 242 } else { 243 DRM_INFO("number of scanouts: %d\n", num_scanouts); 244 } 245 246 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 247 num_capsets, &num_capsets); 248 DRM_INFO("number of cap sets: %d\n", num_capsets); 249 250 ret = virtio_gpu_modeset_init(vgdev); 251 if (ret) { 252 DRM_ERROR("modeset init failed\n"); 253 goto err_scanouts; 254 } 255 256 virtio_device_ready(vgdev->vdev); 257 258 if (num_capsets) 259 virtio_gpu_get_capsets(vgdev, num_capsets); 260 if (vgdev->num_scanouts) { 261 if (vgdev->has_edid) 262 virtio_gpu_cmd_get_edids(vgdev); 263 virtio_gpu_cmd_get_display_info(vgdev); 264 virtio_gpu_notify(vgdev); 265 wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending, 266 5 * HZ); 267 } 268 return 0; 269 270 err_scanouts: 271 virtio_gpu_free_vbufs(vgdev); 272 err_vbufs: 273 vgdev->vdev->config->del_vqs(vgdev->vdev); 274 err_vqs: 275 dev->dev_private = NULL; 276 return ret; 277 } 278 279 static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev) 280 { 281 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp; 282 283 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) { 284 kfree(cache_ent->caps_cache); 285 kfree(cache_ent); 286 } 287 } 288 289 void virtio_gpu_deinit(struct drm_device *dev) 290 { 291 struct virtio_gpu_device *vgdev = dev->dev_private; 292 293 flush_work(&vgdev->obj_free_work); 294 flush_work(&vgdev->ctrlq.dequeue_work); 295 flush_work(&vgdev->cursorq.dequeue_work); 296 flush_work(&vgdev->config_changed_work); 297 virtio_reset_device(vgdev->vdev); 298 vgdev->vdev->config->del_vqs(vgdev->vdev); 299 } 300 301 void virtio_gpu_release(struct drm_device *dev) 302 { 303 struct virtio_gpu_device *vgdev = dev->dev_private; 304 305 if (!vgdev) 306 return; 307 308 virtio_gpu_modeset_fini(vgdev); 309 virtio_gpu_free_vbufs(vgdev); 310 virtio_gpu_cleanup_cap_cache(vgdev); 311 312 if (vgdev->has_host_visible) 313 drm_mm_takedown(&vgdev->host_visible_mm); 314 } 315 316 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file) 317 { 318 struct virtio_gpu_device *vgdev = dev->dev_private; 319 struct virtio_gpu_fpriv *vfpriv; 320 int handle; 321 322 /* can't create contexts without 3d renderer */ 323 if (!vgdev->has_virgl_3d) 324 return 0; 325 326 /* allocate a virt GPU context for this opener */ 327 vfpriv = kzalloc_obj(*vfpriv); 328 if (!vfpriv) 329 return -ENOMEM; 330 331 mutex_init(&vfpriv->context_lock); 332 333 handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL); 334 if (handle < 0) { 335 kfree(vfpriv); 336 return handle; 337 } 338 339 vfpriv->ctx_id = handle + 1; 340 file->driver_priv = vfpriv; 341 return 0; 342 } 343 344 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file) 345 { 346 struct virtio_gpu_device *vgdev = dev->dev_private; 347 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 348 349 if (!vgdev->has_virgl_3d) 350 return; 351 352 if (vfpriv->context_created) { 353 virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id); 354 virtio_gpu_notify(vgdev); 355 } 356 357 ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1); 358 mutex_destroy(&vfpriv->context_lock); 359 kfree(vfpriv); 360 file->driver_priv = NULL; 361 } 362