1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #include <linux/suspend.h> 27 #include <linux/virtio.h> 28 #include <linux/virtio_config.h> 29 #include <linux/virtio_ring.h> 30 31 #include <drm/drm_file.h> 32 #include <drm/drm_managed.h> 33 #include <drm/drm_print.h> 34 35 #include "virtgpu_drv.h" 36 37 static void virtio_gpu_config_changed_work_func(struct work_struct *work) 38 { 39 struct virtio_gpu_device *vgdev = 40 container_of(work, struct virtio_gpu_device, 41 config_changed_work); 42 u32 events_read, events_clear = 0; 43 44 /* read the config space */ 45 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 46 events_read, &events_read); 47 if (events_read & VIRTIO_GPU_EVENT_DISPLAY) { 48 if (vgdev->num_scanouts) { 49 if (vgdev->has_edid) 50 virtio_gpu_cmd_get_edids(vgdev); 51 virtio_gpu_cmd_get_display_info(vgdev); 52 virtio_gpu_notify(vgdev); 53 drm_helper_hpd_irq_event(vgdev->ddev); 54 } 55 events_clear |= VIRTIO_GPU_EVENT_DISPLAY; 56 } 57 virtio_cwrite_le(vgdev->vdev, struct virtio_gpu_config, 58 events_clear, &events_clear); 59 } 60 61 static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq, 62 void (*work_func)(struct work_struct *work)) 63 { 64 spin_lock_init(&vgvq->qlock); 65 init_waitqueue_head(&vgvq->ack_queue); 66 INIT_WORK(&vgvq->dequeue_work, work_func); 67 } 68 69 static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev, 70 int num_capsets) 71 { 72 int i, ret; 73 bool invalid_capset_id = false; 74 struct drm_device *drm = vgdev->ddev; 75 76 vgdev->capsets = drmm_kcalloc(drm, num_capsets, 77 sizeof(struct virtio_gpu_drv_capset), 78 GFP_KERNEL); 79 if (!vgdev->capsets) { 80 DRM_ERROR("failed to allocate cap sets\n"); 81 return; 82 } 83 for (i = 0; i < num_capsets; i++) { 84 virtio_gpu_cmd_get_capset_info(vgdev, i); 85 virtio_gpu_notify(vgdev); 86 ret = wait_event_timeout(vgdev->resp_wq, 87 vgdev->capsets[i].id > 0, 5 * HZ); 88 /* 89 * Capability ids are defined in the virtio-gpu spec and are 90 * between 1 to 63, inclusive. 91 */ 92 if (!vgdev->capsets[i].id || 93 vgdev->capsets[i].id > MAX_CAPSET_ID) 94 invalid_capset_id = true; 95 96 if (ret == 0) 97 DRM_ERROR("timed out waiting for cap set %d\n", i); 98 else if (invalid_capset_id) 99 DRM_ERROR("invalid capset id %u", vgdev->capsets[i].id); 100 101 if (ret == 0 || invalid_capset_id) { 102 spin_lock(&vgdev->display_info_lock); 103 drmm_kfree(drm, vgdev->capsets); 104 vgdev->capsets = NULL; 105 spin_unlock(&vgdev->display_info_lock); 106 return; 107 } 108 109 vgdev->capset_id_mask |= 1 << vgdev->capsets[i].id; 110 DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n", 111 i, vgdev->capsets[i].id, 112 vgdev->capsets[i].max_version, 113 vgdev->capsets[i].max_size); 114 } 115 116 vgdev->num_capsets = num_capsets; 117 } 118 119 int virtio_gpu_find_vqs(struct virtio_gpu_device *vgdev) 120 { 121 struct virtqueue_info vqs_info[] = { 122 { "control", virtio_gpu_ctrl_ack }, 123 { "cursor", virtio_gpu_cursor_ack }, 124 }; 125 struct virtqueue *vqs[2]; 126 int ret; 127 128 ret = virtio_find_vqs(vgdev->vdev, 2, vqs, vqs_info, NULL); 129 if (ret) 130 return ret; 131 132 vgdev->ctrlq.vq = vqs[0]; 133 vgdev->cursorq.vq = vqs[1]; 134 135 return 0; 136 } 137 138 static int virtio_gpu_pm_notifier(struct notifier_block *nb, unsigned long mode, 139 void *data) 140 { 141 struct virtio_gpu_device *vgdev = container_of(nb, 142 struct virtio_gpu_device, 143 pm_nb); 144 145 switch (mode) { 146 case PM_HIBERNATION_PREPARE: 147 if (vgdev->has_virgl_3d) { 148 DRM_ERROR("S4 not allowed when VIRGL is enabled\n"); 149 return notifier_from_errno(-EPERM); 150 } 151 152 vgdev->hibernated = true; 153 break; 154 155 case PM_POST_HIBERNATION: 156 vgdev->hibernated = false; 157 break; 158 } 159 160 return NOTIFY_DONE; 161 } 162 163 int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev) 164 { 165 struct virtio_gpu_device *vgdev; 166 u32 num_scanouts, num_capsets, blob_alignment; 167 int ret = 0; 168 169 if (!virtio_has_feature(vdev, VIRTIO_F_VERSION_1)) 170 return -ENODEV; 171 172 vgdev = drmm_kzalloc(dev, sizeof(struct virtio_gpu_device), GFP_KERNEL); 173 if (!vgdev) 174 return -ENOMEM; 175 176 vgdev->ddev = dev; 177 dev->dev_private = vgdev; 178 vgdev->vdev = vdev; 179 180 spin_lock_init(&vgdev->display_info_lock); 181 spin_lock_init(&vgdev->resource_export_lock); 182 spin_lock_init(&vgdev->host_visible_lock); 183 ida_init(&vgdev->ctx_id_ida); 184 ida_init(&vgdev->resource_ida); 185 init_waitqueue_head(&vgdev->resp_wq); 186 virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func); 187 virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func); 188 189 vgdev->fence_drv.context = dma_fence_context_alloc(1); 190 spin_lock_init(&vgdev->fence_drv.lock); 191 INIT_LIST_HEAD(&vgdev->fence_drv.fences); 192 INIT_LIST_HEAD(&vgdev->cap_cache); 193 INIT_WORK(&vgdev->config_changed_work, 194 virtio_gpu_config_changed_work_func); 195 196 INIT_WORK(&vgdev->obj_free_work, 197 virtio_gpu_array_put_free_work); 198 INIT_LIST_HEAD(&vgdev->obj_free_list); 199 spin_lock_init(&vgdev->obj_free_lock); 200 INIT_LIST_HEAD(&vgdev->obj_restore_list); 201 mutex_init(&vgdev->obj_restore_lock); 202 203 #ifdef __LITTLE_ENDIAN 204 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL)) 205 vgdev->has_virgl_3d = true; 206 #endif 207 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) 208 vgdev->has_edid = true; 209 210 if (virtio_has_feature(vgdev->vdev, VIRTIO_RING_F_INDIRECT_DESC)) 211 vgdev->has_indirect = true; 212 213 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_UUID)) 214 vgdev->has_resource_assign_uuid = true; 215 216 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_RESOURCE_BLOB)) 217 vgdev->has_resource_blob = true; 218 219 if (virtio_get_shm_region(vgdev->vdev, &vgdev->host_visible_region, 220 VIRTIO_GPU_SHM_ID_HOST_VISIBLE)) { 221 if (!devm_request_mem_region(&vgdev->vdev->dev, 222 vgdev->host_visible_region.addr, 223 vgdev->host_visible_region.len, 224 dev_name(&vgdev->vdev->dev))) { 225 DRM_ERROR("Could not reserve host visible region\n"); 226 ret = -EBUSY; 227 goto err_vqs; 228 } 229 230 DRM_INFO("Host memory window: 0x%lx +0x%lx\n", 231 (unsigned long)vgdev->host_visible_region.addr, 232 (unsigned long)vgdev->host_visible_region.len); 233 vgdev->has_host_visible = true; 234 drm_mm_init(&vgdev->host_visible_mm, 235 (unsigned long)vgdev->host_visible_region.addr, 236 (unsigned long)vgdev->host_visible_region.len); 237 } 238 239 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_CONTEXT_INIT)) 240 vgdev->has_context_init = true; 241 242 if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_BLOB_ALIGNMENT)) { 243 vgdev->has_blob_alignment = true; 244 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 245 blob_alignment, &blob_alignment); 246 vgdev->blob_alignment = blob_alignment; 247 } 248 249 DRM_INFO("features: %cvirgl %cedid %cresource_blob %chost_visible", 250 vgdev->has_virgl_3d ? '+' : '-', 251 vgdev->has_edid ? '+' : '-', 252 vgdev->has_resource_blob ? '+' : '-', 253 vgdev->has_host_visible ? '+' : '-'); 254 255 DRM_INFO("features: %ccontext_init %cblob_alignment\n", 256 vgdev->has_context_init ? '+' : '-', 257 vgdev->has_blob_alignment ? '+' : '-'); 258 259 ret = virtio_gpu_find_vqs(vgdev); 260 if (ret) { 261 DRM_ERROR("failed to find virt queues\n"); 262 goto err_vqs; 263 } 264 ret = virtio_gpu_alloc_vbufs(vgdev); 265 if (ret) { 266 DRM_ERROR("failed to alloc vbufs\n"); 267 goto err_vbufs; 268 } 269 270 /* get display info */ 271 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 272 num_scanouts, &num_scanouts); 273 vgdev->num_scanouts = min_t(uint32_t, num_scanouts, 274 VIRTIO_GPU_MAX_SCANOUTS); 275 276 if (!IS_ENABLED(CONFIG_DRM_VIRTIO_GPU_KMS) || !vgdev->num_scanouts) { 277 DRM_INFO("KMS disabled\n"); 278 vgdev->num_scanouts = 0; 279 vgdev->has_edid = false; 280 dev->driver_features &= ~(DRIVER_MODESET | DRIVER_ATOMIC); 281 } else { 282 DRM_INFO("number of scanouts: %d\n", num_scanouts); 283 } 284 285 virtio_cread_le(vgdev->vdev, struct virtio_gpu_config, 286 num_capsets, &num_capsets); 287 DRM_INFO("number of cap sets: %d\n", num_capsets); 288 289 ret = virtio_gpu_modeset_init(vgdev); 290 if (ret) { 291 DRM_ERROR("modeset init failed\n"); 292 goto err_scanouts; 293 } 294 295 virtio_device_ready(vgdev->vdev); 296 297 if (num_capsets) 298 virtio_gpu_get_capsets(vgdev, num_capsets); 299 if (vgdev->num_scanouts) { 300 if (vgdev->has_edid) 301 virtio_gpu_cmd_get_edids(vgdev); 302 virtio_gpu_cmd_get_display_info(vgdev); 303 virtio_gpu_notify(vgdev); 304 if (!wait_event_timeout(vgdev->resp_wq, 305 !vgdev->display_info_pending, 306 5 * HZ)) { 307 DRM_ERROR("timed out waiting for display info\n"); 308 ret = -ETIMEDOUT; 309 goto err_reset_device; 310 } 311 } 312 313 vgdev->pm_nb.notifier_call = virtio_gpu_pm_notifier; 314 ret = register_pm_notifier(&vgdev->pm_nb); 315 if (ret) 316 goto err_reset_device; 317 318 return 0; 319 320 err_reset_device: 321 virtio_reset_device(vgdev->vdev); 322 virtio_gpu_modeset_fini(vgdev); 323 err_scanouts: 324 virtio_gpu_free_vbufs(vgdev); 325 err_vbufs: 326 vgdev->vdev->config->del_vqs(vgdev->vdev); 327 err_vqs: 328 dev->dev_private = NULL; 329 return ret; 330 } 331 332 static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev) 333 { 334 struct virtio_gpu_drv_cap_cache *cache_ent, *tmp; 335 336 list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) { 337 kfree(cache_ent->caps_cache); 338 kfree(cache_ent); 339 } 340 } 341 342 void virtio_gpu_deinit(struct drm_device *dev) 343 { 344 struct virtio_gpu_device *vgdev = dev->dev_private; 345 346 unregister_pm_notifier(&vgdev->pm_nb); 347 flush_work(&vgdev->obj_free_work); 348 flush_work(&vgdev->ctrlq.dequeue_work); 349 flush_work(&vgdev->cursorq.dequeue_work); 350 flush_work(&vgdev->config_changed_work); 351 virtio_reset_device(vgdev->vdev); 352 vgdev->vdev->config->del_vqs(vgdev->vdev); 353 mutex_destroy(&vgdev->obj_restore_lock); 354 } 355 356 void virtio_gpu_release(struct drm_device *dev) 357 { 358 struct virtio_gpu_device *vgdev = dev->dev_private; 359 360 if (!vgdev) 361 return; 362 363 virtio_gpu_modeset_fini(vgdev); 364 virtio_gpu_free_vbufs(vgdev); 365 virtio_gpu_cleanup_cap_cache(vgdev); 366 367 if (vgdev->has_host_visible) 368 drm_mm_takedown(&vgdev->host_visible_mm); 369 } 370 371 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file) 372 { 373 struct virtio_gpu_device *vgdev = dev->dev_private; 374 struct virtio_gpu_fpriv *vfpriv; 375 int handle; 376 377 /* can't create contexts without 3d renderer */ 378 if (!vgdev->has_virgl_3d) 379 return 0; 380 381 /* allocate a virt GPU context for this opener */ 382 vfpriv = kzalloc_obj(*vfpriv); 383 if (!vfpriv) 384 return -ENOMEM; 385 386 mutex_init(&vfpriv->context_lock); 387 388 handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL); 389 if (handle < 0) { 390 kfree(vfpriv); 391 return handle; 392 } 393 394 vfpriv->ctx_id = handle + 1; 395 file->driver_priv = vfpriv; 396 return 0; 397 } 398 399 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file) 400 { 401 struct virtio_gpu_device *vgdev = dev->dev_private; 402 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 403 404 if (!vgdev->has_virgl_3d) 405 return; 406 407 if (vfpriv->context_created) { 408 virtio_gpu_cmd_context_destroy(vgdev, vfpriv->ctx_id); 409 virtio_gpu_notify(vgdev); 410 } 411 412 ida_free(&vgdev->ctx_id_ida, vfpriv->ctx_id - 1); 413 mutex_destroy(&vfpriv->context_lock); 414 kfree(vfpriv); 415 file->driver_priv = NULL; 416 } 417