1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef VIRTIO_DRV_H 27 #define VIRTIO_DRV_H 28 29 #include <linux/dma-direction.h> 30 #include <linux/virtio.h> 31 #include <linux/virtio_ids.h> 32 #include <linux/virtio_config.h> 33 #include <linux/virtio_gpu.h> 34 35 #include <drm/drm_atomic.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_encoder.h> 38 #include <drm/drm_fourcc.h> 39 #include <drm/drm_framebuffer.h> 40 #include <drm/drm_gem.h> 41 #include <drm/drm_gem_shmem_helper.h> 42 #include <drm/drm_ioctl.h> 43 #include <drm/drm_probe_helper.h> 44 #include <drm/virtgpu_drm.h> 45 46 #define DRIVER_NAME "virtio_gpu" 47 #define DRIVER_DESC "virtio GPU" 48 49 #define DRIVER_MAJOR 0 50 #define DRIVER_MINOR 1 51 #define DRIVER_PATCHLEVEL 0 52 53 #define STATE_INITIALIZING 0 54 #define STATE_OK 1 55 #define STATE_ERR 2 56 57 #define MAX_CAPSET_ID 63 58 #define MAX_RINGS 64 59 60 /* See virtio_gpu_ctx_create. One additional character for NULL terminator. */ 61 #define DEBUG_NAME_MAX_LEN 65 62 63 struct virtio_gpu_object_params { 64 unsigned long size; 65 bool dumb; 66 /* 3d */ 67 bool virgl; 68 bool blob; 69 70 /* classic resources only */ 71 uint32_t format; 72 uint32_t width; 73 uint32_t height; 74 uint32_t target; 75 uint32_t bind; 76 uint32_t depth; 77 uint32_t array_size; 78 uint32_t last_level; 79 uint32_t nr_samples; 80 uint32_t flags; 81 82 /* blob resources only */ 83 uint32_t ctx_id; 84 uint32_t blob_mem; 85 uint32_t blob_flags; 86 uint64_t blob_id; 87 uint32_t blob_hints; 88 }; 89 90 struct virtio_gpu_object { 91 struct drm_gem_shmem_object base; 92 struct sg_table *sgt; 93 uint32_t hw_res_handle; 94 bool dumb; 95 bool created; 96 bool attached; 97 bool host3d_blob, guest_blob; 98 uint32_t blob_mem, blob_flags; 99 100 int uuid_state; 101 uuid_t uuid; 102 103 /* for restoration of objects after hibernation */ 104 struct virtio_gpu_object_params params; 105 struct list_head restore_node; 106 }; 107 #define gem_to_virtio_gpu_obj(gobj) \ 108 container_of((gobj), struct virtio_gpu_object, base.base) 109 110 struct virtio_gpu_object_shmem { 111 struct virtio_gpu_object base; 112 }; 113 114 struct virtio_gpu_object_vram { 115 struct virtio_gpu_object base; 116 uint32_t map_state; 117 uint32_t map_info; 118 struct drm_mm_node vram_node; 119 }; 120 121 #define to_virtio_gpu_shmem(virtio_gpu_object) \ 122 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base) 123 124 #define to_virtio_gpu_vram(virtio_gpu_object) \ 125 container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base) 126 127 struct virtio_gpu_object_array { 128 struct ww_acquire_ctx ticket; 129 struct list_head next; 130 u32 nents, total; 131 struct drm_gem_object *objs[] __counted_by(total); 132 }; 133 134 struct virtio_gpu_vbuffer; 135 struct virtio_gpu_device; 136 137 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 138 struct virtio_gpu_vbuffer *vbuf); 139 140 struct virtio_gpu_fence_driver { 141 atomic64_t last_fence_id; 142 uint64_t current_fence_id; 143 uint64_t context; 144 struct list_head fences; 145 spinlock_t lock; 146 }; 147 148 struct virtio_gpu_fence_event { 149 struct drm_pending_event base; 150 struct drm_event event; 151 }; 152 153 struct virtio_gpu_fence { 154 struct dma_fence f; 155 uint32_t ring_idx; 156 uint64_t fence_id; 157 bool emit_fence_info; 158 struct virtio_gpu_fence_event *e; 159 struct virtio_gpu_fence_driver *drv; 160 struct list_head node; 161 }; 162 163 struct virtio_gpu_vbuffer { 164 char *buf; 165 int size; 166 167 void *data_buf; 168 uint32_t data_size; 169 170 char *resp_buf; 171 int resp_size; 172 virtio_gpu_resp_cb resp_cb; 173 void *resp_cb_data; 174 175 struct virtio_gpu_object_array *objs; 176 struct list_head list; 177 178 uint32_t seqno; 179 }; 180 181 struct virtio_gpu_output { 182 int index; 183 struct drm_crtc crtc; 184 struct drm_connector conn; 185 struct drm_encoder enc; 186 struct virtio_gpu_display_one info; 187 struct virtio_gpu_update_cursor cursor; 188 const struct drm_edid *drm_edid; 189 int cur_x; 190 int cur_y; 191 bool needs_modeset; 192 }; 193 #define drm_crtc_to_virtio_gpu_output(x) \ 194 container_of(x, struct virtio_gpu_output, crtc) 195 196 struct virtio_gpu_framebuffer { 197 struct drm_framebuffer base; 198 struct virtio_gpu_fence *fence; 199 }; 200 #define to_virtio_gpu_framebuffer(x) \ 201 container_of(x, struct virtio_gpu_framebuffer, base) 202 203 struct virtio_gpu_plane_state { 204 struct drm_plane_state base; 205 struct virtio_gpu_fence *fence; 206 }; 207 #define to_virtio_gpu_plane_state(x) \ 208 container_of(x, struct virtio_gpu_plane_state, base) 209 210 struct virtio_gpu_queue { 211 struct virtqueue *vq; 212 spinlock_t qlock; 213 wait_queue_head_t ack_queue; 214 struct work_struct dequeue_work; 215 uint32_t seqno; 216 }; 217 218 struct virtio_gpu_drv_capset { 219 uint32_t id; 220 uint32_t max_version; 221 uint32_t max_size; 222 }; 223 224 struct virtio_gpu_drv_cap_cache { 225 struct list_head head; 226 void *caps_cache; 227 uint32_t id; 228 uint32_t version; 229 uint32_t size; 230 atomic_t is_valid; 231 }; 232 233 struct virtio_gpu_device { 234 struct drm_device *ddev; 235 236 struct virtio_device *vdev; 237 238 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 239 uint32_t num_scanouts; 240 241 struct virtio_gpu_queue ctrlq; 242 struct virtio_gpu_queue cursorq; 243 struct kmem_cache *vbufs; 244 245 atomic_t pending_commands; 246 247 struct ida resource_ida; 248 249 wait_queue_head_t resp_wq; 250 /* current display info */ 251 spinlock_t display_info_lock; 252 bool display_info_pending; 253 254 struct virtio_gpu_fence_driver fence_drv; 255 256 struct ida ctx_id_ida; 257 258 bool has_virgl_3d; 259 bool has_edid; 260 bool has_indirect; 261 bool has_resource_assign_uuid; 262 bool has_resource_blob; 263 bool has_host_visible; 264 bool has_context_init; 265 bool has_blob_alignment; 266 bool hibernated; 267 struct virtio_shm_region host_visible_region; 268 struct drm_mm host_visible_mm; 269 270 struct work_struct config_changed_work; 271 272 struct work_struct obj_free_work; 273 spinlock_t obj_free_lock; 274 struct list_head obj_free_list; 275 struct mutex obj_restore_lock; 276 struct list_head obj_restore_list; 277 278 struct virtio_gpu_drv_capset *capsets; 279 uint32_t num_capsets; 280 uint64_t capset_id_mask; 281 struct list_head cap_cache; 282 uint32_t blob_alignment; 283 284 struct notifier_block pm_nb; 285 286 /* protects uuid state when exporting */ 287 spinlock_t resource_export_lock; 288 /* protects map state and host_visible_mm */ 289 spinlock_t host_visible_lock; 290 }; 291 292 struct virtio_gpu_fpriv { 293 uint32_t ctx_id; 294 uint32_t context_init; 295 bool context_created; 296 uint32_t num_rings; 297 uint64_t base_fence_ctx; 298 uint64_t ring_idx_mask; 299 struct mutex context_lock; 300 char debug_name[DEBUG_NAME_MAX_LEN]; 301 bool explicit_debug_name; 302 }; 303 304 /* virtgpu_ioctl.c */ 305 #define DRM_VIRTIO_NUM_IOCTLS 12 306 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 307 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file); 308 309 /* virtgpu_kms.c */ 310 int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev); 311 void virtio_gpu_deinit(struct drm_device *dev); 312 void virtio_gpu_release(struct drm_device *dev); 313 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 314 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 315 int virtio_gpu_find_vqs(struct virtio_gpu_device *vgdev); 316 317 /* virtgpu_gem.c */ 318 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 319 struct drm_file *file); 320 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 321 struct drm_file *file); 322 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 323 struct drm_device *dev, 324 struct drm_mode_create_dumb *args); 325 326 struct virtio_gpu_object_array *virtio_gpu_panic_array_alloc(void); 327 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 328 struct virtio_gpu_object_array* 329 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 330 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 331 struct drm_gem_object *obj); 332 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 333 int virtio_gpu_lock_one_resv_uninterruptible(struct virtio_gpu_object_array *objs); 334 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 335 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 336 struct dma_fence *fence); 337 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 338 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 339 struct virtio_gpu_object_array *objs); 340 void virtio_gpu_array_put_free_work(struct work_struct *work); 341 342 /* virtgpu_vq.c */ 343 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 344 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 345 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 346 struct virtio_gpu_object *bo, 347 struct virtio_gpu_object_params *params, 348 struct virtio_gpu_object_array *objs, 349 struct virtio_gpu_fence *fence); 350 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 351 struct virtio_gpu_object *bo, 352 bool no_cb); 353 int virtio_gpu_panic_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 354 uint64_t offset, 355 uint32_t width, uint32_t height, 356 uint32_t x, uint32_t y, 357 struct virtio_gpu_object_array *objs); 358 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 359 uint64_t offset, 360 uint32_t width, uint32_t height, 361 uint32_t x, uint32_t y, 362 struct virtio_gpu_object_array *objs, 363 struct virtio_gpu_fence *fence); 364 void virtio_gpu_panic_cmd_resource_flush(struct virtio_gpu_device *vgdev, 365 uint32_t resource_id, 366 uint32_t x, uint32_t y, 367 uint32_t width, uint32_t height); 368 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 369 uint32_t resource_id, 370 uint32_t x, uint32_t y, 371 uint32_t width, uint32_t height, 372 struct virtio_gpu_object_array *objs, 373 struct virtio_gpu_fence *fence); 374 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 375 uint32_t scanout_id, uint32_t resource_id, 376 uint32_t width, uint32_t height, 377 uint32_t x, uint32_t y); 378 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 379 struct virtio_gpu_object *obj, 380 struct virtio_gpu_mem_entry *ents, 381 unsigned int nents); 382 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev, 383 struct virtio_gpu_object *obj, 384 struct virtio_gpu_fence *fence); 385 int virtio_gpu_detach_object_fenced(struct virtio_gpu_object *bo); 386 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 387 struct virtio_gpu_output *output); 388 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 389 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 390 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 391 int idx, int version, 392 struct virtio_gpu_drv_cap_cache **cache_p); 393 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 394 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 395 uint32_t context_init, uint32_t nlen, 396 const char *name); 397 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 398 uint32_t id); 399 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 400 uint32_t ctx_id, 401 struct virtio_gpu_object_array *objs); 402 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 403 uint32_t ctx_id, 404 struct virtio_gpu_object_array *objs); 405 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 406 void *data, uint32_t data_size, 407 uint32_t ctx_id, 408 struct virtio_gpu_object_array *objs, 409 struct virtio_gpu_fence *fence); 410 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 411 uint32_t ctx_id, 412 uint64_t offset, uint32_t level, 413 uint32_t stride, 414 uint32_t layer_stride, 415 struct drm_virtgpu_3d_box *box, 416 struct virtio_gpu_object_array *objs, 417 struct virtio_gpu_fence *fence); 418 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 419 uint32_t ctx_id, 420 uint64_t offset, uint32_t level, 421 uint32_t stride, 422 uint32_t layer_stride, 423 struct drm_virtgpu_3d_box *box, 424 struct virtio_gpu_object_array *objs, 425 struct virtio_gpu_fence *fence); 426 void 427 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 428 struct virtio_gpu_object *bo, 429 struct virtio_gpu_object_params *params, 430 struct virtio_gpu_object_array *objs, 431 struct virtio_gpu_fence *fence); 432 void virtio_gpu_ctrl_ack(struct virtqueue *vq); 433 void virtio_gpu_cursor_ack(struct virtqueue *vq); 434 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 435 void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 436 void virtio_gpu_panic_notify(struct virtio_gpu_device *vgdev); 437 void virtio_gpu_notify(struct virtio_gpu_device *vgdev); 438 int virtio_gpu_wait_queue(struct virtio_gpu_queue *vgvq, unsigned int num_elem); 439 440 int 441 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev, 442 struct virtio_gpu_object_array *objs); 443 444 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev, 445 struct virtio_gpu_object_array *objs, uint64_t offset); 446 447 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev, 448 struct virtio_gpu_object *bo); 449 450 void 451 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev, 452 struct virtio_gpu_object *bo, 453 struct virtio_gpu_object_params *params, 454 struct virtio_gpu_mem_entry *ents, 455 uint32_t nents); 456 void 457 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev, 458 uint32_t scanout_id, 459 struct virtio_gpu_object *bo, 460 struct drm_framebuffer *fb, 461 uint32_t width, uint32_t height, 462 uint32_t x, uint32_t y); 463 464 /* virtgpu_display.c */ 465 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 466 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 467 468 /* virtgpu_plane.c */ 469 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 470 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 471 enum drm_plane_type type, 472 int index); 473 474 /* virtgpu_fence.c */ 475 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev, 476 uint64_t base_fence_ctx, 477 uint32_t ring_idx); 478 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 479 struct virtio_gpu_ctrl_hdr *cmd_hdr, 480 struct virtio_gpu_fence *fence); 481 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 482 u64 fence_id); 483 484 /* virtgpu_object.c */ 485 void virtio_gpu_remove_from_restore_list(struct virtio_gpu_object *bo); 486 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo); 487 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 488 size_t size); 489 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 490 struct virtio_gpu_object_params *params, 491 struct virtio_gpu_object **bo_ptr, 492 struct virtio_gpu_fence *fence); 493 494 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo); 495 496 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev, 497 uint32_t *resid); 498 499 void virtio_gpu_add_object_to_restore_list(struct virtio_gpu_device *vgdev, 500 struct virtio_gpu_object *bo); 501 502 int virtio_gpu_object_restore_all(struct virtio_gpu_device *vgdev); 503 504 void virtio_gpu_object_unref_all(struct virtio_gpu_device *vgdev); 505 506 /* virtgpu_prime.c */ 507 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev, 508 struct virtio_gpu_object *bo); 509 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj, 510 int flags); 511 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev, 512 struct dma_buf *buf); 513 struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 514 struct drm_device *dev, struct dma_buf_attachment *attach, 515 struct sg_table *sgt); 516 int virtgpu_dma_buf_import_sgt(struct virtio_gpu_mem_entry **ents, 517 unsigned int *nents, 518 struct virtio_gpu_object *bo, 519 struct dma_buf_attachment *attach); 520 int virtgpu_dma_buf_obj_resubmit(struct virtio_gpu_device *vgdev, 521 struct virtio_gpu_object *bo); 522 523 /* virtgpu_debugfs.c */ 524 void virtio_gpu_debugfs_init(struct drm_minor *minor); 525 526 /* virtgpu_vram.c */ 527 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo); 528 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev, 529 struct virtio_gpu_object_params *params, 530 struct virtio_gpu_object **bo_ptr); 531 struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo, 532 struct device *dev, 533 enum dma_data_direction dir); 534 void virtio_gpu_vram_unmap_dma_buf(struct device *dev, 535 struct sg_table *sgt, 536 enum dma_data_direction dir); 537 void virtio_gpu_vram_map_deferred(struct virtio_gpu_object_vram *vram); 538 539 /* virtgpu_submit.c */ 540 int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data, 541 struct drm_file *file); 542 543 #endif 544