1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #ifndef VIRTIO_DRV_H 27 #define VIRTIO_DRV_H 28 29 #include <linux/dma-direction.h> 30 #include <linux/virtio.h> 31 #include <linux/virtio_ids.h> 32 #include <linux/virtio_config.h> 33 #include <linux/virtio_gpu.h> 34 35 #include <drm/drm_atomic.h> 36 #include <drm/drm_drv.h> 37 #include <drm/drm_encoder.h> 38 #include <drm/drm_fourcc.h> 39 #include <drm/drm_framebuffer.h> 40 #include <drm/drm_gem.h> 41 #include <drm/drm_gem_shmem_helper.h> 42 #include <drm/drm_ioctl.h> 43 #include <drm/drm_probe_helper.h> 44 #include <drm/virtgpu_drm.h> 45 46 #include <xen/xen.h> 47 48 #define DRIVER_NAME "virtio_gpu" 49 #define DRIVER_DESC "virtio GPU" 50 51 #define DRIVER_MAJOR 0 52 #define DRIVER_MINOR 1 53 #define DRIVER_PATCHLEVEL 0 54 55 #define STATE_INITIALIZING 0 56 #define STATE_OK 1 57 #define STATE_ERR 2 58 59 #define MAX_CAPSET_ID 63 60 #define MAX_RINGS 64 61 62 /* See virtio_gpu_ctx_create. One additional character for NULL terminator. */ 63 #define DEBUG_NAME_MAX_LEN 65 64 65 /* 66 * Whether the host must be told about resource backing pages by DMA address 67 * rather than guest-physical address. 68 * 69 * This mirrors vring_use_map_api() in drivers/virtio/virtio_ring.c, including 70 * its xen_domain() case. 71 */ 72 static inline bool virtio_gpu_use_dma_api(const struct virtio_device *vdev) 73 { 74 if (!virtio_has_dma_quirk(vdev)) 75 return true; 76 77 if (xen_domain()) 78 return true; 79 80 return false; 81 } 82 83 struct virtio_gpu_object_params { 84 unsigned long size; 85 bool dumb; 86 /* 3d */ 87 bool virgl; 88 bool blob; 89 90 /* classic resources only */ 91 uint32_t format; 92 uint32_t width; 93 uint32_t height; 94 uint32_t target; 95 uint32_t bind; 96 uint32_t depth; 97 uint32_t array_size; 98 uint32_t last_level; 99 uint32_t nr_samples; 100 uint32_t flags; 101 102 /* blob resources only */ 103 uint32_t ctx_id; 104 uint32_t blob_mem; 105 uint32_t blob_flags; 106 uint64_t blob_id; 107 uint32_t blob_hints; 108 }; 109 110 struct virtio_gpu_object { 111 struct drm_gem_shmem_object base; 112 struct sg_table *sgt; 113 uint32_t hw_res_handle; 114 bool dumb; 115 bool created; 116 bool attached; 117 bool host3d_blob, guest_blob; 118 uint32_t blob_mem, blob_flags; 119 120 int uuid_state; 121 uuid_t uuid; 122 123 /* for restoration of objects after hibernation */ 124 struct virtio_gpu_object_params params; 125 struct list_head restore_node; 126 }; 127 #define gem_to_virtio_gpu_obj(gobj) \ 128 container_of((gobj), struct virtio_gpu_object, base.base) 129 130 struct virtio_gpu_object_shmem { 131 struct virtio_gpu_object base; 132 }; 133 134 struct virtio_gpu_object_vram { 135 struct virtio_gpu_object base; 136 uint32_t map_state; 137 uint32_t map_info; 138 struct drm_mm_node vram_node; 139 }; 140 141 #define to_virtio_gpu_shmem(virtio_gpu_object) \ 142 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base) 143 144 #define to_virtio_gpu_vram(virtio_gpu_object) \ 145 container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base) 146 147 struct virtio_gpu_object_array { 148 struct ww_acquire_ctx ticket; 149 struct list_head next; 150 u32 nents, total; 151 struct drm_gem_object *objs[] __counted_by(total); 152 }; 153 154 struct virtio_gpu_vbuffer; 155 struct virtio_gpu_device; 156 157 typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 158 struct virtio_gpu_vbuffer *vbuf); 159 160 struct virtio_gpu_fence_driver { 161 atomic64_t last_fence_id; 162 uint64_t current_fence_id; 163 uint64_t context; 164 struct list_head fences; 165 spinlock_t lock; 166 }; 167 168 struct virtio_gpu_fence_event { 169 struct drm_pending_event base; 170 struct drm_event event; 171 }; 172 173 struct virtio_gpu_fence { 174 struct dma_fence f; 175 uint32_t ring_idx; 176 uint64_t fence_id; 177 bool emit_fence_info; 178 struct virtio_gpu_fence_event *e; 179 struct virtio_gpu_fence_driver *drv; 180 struct list_head node; 181 }; 182 183 struct virtio_gpu_vbuffer { 184 char *buf; 185 int size; 186 187 void *data_buf; 188 uint32_t data_size; 189 190 char *resp_buf; 191 int resp_size; 192 virtio_gpu_resp_cb resp_cb; 193 void *resp_cb_data; 194 195 struct virtio_gpu_object_array *objs; 196 struct list_head list; 197 198 uint32_t seqno; 199 }; 200 201 struct virtio_gpu_output { 202 int index; 203 struct drm_crtc crtc; 204 struct drm_connector conn; 205 struct drm_encoder enc; 206 struct virtio_gpu_display_one info; 207 struct virtio_gpu_update_cursor cursor; 208 const struct drm_edid *drm_edid; 209 int cur_x; 210 int cur_y; 211 bool needs_modeset; 212 }; 213 #define drm_crtc_to_virtio_gpu_output(x) \ 214 container_of(x, struct virtio_gpu_output, crtc) 215 216 struct virtio_gpu_framebuffer { 217 struct drm_framebuffer base; 218 struct virtio_gpu_fence *fence; 219 }; 220 #define to_virtio_gpu_framebuffer(x) \ 221 container_of(x, struct virtio_gpu_framebuffer, base) 222 223 struct virtio_gpu_plane_state { 224 struct drm_plane_state base; 225 struct virtio_gpu_fence *fence; 226 }; 227 #define to_virtio_gpu_plane_state(x) \ 228 container_of(x, struct virtio_gpu_plane_state, base) 229 230 struct virtio_gpu_queue { 231 struct virtqueue *vq; 232 spinlock_t qlock; 233 wait_queue_head_t ack_queue; 234 struct work_struct dequeue_work; 235 uint32_t seqno; 236 }; 237 238 struct virtio_gpu_drv_capset { 239 uint32_t id; 240 uint32_t max_version; 241 uint32_t max_size; 242 }; 243 244 struct virtio_gpu_drv_cap_cache { 245 struct list_head head; 246 void *caps_cache; 247 uint32_t id; 248 uint32_t version; 249 uint32_t size; 250 atomic_t is_valid; 251 }; 252 253 struct virtio_gpu_device { 254 struct drm_device *ddev; 255 256 struct virtio_device *vdev; 257 258 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 259 uint32_t num_scanouts; 260 261 struct virtio_gpu_queue ctrlq; 262 struct virtio_gpu_queue cursorq; 263 bool vqs_released; 264 struct kmem_cache *vbufs; 265 266 atomic_t pending_commands; 267 268 struct ida resource_ida; 269 270 wait_queue_head_t resp_wq; 271 /* current display info */ 272 spinlock_t display_info_lock; 273 bool display_info_pending; 274 275 struct virtio_gpu_fence_driver fence_drv; 276 277 struct ida ctx_id_ida; 278 279 bool has_virgl_3d; 280 bool has_edid; 281 bool has_indirect; 282 bool has_resource_assign_uuid; 283 bool has_resource_blob; 284 bool has_host_visible; 285 bool has_context_init; 286 bool has_blob_alignment; 287 bool hibernated; 288 struct virtio_shm_region host_visible_region; 289 struct drm_mm host_visible_mm; 290 291 struct work_struct config_changed_work; 292 293 struct work_struct obj_free_work; 294 spinlock_t obj_free_lock; 295 struct list_head obj_free_list; 296 struct mutex obj_restore_lock; 297 struct list_head obj_restore_list; 298 299 struct virtio_gpu_drv_capset *capsets; 300 uint32_t num_capsets; 301 uint64_t capset_id_mask; 302 struct list_head cap_cache; 303 uint32_t blob_alignment; 304 305 struct notifier_block pm_nb; 306 307 /* protects uuid state when exporting */ 308 spinlock_t resource_export_lock; 309 /* protects map state and host_visible_mm */ 310 spinlock_t host_visible_lock; 311 }; 312 313 struct virtio_gpu_fpriv { 314 uint32_t ctx_id; 315 uint32_t context_init; 316 bool context_created; 317 uint32_t num_rings; 318 uint64_t base_fence_ctx; 319 uint64_t ring_idx_mask; 320 struct mutex context_lock; 321 char debug_name[DEBUG_NAME_MAX_LEN]; 322 bool explicit_debug_name; 323 }; 324 325 /* virtgpu_ioctl.c */ 326 #define DRM_VIRTIO_NUM_IOCTLS 12 327 extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 328 void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file); 329 330 /* virtgpu_kms.c */ 331 int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev); 332 void virtio_gpu_deinit(struct drm_device *dev); 333 void virtio_gpu_release(struct drm_device *dev); 334 int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 335 void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 336 int virtio_gpu_find_vqs(struct virtio_gpu_device *vgdev); 337 338 /* virtgpu_gem.c */ 339 int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 340 struct drm_file *file); 341 void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 342 struct drm_file *file); 343 int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 344 struct drm_device *dev, 345 struct drm_mode_create_dumb *args); 346 347 struct virtio_gpu_object_array *virtio_gpu_panic_array_alloc(void); 348 struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 349 struct virtio_gpu_object_array* 350 virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 351 void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 352 struct drm_gem_object *obj); 353 int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 354 int virtio_gpu_lock_one_resv_uninterruptible(struct virtio_gpu_object_array *objs); 355 void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 356 void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 357 struct dma_fence *fence); 358 void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 359 void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 360 struct virtio_gpu_object_array *objs); 361 void virtio_gpu_array_put_free_work(struct work_struct *work); 362 363 /* virtgpu_vq.c */ 364 int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 365 void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 366 void virtio_gpu_reclaim_vbufs(struct virtio_gpu_device *vgdev); 367 void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 368 struct virtio_gpu_object *bo, 369 struct virtio_gpu_object_params *params, 370 struct virtio_gpu_object_array *objs, 371 struct virtio_gpu_fence *fence); 372 void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 373 struct virtio_gpu_object *bo, 374 bool no_cb); 375 int virtio_gpu_panic_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 376 uint64_t offset, 377 uint32_t width, uint32_t height, 378 uint32_t x, uint32_t y, 379 struct virtio_gpu_object_array *objs); 380 void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 381 uint64_t offset, 382 uint32_t width, uint32_t height, 383 uint32_t x, uint32_t y, 384 struct virtio_gpu_object_array *objs, 385 struct virtio_gpu_fence *fence); 386 void virtio_gpu_panic_cmd_resource_flush(struct virtio_gpu_device *vgdev, 387 uint32_t resource_id, 388 uint32_t x, uint32_t y, 389 uint32_t width, uint32_t height); 390 void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 391 uint32_t resource_id, 392 uint32_t x, uint32_t y, 393 uint32_t width, uint32_t height, 394 struct virtio_gpu_object_array *objs, 395 struct virtio_gpu_fence *fence); 396 void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 397 uint32_t scanout_id, uint32_t resource_id, 398 uint32_t width, uint32_t height, 399 uint32_t x, uint32_t y); 400 void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 401 struct virtio_gpu_object *obj, 402 struct virtio_gpu_mem_entry *ents, 403 unsigned int nents); 404 void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev, 405 struct virtio_gpu_object *obj, 406 struct virtio_gpu_fence *fence); 407 int virtio_gpu_detach_object_fenced(struct virtio_gpu_object *bo); 408 void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 409 struct virtio_gpu_output *output); 410 int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 411 int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 412 int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 413 int idx, int version, 414 struct virtio_gpu_drv_cap_cache **cache_p); 415 int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 416 void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 417 uint32_t context_init, uint32_t nlen, 418 const char *name); 419 void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 420 uint32_t id); 421 void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 422 uint32_t ctx_id, 423 struct virtio_gpu_object_array *objs); 424 void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 425 uint32_t ctx_id, 426 struct virtio_gpu_object_array *objs); 427 void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 428 void *data, uint32_t data_size, 429 uint32_t ctx_id, 430 struct virtio_gpu_object_array *objs, 431 struct virtio_gpu_fence *fence); 432 void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 433 uint32_t ctx_id, 434 uint64_t offset, uint32_t level, 435 uint32_t stride, 436 uint32_t layer_stride, 437 struct drm_virtgpu_3d_box *box, 438 struct virtio_gpu_object_array *objs, 439 struct virtio_gpu_fence *fence); 440 void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 441 uint32_t ctx_id, 442 uint64_t offset, uint32_t level, 443 uint32_t stride, 444 uint32_t layer_stride, 445 struct drm_virtgpu_3d_box *box, 446 struct virtio_gpu_object_array *objs, 447 struct virtio_gpu_fence *fence); 448 void 449 virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 450 struct virtio_gpu_object *bo, 451 struct virtio_gpu_object_params *params, 452 struct virtio_gpu_object_array *objs, 453 struct virtio_gpu_fence *fence); 454 void virtio_gpu_ctrl_ack(struct virtqueue *vq); 455 void virtio_gpu_cursor_ack(struct virtqueue *vq); 456 void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 457 void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 458 void virtio_gpu_panic_notify(struct virtio_gpu_device *vgdev); 459 void virtio_gpu_notify(struct virtio_gpu_device *vgdev); 460 int virtio_gpu_wait_queue(struct virtio_gpu_queue *vgvq, unsigned int num_elem); 461 462 int 463 virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev, 464 struct virtio_gpu_object_array *objs); 465 466 int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev, 467 struct virtio_gpu_object_array *objs, uint64_t offset); 468 469 void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev, 470 struct virtio_gpu_object *bo); 471 472 void 473 virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev, 474 struct virtio_gpu_object *bo, 475 struct virtio_gpu_object_params *params, 476 struct virtio_gpu_mem_entry *ents, 477 uint32_t nents); 478 void 479 virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev, 480 uint32_t scanout_id, 481 struct virtio_gpu_object *bo, 482 struct drm_framebuffer *fb, 483 uint32_t width, uint32_t height, 484 uint32_t x, uint32_t y); 485 486 /* virtgpu_display.c */ 487 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 488 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 489 490 /* virtgpu_plane.c */ 491 uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 492 struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 493 enum drm_plane_type type, 494 int index); 495 496 /* virtgpu_fence.c */ 497 struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev, 498 uint64_t base_fence_ctx, 499 uint32_t ring_idx); 500 void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 501 struct virtio_gpu_ctrl_hdr *cmd_hdr, 502 struct virtio_gpu_fence *fence); 503 void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 504 u64 fence_id); 505 506 /* virtgpu_object.c */ 507 void virtio_gpu_remove_from_restore_list(struct virtio_gpu_object *bo); 508 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo); 509 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 510 size_t size); 511 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 512 struct virtio_gpu_object_params *params, 513 struct virtio_gpu_object **bo_ptr, 514 struct virtio_gpu_fence *fence); 515 516 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo); 517 518 int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev, 519 uint32_t *resid); 520 521 void virtio_gpu_add_object_to_restore_list(struct virtio_gpu_device *vgdev, 522 struct virtio_gpu_object *bo); 523 524 int virtio_gpu_object_restore_all(struct virtio_gpu_device *vgdev); 525 526 void virtio_gpu_object_unref_all(struct virtio_gpu_device *vgdev); 527 528 /* virtgpu_prime.c */ 529 int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev, 530 struct virtio_gpu_object *bo); 531 struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj, 532 int flags); 533 struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev, 534 struct dma_buf *buf); 535 struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 536 struct drm_device *dev, struct dma_buf_attachment *attach, 537 struct sg_table *sgt); 538 int virtgpu_dma_buf_import_sgt(struct virtio_gpu_mem_entry **ents, 539 unsigned int *nents, 540 struct virtio_gpu_object *bo, 541 struct dma_buf_attachment *attach); 542 int virtgpu_dma_buf_obj_resubmit(struct virtio_gpu_device *vgdev, 543 struct virtio_gpu_object *bo); 544 545 /* virtgpu_debugfs.c */ 546 void virtio_gpu_debugfs_init(struct drm_minor *minor); 547 548 /* virtgpu_vram.c */ 549 bool virtio_gpu_is_vram(struct virtio_gpu_object *bo); 550 int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev, 551 struct virtio_gpu_object_params *params, 552 struct virtio_gpu_object **bo_ptr); 553 struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo, 554 struct device *dev, 555 enum dma_data_direction dir); 556 void virtio_gpu_vram_unmap_dma_buf(struct device *dev, 557 struct sg_table *sgt, 558 enum dma_data_direction dir); 559 void virtio_gpu_vram_map_deferred(struct virtio_gpu_object_vram *vram); 560 561 /* virtgpu_submit.c */ 562 int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data, 563 struct drm_file *file); 564 565 #endif 566