xref: /linux/drivers/gpu/drm/virtio/virtgpu_display.c (revision 110e6f26af80dfd90b6e5c645b1aed7228aa580d)
1 /*
2  * Copyright (C) 2015 Red Hat, Inc.
3  * All Rights Reserved.
4  *
5  * Authors:
6  *    Dave Airlie
7  *    Alon Levy
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
11  * to deal in the Software without restriction, including without limitation
12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25  * OTHER DEALINGS IN THE SOFTWARE.
26  */
27 
28 #include "virtgpu_drv.h"
29 #include <drm/drm_crtc_helper.h>
30 #include <drm/drm_atomic_helper.h>
31 
32 #define XRES_MIN   320
33 #define YRES_MIN   200
34 
35 #define XRES_DEF  1024
36 #define YRES_DEF   768
37 
38 #define XRES_MAX  8192
39 #define YRES_MAX  8192
40 
41 static void
42 virtio_gpu_hide_cursor(struct virtio_gpu_device *vgdev,
43 		       struct virtio_gpu_output *output)
44 {
45 	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
46 	output->cursor.resource_id = 0;
47 	virtio_gpu_cursor_ping(vgdev, output);
48 }
49 
50 static int virtio_gpu_crtc_cursor_set(struct drm_crtc *crtc,
51 				      struct drm_file *file_priv,
52 				      uint32_t handle,
53 				      uint32_t width,
54 				      uint32_t height,
55 				      int32_t hot_x, int32_t hot_y)
56 {
57 	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
58 	struct virtio_gpu_output *output =
59 		container_of(crtc, struct virtio_gpu_output, crtc);
60 	struct drm_gem_object *gobj = NULL;
61 	struct virtio_gpu_object *qobj = NULL;
62 	struct virtio_gpu_fence *fence = NULL;
63 	int ret = 0;
64 
65 	if (handle == 0) {
66 		virtio_gpu_hide_cursor(vgdev, output);
67 		return 0;
68 	}
69 
70 	/* lookup the cursor */
71 	gobj = drm_gem_object_lookup(crtc->dev, file_priv, handle);
72 	if (gobj == NULL)
73 		return -ENOENT;
74 
75 	qobj = gem_to_virtio_gpu_obj(gobj);
76 
77 	if (!qobj->hw_res_handle) {
78 		ret = -EINVAL;
79 		goto out;
80 	}
81 
82 	virtio_gpu_cmd_transfer_to_host_2d(vgdev, qobj->hw_res_handle, 0,
83 					   cpu_to_le32(64),
84 					   cpu_to_le32(64),
85 					   0, 0, &fence);
86 	ret = virtio_gpu_object_reserve(qobj, false);
87 	if (!ret) {
88 		reservation_object_add_excl_fence(qobj->tbo.resv,
89 						  &fence->f);
90 		fence_put(&fence->f);
91 		virtio_gpu_object_unreserve(qobj);
92 		virtio_gpu_object_wait(qobj, false);
93 	}
94 
95 	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
96 	output->cursor.resource_id = cpu_to_le32(qobj->hw_res_handle);
97 	output->cursor.hot_x = cpu_to_le32(hot_x);
98 	output->cursor.hot_y = cpu_to_le32(hot_y);
99 	virtio_gpu_cursor_ping(vgdev, output);
100 	ret = 0;
101 
102 out:
103 	drm_gem_object_unreference_unlocked(gobj);
104 	return ret;
105 }
106 
107 static int virtio_gpu_crtc_cursor_move(struct drm_crtc *crtc,
108 				    int x, int y)
109 {
110 	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
111 	struct virtio_gpu_output *output =
112 		container_of(crtc, struct virtio_gpu_output, crtc);
113 
114 	output->cursor.hdr.type = cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
115 	output->cursor.pos.x = cpu_to_le32(x);
116 	output->cursor.pos.y = cpu_to_le32(y);
117 	virtio_gpu_cursor_ping(vgdev, output);
118 	return 0;
119 }
120 
121 static int virtio_gpu_page_flip(struct drm_crtc *crtc,
122 				struct drm_framebuffer *fb,
123 				struct drm_pending_vblank_event *event,
124 				uint32_t flags)
125 {
126 	struct virtio_gpu_device *vgdev = crtc->dev->dev_private;
127 	struct virtio_gpu_output *output =
128 		container_of(crtc, struct virtio_gpu_output, crtc);
129 	struct drm_plane *plane = crtc->primary;
130 	struct virtio_gpu_framebuffer *vgfb;
131 	struct virtio_gpu_object *bo;
132 	unsigned long irqflags;
133 	uint32_t handle;
134 
135 	plane->fb = fb;
136 	vgfb = to_virtio_gpu_framebuffer(plane->fb);
137 	bo = gem_to_virtio_gpu_obj(vgfb->obj);
138 	handle = bo->hw_res_handle;
139 
140 	DRM_DEBUG("handle 0x%x%s, crtc %dx%d\n", handle,
141 		  bo->dumb ? ", dumb" : "",
142 		  crtc->mode.hdisplay, crtc->mode.vdisplay);
143 	if (bo->dumb) {
144 		virtio_gpu_cmd_transfer_to_host_2d
145 			(vgdev, handle, 0,
146 			 cpu_to_le32(crtc->mode.hdisplay),
147 			 cpu_to_le32(crtc->mode.vdisplay),
148 			 0, 0, NULL);
149 	}
150 	virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
151 				   crtc->mode.hdisplay,
152 				   crtc->mode.vdisplay, 0, 0);
153 	virtio_gpu_cmd_resource_flush(vgdev, handle, 0, 0,
154 				      crtc->mode.hdisplay,
155 				      crtc->mode.vdisplay);
156 
157 	if (event) {
158 		spin_lock_irqsave(&crtc->dev->event_lock, irqflags);
159 		drm_send_vblank_event(crtc->dev, -1, event);
160 		spin_unlock_irqrestore(&crtc->dev->event_lock, irqflags);
161 	}
162 
163 	return 0;
164 }
165 
166 static const struct drm_crtc_funcs virtio_gpu_crtc_funcs = {
167 	.cursor_set2            = virtio_gpu_crtc_cursor_set,
168 	.cursor_move            = virtio_gpu_crtc_cursor_move,
169 	.set_config             = drm_atomic_helper_set_config,
170 	.destroy                = drm_crtc_cleanup,
171 
172 	.page_flip              = virtio_gpu_page_flip,
173 	.reset                  = drm_atomic_helper_crtc_reset,
174 	.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
175 	.atomic_destroy_state   = drm_atomic_helper_crtc_destroy_state,
176 };
177 
178 static void virtio_gpu_user_framebuffer_destroy(struct drm_framebuffer *fb)
179 {
180 	struct virtio_gpu_framebuffer *virtio_gpu_fb
181 		= to_virtio_gpu_framebuffer(fb);
182 
183 	if (virtio_gpu_fb->obj)
184 		drm_gem_object_unreference_unlocked(virtio_gpu_fb->obj);
185 	drm_framebuffer_cleanup(fb);
186 	kfree(virtio_gpu_fb);
187 }
188 
189 static int
190 virtio_gpu_framebuffer_surface_dirty(struct drm_framebuffer *fb,
191 				     struct drm_file *file_priv,
192 				     unsigned flags, unsigned color,
193 				     struct drm_clip_rect *clips,
194 				     unsigned num_clips)
195 {
196 	struct virtio_gpu_framebuffer *virtio_gpu_fb
197 		= to_virtio_gpu_framebuffer(fb);
198 
199 	return virtio_gpu_surface_dirty(virtio_gpu_fb, clips, num_clips);
200 }
201 
202 static const struct drm_framebuffer_funcs virtio_gpu_fb_funcs = {
203 	.destroy = virtio_gpu_user_framebuffer_destroy,
204 	.dirty = virtio_gpu_framebuffer_surface_dirty,
205 };
206 
207 int
208 virtio_gpu_framebuffer_init(struct drm_device *dev,
209 			    struct virtio_gpu_framebuffer *vgfb,
210 			    const struct drm_mode_fb_cmd2 *mode_cmd,
211 			    struct drm_gem_object *obj)
212 {
213 	int ret;
214 	struct virtio_gpu_object *bo;
215 	vgfb->obj = obj;
216 
217 	bo = gem_to_virtio_gpu_obj(obj);
218 
219 	ret = drm_framebuffer_init(dev, &vgfb->base, &virtio_gpu_fb_funcs);
220 	if (ret) {
221 		vgfb->obj = NULL;
222 		return ret;
223 	}
224 	drm_helper_mode_fill_fb_struct(&vgfb->base, mode_cmd);
225 
226 	spin_lock_init(&vgfb->dirty_lock);
227 	vgfb->x1 = vgfb->y1 = INT_MAX;
228 	vgfb->x2 = vgfb->y2 = 0;
229 	return 0;
230 }
231 
232 static void virtio_gpu_crtc_mode_set_nofb(struct drm_crtc *crtc)
233 {
234 	struct drm_device *dev = crtc->dev;
235 	struct virtio_gpu_device *vgdev = dev->dev_private;
236 	struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
237 
238 	virtio_gpu_cmd_set_scanout(vgdev, output->index, 0,
239 				   crtc->mode.hdisplay,
240 				   crtc->mode.vdisplay, 0, 0);
241 }
242 
243 static void virtio_gpu_crtc_enable(struct drm_crtc *crtc)
244 {
245 }
246 
247 static void virtio_gpu_crtc_disable(struct drm_crtc *crtc)
248 {
249 	struct drm_device *dev = crtc->dev;
250 	struct virtio_gpu_device *vgdev = dev->dev_private;
251 	struct virtio_gpu_output *output = drm_crtc_to_virtio_gpu_output(crtc);
252 
253 	virtio_gpu_cmd_set_scanout(vgdev, output->index, 0, 0, 0, 0, 0);
254 }
255 
256 static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc,
257 					struct drm_crtc_state *state)
258 {
259 	return 0;
260 }
261 
262 static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
263 	.enable        = virtio_gpu_crtc_enable,
264 	.disable       = virtio_gpu_crtc_disable,
265 	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
266 	.atomic_check  = virtio_gpu_crtc_atomic_check,
267 };
268 
269 static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,
270 				    struct drm_display_mode *mode,
271 				    struct drm_display_mode *adjusted_mode)
272 {
273 }
274 
275 static void virtio_gpu_enc_enable(struct drm_encoder *encoder)
276 {
277 }
278 
279 static void virtio_gpu_enc_disable(struct drm_encoder *encoder)
280 {
281 }
282 
283 static int virtio_gpu_conn_get_modes(struct drm_connector *connector)
284 {
285 	struct virtio_gpu_output *output =
286 		drm_connector_to_virtio_gpu_output(connector);
287 	struct drm_display_mode *mode = NULL;
288 	int count, width, height;
289 
290 	width  = le32_to_cpu(output->info.r.width);
291 	height = le32_to_cpu(output->info.r.height);
292 	count = drm_add_modes_noedid(connector, XRES_MAX, YRES_MAX);
293 
294 	if (width == 0 || height == 0) {
295 		width = XRES_DEF;
296 		height = YRES_DEF;
297 		drm_set_preferred_mode(connector, XRES_DEF, YRES_DEF);
298 	} else {
299 		DRM_DEBUG("add mode: %dx%d\n", width, height);
300 		mode = drm_cvt_mode(connector->dev, width, height, 60,
301 				    false, false, false);
302 		mode->type |= DRM_MODE_TYPE_PREFERRED;
303 		drm_mode_probed_add(connector, mode);
304 		count++;
305 	}
306 
307 	return count;
308 }
309 
310 static int virtio_gpu_conn_mode_valid(struct drm_connector *connector,
311 				      struct drm_display_mode *mode)
312 {
313 	struct virtio_gpu_output *output =
314 		drm_connector_to_virtio_gpu_output(connector);
315 	int width, height;
316 
317 	width  = le32_to_cpu(output->info.r.width);
318 	height = le32_to_cpu(output->info.r.height);
319 
320 	if (!(mode->type & DRM_MODE_TYPE_PREFERRED))
321 		return MODE_OK;
322 	if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF)
323 		return MODE_OK;
324 	if (mode->hdisplay <= width  && mode->hdisplay >= width - 16 &&
325 	    mode->vdisplay <= height && mode->vdisplay >= height - 16)
326 		return MODE_OK;
327 
328 	DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay);
329 	return MODE_BAD;
330 }
331 
332 static struct drm_encoder*
333 virtio_gpu_best_encoder(struct drm_connector *connector)
334 {
335 	struct virtio_gpu_output *virtio_gpu_output =
336 		drm_connector_to_virtio_gpu_output(connector);
337 
338 	return &virtio_gpu_output->enc;
339 }
340 
341 static const struct drm_encoder_helper_funcs virtio_gpu_enc_helper_funcs = {
342 	.mode_set   = virtio_gpu_enc_mode_set,
343 	.enable     = virtio_gpu_enc_enable,
344 	.disable    = virtio_gpu_enc_disable,
345 };
346 
347 static const struct drm_connector_helper_funcs virtio_gpu_conn_helper_funcs = {
348 	.get_modes    = virtio_gpu_conn_get_modes,
349 	.mode_valid   = virtio_gpu_conn_mode_valid,
350 	.best_encoder = virtio_gpu_best_encoder,
351 };
352 
353 static enum drm_connector_status virtio_gpu_conn_detect(
354 			struct drm_connector *connector,
355 			bool force)
356 {
357 	struct virtio_gpu_output *output =
358 		drm_connector_to_virtio_gpu_output(connector);
359 
360 	if (output->info.enabled)
361 		return connector_status_connected;
362 	else
363 		return connector_status_disconnected;
364 }
365 
366 static void virtio_gpu_conn_destroy(struct drm_connector *connector)
367 {
368 	struct virtio_gpu_output *virtio_gpu_output =
369 		drm_connector_to_virtio_gpu_output(connector);
370 
371 	drm_connector_unregister(connector);
372 	drm_connector_cleanup(connector);
373 	kfree(virtio_gpu_output);
374 }
375 
376 static const struct drm_connector_funcs virtio_gpu_connector_funcs = {
377 	.dpms = drm_atomic_helper_connector_dpms,
378 	.detect = virtio_gpu_conn_detect,
379 	.fill_modes = drm_helper_probe_single_connector_modes,
380 	.destroy = virtio_gpu_conn_destroy,
381 	.reset = drm_atomic_helper_connector_reset,
382 	.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
383 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
384 };
385 
386 static const struct drm_encoder_funcs virtio_gpu_enc_funcs = {
387 	.destroy = drm_encoder_cleanup,
388 };
389 
390 static int vgdev_output_init(struct virtio_gpu_device *vgdev, int index)
391 {
392 	struct drm_device *dev = vgdev->ddev;
393 	struct virtio_gpu_output *output = vgdev->outputs + index;
394 	struct drm_connector *connector = &output->conn;
395 	struct drm_encoder *encoder = &output->enc;
396 	struct drm_crtc *crtc = &output->crtc;
397 	struct drm_plane *plane;
398 
399 	output->index = index;
400 	if (index == 0) {
401 		output->info.enabled = cpu_to_le32(true);
402 		output->info.r.width = cpu_to_le32(XRES_DEF);
403 		output->info.r.height = cpu_to_le32(YRES_DEF);
404 	}
405 
406 	plane = virtio_gpu_plane_init(vgdev, index);
407 	if (IS_ERR(plane))
408 		return PTR_ERR(plane);
409 	drm_crtc_init_with_planes(dev, crtc, plane, NULL,
410 				  &virtio_gpu_crtc_funcs, NULL);
411 	drm_crtc_helper_add(crtc, &virtio_gpu_crtc_helper_funcs);
412 	plane->crtc = crtc;
413 
414 	drm_connector_init(dev, connector, &virtio_gpu_connector_funcs,
415 			   DRM_MODE_CONNECTOR_VIRTUAL);
416 	drm_connector_helper_add(connector, &virtio_gpu_conn_helper_funcs);
417 
418 	drm_encoder_init(dev, encoder, &virtio_gpu_enc_funcs,
419 			 DRM_MODE_ENCODER_VIRTUAL, NULL);
420 	drm_encoder_helper_add(encoder, &virtio_gpu_enc_helper_funcs);
421 	encoder->possible_crtcs = 1 << index;
422 
423 	drm_mode_connector_attach_encoder(connector, encoder);
424 	drm_connector_register(connector);
425 	return 0;
426 }
427 
428 static struct drm_framebuffer *
429 virtio_gpu_user_framebuffer_create(struct drm_device *dev,
430 				   struct drm_file *file_priv,
431 				   const struct drm_mode_fb_cmd2 *mode_cmd)
432 {
433 	struct drm_gem_object *obj = NULL;
434 	struct virtio_gpu_framebuffer *virtio_gpu_fb;
435 	int ret;
436 
437 	/* lookup object associated with res handle */
438 	obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
439 	if (!obj)
440 		return ERR_PTR(-EINVAL);
441 
442 	virtio_gpu_fb = kzalloc(sizeof(*virtio_gpu_fb), GFP_KERNEL);
443 	if (virtio_gpu_fb == NULL)
444 		return ERR_PTR(-ENOMEM);
445 
446 	ret = virtio_gpu_framebuffer_init(dev, virtio_gpu_fb, mode_cmd, obj);
447 	if (ret) {
448 		kfree(virtio_gpu_fb);
449 		if (obj)
450 			drm_gem_object_unreference_unlocked(obj);
451 		return NULL;
452 	}
453 
454 	return &virtio_gpu_fb->base;
455 }
456 
457 static const struct drm_mode_config_funcs virtio_gpu_mode_funcs = {
458 	.fb_create = virtio_gpu_user_framebuffer_create,
459 	.atomic_check = drm_atomic_helper_check,
460 	.atomic_commit = drm_atomic_helper_commit,
461 };
462 
463 int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev)
464 {
465 	int i;
466 
467 	drm_mode_config_init(vgdev->ddev);
468 	vgdev->ddev->mode_config.funcs = (void *)&virtio_gpu_mode_funcs;
469 
470 	/* modes will be validated against the framebuffer size */
471 	vgdev->ddev->mode_config.min_width = XRES_MIN;
472 	vgdev->ddev->mode_config.min_height = YRES_MIN;
473 	vgdev->ddev->mode_config.max_width = XRES_MAX;
474 	vgdev->ddev->mode_config.max_height = YRES_MAX;
475 
476 	for (i = 0 ; i < vgdev->num_scanouts; ++i)
477 		vgdev_output_init(vgdev, i);
478 
479         drm_mode_config_reset(vgdev->ddev);
480 	return 0;
481 }
482 
483 void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev)
484 {
485 	virtio_gpu_fbdev_fini(vgdev);
486 	drm_mode_config_cleanup(vgdev->ddev);
487 }
488