xref: /linux/drivers/gpu/drm/verisilicon/vs_bridge_regs.h (revision fbf5df34a4dbcd09d433dd4f0916bf9b2ddb16de)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2025 Icenowy Zheng <uwu@icenowy.me>
4  *
5  * Based on vs_dc_hw.h, which is:
6  *   Copyright (C) 2023 VeriSilicon Holdings Co., Ltd.
7  */
8 
9 #ifndef _VS_BRIDGE_REGS_H_
10 #define _VS_BRIDGE_REGS_H_
11 
12 #include <linux/bits.h>
13 
14 #define VSDC_DISP_PANEL_CONFIG(n)		(0x1418 + 0x4 * (n))
15 #define VSDC_DISP_PANEL_CONFIG_DE_EN		BIT(0)
16 #define VSDC_DISP_PANEL_CONFIG_DE_POL		BIT(1)
17 #define VSDC_DISP_PANEL_CONFIG_DAT_EN		BIT(4)
18 #define VSDC_DISP_PANEL_CONFIG_DAT_POL		BIT(5)
19 #define VSDC_DISP_PANEL_CONFIG_CLK_EN		BIT(8)
20 #define VSDC_DISP_PANEL_CONFIG_CLK_POL		BIT(9)
21 #define VSDC_DISP_PANEL_CONFIG_RUNNING		BIT(12)
22 #define VSDC_DISP_PANEL_CONFIG_GAMMA		BIT(13)
23 #define VSDC_DISP_PANEL_CONFIG_YUV		BIT(16)
24 
25 #define VSDC_DISP_DPI_CONFIG(n)			(0x14B8 + 0x4 * (n))
26 #define VSDC_DISP_DPI_CONFIG_FMT_MASK		GENMASK(2, 0)
27 #define VSDC_DISP_DPI_CONFIG_FMT_RGB565		(0)
28 #define VSDC_DISP_DPI_CONFIG_FMT_RGB666		(3)
29 #define VSDC_DISP_DPI_CONFIG_FMT_RGB888		(5)
30 #define VSDC_DISP_DPI_CONFIG_FMT_RGB101010	(6)
31 
32 #define VSDC_DISP_PANEL_START			0x1CCC
33 #define VSDC_DISP_PANEL_START_RUNNING(n)	BIT(n)
34 #define VSDC_DISP_PANEL_START_MULTI_DISP_SYNC	BIT(3)
35 
36 #define VSDC_DISP_DP_CONFIG(n)			(0x1CD0 + 0x4 * (n))
37 #define VSDC_DISP_DP_CONFIG_DP_EN		BIT(3)
38 #define VSDC_DISP_DP_CONFIG_FMT_MASK		GENMASK(2, 0)
39 #define VSDC_DISP_DP_CONFIG_FMT_RGB565		(0)
40 #define VSDC_DISP_DP_CONFIG_FMT_RGB666		(1)
41 #define VSDC_DISP_DP_CONFIG_FMT_RGB888		(2)
42 #define VSDC_DISP_DP_CONFIG_FMT_RGB101010	(3)
43 #define VSDC_DISP_DP_CONFIG_YUV_FMT_MASK	GENMASK(7, 4)
44 #define VSDC_DISP_DP_CONFIG_YUV_FMT_UYVY8	(2 << 4)
45 #define VSDC_DISP_DP_CONFIG_YUV_FMT_YUV8	(4 << 4)
46 #define VSDC_DISP_DP_CONFIG_YUV_FMT_UYVY10	(8 << 4)
47 #define VSDC_DISP_DP_CONFIG_YUV_FMT_YUV10	(10 << 4)
48 #define VSDC_DISP_DP_CONFIG_YUV_FMT_UYYVYY8	(12 << 4)
49 #define VSDC_DISP_DP_CONFIG_YUV_FMT_UYYVYY10	(13 << 4)
50 
51 #define VSDC_DISP_PANEL_CONFIG_EX(n)		(0x2518 + 0x4 * (n))
52 #define VSDC_DISP_PANEL_CONFIG_EX_COMMIT	BIT(0)
53 
54 #endif /* _VS_BRIDGE_REGS_H_ */
55