1 #ifndef _VC4_HDMI_H_ 2 #define _VC4_HDMI_H_ 3 4 #include <drm/drm_connector.h> 5 #include <media/cec.h> 6 #include <sound/dmaengine_pcm.h> 7 #include <sound/soc.h> 8 9 #include "vc4_drv.h" 10 11 struct vc4_hdmi; 12 struct vc4_hdmi_register; 13 14 enum vc4_hdmi_phy_channel { 15 PHY_LANE_0 = 0, 16 PHY_LANE_1, 17 PHY_LANE_2, 18 PHY_LANE_CK, 19 }; 20 21 struct vc4_hdmi_variant { 22 /* Encoder Type for that controller */ 23 enum vc4_encoder_type encoder_type; 24 25 /* ALSA card name */ 26 const char *card_name; 27 28 /* Filename to expose the registers in debugfs */ 29 const char *debugfs_name; 30 31 /* Maximum pixel clock supported by the controller (in Hz) */ 32 unsigned long long max_pixel_clock; 33 34 /* List of the registers available on that variant */ 35 const struct vc4_hdmi_register *registers; 36 37 /* Number of registers on that variant */ 38 unsigned int num_registers; 39 40 /* BCM2711 Only. 41 * The variants don't map the lane in the same order in the 42 * PHY, so this is an array mapping the HDMI channel (index) 43 * to the PHY lane (value). 44 */ 45 enum vc4_hdmi_phy_channel phy_lane_mapping[4]; 46 47 /* The BCM2711 cannot deal with odd horizontal pixel timings */ 48 bool unsupported_odd_h_timings; 49 50 /* 51 * The BCM2711 CEC/hotplug IRQ controller is shared between the 52 * two HDMI controllers, and we have a proper irqchip driver for 53 * it. 54 */ 55 bool external_irq_controller; 56 57 /* Callback to get the resources (memory region, interrupts, 58 * clocks, etc) for that variant. 59 */ 60 int (*init_resources)(struct drm_device *drm, 61 struct vc4_hdmi *vc4_hdmi); 62 63 /* Callback to reset the HDMI block */ 64 void (*reset)(struct vc4_hdmi *vc4_hdmi); 65 66 /* Callback to enable / disable the CSC */ 67 void (*csc_setup)(struct vc4_hdmi *vc4_hdmi, 68 struct drm_connector_state *state, 69 const struct drm_display_mode *mode); 70 71 /* Callback to configure the video timings in the HDMI block */ 72 void (*set_timings)(struct vc4_hdmi *vc4_hdmi, 73 struct drm_connector_state *state, 74 const struct drm_display_mode *mode); 75 76 /* Callback to initialize the PHY according to the connector state */ 77 void (*phy_init)(struct vc4_hdmi *vc4_hdmi, 78 struct drm_connector_state *conn_state); 79 80 /* Callback to disable the PHY */ 81 void (*phy_disable)(struct vc4_hdmi *vc4_hdmi); 82 83 /* Callback to enable the RNG in the PHY */ 84 void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi); 85 86 /* Callback to disable the RNG in the PHY */ 87 void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi); 88 89 /* Callback to get channel map */ 90 u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask); 91 92 /* Enables HDR metadata */ 93 bool supports_hdr; 94 95 /* Callback for hardware specific hotplug detect */ 96 bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi); 97 }; 98 99 /* HDMI audio information */ 100 struct vc4_hdmi_audio { 101 struct snd_soc_card card; 102 struct snd_soc_dai_link link; 103 struct snd_soc_dai_link_component cpu; 104 struct snd_soc_dai_link_component codec; 105 struct snd_soc_dai_link_component platform; 106 struct snd_dmaengine_dai_dma_data dma_data; 107 bool streaming; 108 }; 109 110 /* General HDMI hardware state. */ 111 struct vc4_hdmi { 112 struct vc4_hdmi_audio audio; 113 114 struct platform_device *pdev; 115 const struct vc4_hdmi_variant *variant; 116 117 struct vc4_encoder encoder; 118 struct drm_connector connector; 119 120 struct delayed_work scrambling_work; 121 122 struct i2c_adapter *ddc; 123 void __iomem *hdmicore_regs; 124 void __iomem *hd_regs; 125 126 /* VC5 Only */ 127 void __iomem *cec_regs; 128 /* VC5 Only */ 129 void __iomem *csc_regs; 130 /* VC5 Only */ 131 void __iomem *dvp_regs; 132 /* VC5 Only */ 133 void __iomem *phy_regs; 134 /* VC5 Only */ 135 void __iomem *ram_regs; 136 /* VC5 Only */ 137 void __iomem *rm_regs; 138 139 struct gpio_desc *hpd_gpio; 140 141 /* 142 * On some systems (like the RPi4), some modes are in the same 143 * frequency range than the WiFi channels (1440p@60Hz for 144 * example). Should we take evasive actions because that system 145 * has a wifi adapter? 146 */ 147 bool disable_wifi_frequencies; 148 149 struct cec_adapter *cec_adap; 150 struct cec_msg cec_rx_msg; 151 bool cec_tx_ok; 152 bool cec_irq_was_rx; 153 154 struct clk *cec_clock; 155 struct clk *pixel_clock; 156 struct clk *hsm_clock; 157 struct clk *audio_clock; 158 struct clk *pixel_bvb_clock; 159 160 struct reset_control *reset; 161 162 struct debugfs_regset32 hdmi_regset; 163 struct debugfs_regset32 hd_regset; 164 165 /* VC5 only */ 166 struct debugfs_regset32 cec_regset; 167 struct debugfs_regset32 csc_regset; 168 struct debugfs_regset32 dvp_regset; 169 struct debugfs_regset32 phy_regset; 170 struct debugfs_regset32 ram_regset; 171 struct debugfs_regset32 rm_regset; 172 173 /** 174 * @hw_lock: Spinlock protecting device register access. 175 */ 176 spinlock_t hw_lock; 177 178 /** 179 * @mutex: Mutex protecting the driver access across multiple 180 * frameworks (KMS, ALSA, CEC). 181 */ 182 struct mutex mutex; 183 184 /** 185 * @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode 186 * for use by ALSA hooks and interrupt handlers. Protected by @mutex. 187 */ 188 struct drm_display_mode saved_adjusted_mode; 189 190 /** 191 * @packet_ram_enabled: Is the HDMI controller packet RAM currently 192 * on? Protected by @mutex. 193 */ 194 bool packet_ram_enabled; 195 196 /** 197 * @scdc_enabled: Is the HDMI controller currently running with 198 * the scrambler on? Protected by @mutex. 199 */ 200 bool scdc_enabled; 201 202 /** 203 * @output_bpc: Copy of @drm_connector_state.hdmi.output_bpc for 204 * use outside of KMS hooks. Protected by @mutex. 205 */ 206 unsigned int output_bpc; 207 208 /** 209 * @output_format: Copy of 210 * @drm_connector_state.hdmi.output_format for use outside of 211 * KMS hooks. Protected by @mutex. 212 */ 213 enum hdmi_colorspace output_format; 214 }; 215 216 #define connector_to_vc4_hdmi(_connector) \ 217 container_of_const(_connector, struct vc4_hdmi, connector) 218 219 static inline struct vc4_hdmi * 220 encoder_to_vc4_hdmi(struct drm_encoder *encoder) 221 { 222 struct vc4_encoder *_encoder = to_vc4_encoder(encoder); 223 return container_of_const(_encoder, struct vc4_hdmi, encoder); 224 } 225 226 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 227 struct drm_connector_state *conn_state); 228 void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 229 void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 230 void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 231 232 void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 233 struct drm_connector_state *conn_state); 234 void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 235 void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 236 void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 237 238 void vc6_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 239 struct drm_connector_state *conn_state); 240 void vc6_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 241 242 #endif /* _VC4_HDMI_H_ */ 243