1 #ifndef _VC4_HDMI_H_ 2 #define _VC4_HDMI_H_ 3 4 #include <drm/drm_connector.h> 5 #include <media/cec.h> 6 #include <sound/dmaengine_pcm.h> 7 #include <sound/soc.h> 8 9 #include "vc4_drv.h" 10 11 /* VC4 HDMI encoder KMS struct */ 12 struct vc4_hdmi_encoder { 13 struct vc4_encoder base; 14 bool hdmi_monitor; 15 bool limited_rgb_range; 16 }; 17 18 static inline struct vc4_hdmi_encoder * 19 to_vc4_hdmi_encoder(struct drm_encoder *encoder) 20 { 21 return container_of(encoder, struct vc4_hdmi_encoder, base.base); 22 } 23 24 struct vc4_hdmi; 25 struct vc4_hdmi_register; 26 struct vc4_hdmi_connector_state; 27 28 enum vc4_hdmi_phy_channel { 29 PHY_LANE_0 = 0, 30 PHY_LANE_1, 31 PHY_LANE_2, 32 PHY_LANE_CK, 33 }; 34 35 struct vc4_hdmi_variant { 36 /* Encoder Type for that controller */ 37 enum vc4_encoder_type encoder_type; 38 39 /* ALSA card name */ 40 const char *card_name; 41 42 /* Filename to expose the registers in debugfs */ 43 const char *debugfs_name; 44 45 /* Maximum pixel clock supported by the controller (in Hz) */ 46 unsigned long long max_pixel_clock; 47 48 /* List of the registers available on that variant */ 49 const struct vc4_hdmi_register *registers; 50 51 /* Number of registers on that variant */ 52 unsigned int num_registers; 53 54 /* BCM2711 Only. 55 * The variants don't map the lane in the same order in the 56 * PHY, so this is an array mapping the HDMI channel (index) 57 * to the PHY lane (value). 58 */ 59 enum vc4_hdmi_phy_channel phy_lane_mapping[4]; 60 61 /* The BCM2711 cannot deal with odd horizontal pixel timings */ 62 bool unsupported_odd_h_timings; 63 64 /* 65 * The BCM2711 CEC/hotplug IRQ controller is shared between the 66 * two HDMI controllers, and we have a proper irqchip driver for 67 * it. 68 */ 69 bool external_irq_controller; 70 71 /* Callback to get the resources (memory region, interrupts, 72 * clocks, etc) for that variant. 73 */ 74 int (*init_resources)(struct vc4_hdmi *vc4_hdmi); 75 76 /* Callback to reset the HDMI block */ 77 void (*reset)(struct vc4_hdmi *vc4_hdmi); 78 79 /* Callback to enable / disable the CSC */ 80 void (*csc_setup)(struct vc4_hdmi *vc4_hdmi, bool enable); 81 82 /* Callback to configure the video timings in the HDMI block */ 83 void (*set_timings)(struct vc4_hdmi *vc4_hdmi, 84 struct drm_connector_state *state, 85 struct drm_display_mode *mode); 86 87 /* Callback to initialize the PHY according to the connector state */ 88 void (*phy_init)(struct vc4_hdmi *vc4_hdmi, 89 struct vc4_hdmi_connector_state *vc4_conn_state); 90 91 /* Callback to disable the PHY */ 92 void (*phy_disable)(struct vc4_hdmi *vc4_hdmi); 93 94 /* Callback to enable the RNG in the PHY */ 95 void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi); 96 97 /* Callback to disable the RNG in the PHY */ 98 void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi); 99 100 /* Callback to get channel map */ 101 u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask); 102 103 /* Enables HDR metadata */ 104 bool supports_hdr; 105 106 /* Callback for hardware specific hotplug detect */ 107 bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi); 108 }; 109 110 /* HDMI audio information */ 111 struct vc4_hdmi_audio { 112 struct snd_soc_card card; 113 struct snd_soc_dai_link link; 114 struct snd_soc_dai_link_component cpu; 115 struct snd_soc_dai_link_component codec; 116 struct snd_soc_dai_link_component platform; 117 struct snd_dmaengine_dai_dma_data dma_data; 118 struct hdmi_audio_infoframe infoframe; 119 struct platform_device *codec_pdev; 120 bool streaming; 121 }; 122 123 /* General HDMI hardware state. */ 124 struct vc4_hdmi { 125 struct vc4_hdmi_audio audio; 126 127 struct platform_device *pdev; 128 const struct vc4_hdmi_variant *variant; 129 130 struct vc4_hdmi_encoder encoder; 131 struct drm_connector connector; 132 133 struct delayed_work scrambling_work; 134 135 struct i2c_adapter *ddc; 136 void __iomem *hdmicore_regs; 137 void __iomem *hd_regs; 138 139 /* VC5 Only */ 140 void __iomem *cec_regs; 141 /* VC5 Only */ 142 void __iomem *csc_regs; 143 /* VC5 Only */ 144 void __iomem *dvp_regs; 145 /* VC5 Only */ 146 void __iomem *phy_regs; 147 /* VC5 Only */ 148 void __iomem *ram_regs; 149 /* VC5 Only */ 150 void __iomem *rm_regs; 151 152 struct gpio_desc *hpd_gpio; 153 154 /* 155 * On some systems (like the RPi4), some modes are in the same 156 * frequency range than the WiFi channels (1440p@60Hz for 157 * example). Should we take evasive actions because that system 158 * has a wifi adapter? 159 */ 160 bool disable_wifi_frequencies; 161 162 /* 163 * Even if HDMI0 on the RPi4 can output modes requiring a pixel 164 * rate higher than 297MHz, it needs some adjustments in the 165 * config.txt file to be able to do so and thus won't always be 166 * available. 167 */ 168 bool disable_4kp60; 169 170 struct cec_adapter *cec_adap; 171 struct cec_msg cec_rx_msg; 172 bool cec_tx_ok; 173 bool cec_irq_was_rx; 174 175 struct clk *cec_clock; 176 struct clk *pixel_clock; 177 struct clk *hsm_clock; 178 struct clk *audio_clock; 179 struct clk *pixel_bvb_clock; 180 181 struct reset_control *reset; 182 183 struct debugfs_regset32 hdmi_regset; 184 struct debugfs_regset32 hd_regset; 185 186 /** 187 * @hw_lock: Spinlock protecting device register access. 188 */ 189 spinlock_t hw_lock; 190 191 /** 192 * @mutex: Mutex protecting the driver access across multiple 193 * frameworks (KMS, ALSA). 194 * 195 * NOTE: While supported, CEC has been left out since 196 * cec_s_phys_addr_from_edid() might call .adap_enable and lead to a 197 * reentrancy issue between .get_modes (or .detect) and .adap_enable. 198 * Since we don't share any state between the CEC hooks and KMS', it's 199 * not a big deal. The only trouble might come from updating the CEC 200 * clock divider which might be affected by a modeset, but CEC should 201 * be resilient to that. 202 */ 203 struct mutex mutex; 204 205 /** 206 * @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode 207 * for use by ALSA hooks and interrupt handlers. Protected by @mutex. 208 */ 209 struct drm_display_mode saved_adjusted_mode; 210 211 /** 212 * @output_enabled: Is the HDMI controller currently active? 213 * Protected by @mutex. 214 */ 215 bool output_enabled; 216 217 /** 218 * @scdc_enabled: Is the HDMI controller currently running with 219 * the scrambler on? Protected by @mutex. 220 */ 221 bool scdc_enabled; 222 }; 223 224 static inline struct vc4_hdmi * 225 connector_to_vc4_hdmi(struct drm_connector *connector) 226 { 227 return container_of(connector, struct vc4_hdmi, connector); 228 } 229 230 static inline struct vc4_hdmi * 231 encoder_to_vc4_hdmi(struct drm_encoder *encoder) 232 { 233 struct vc4_hdmi_encoder *_encoder = to_vc4_hdmi_encoder(encoder); 234 235 return container_of(_encoder, struct vc4_hdmi, encoder); 236 } 237 238 struct vc4_hdmi_connector_state { 239 struct drm_connector_state base; 240 unsigned long long pixel_rate; 241 }; 242 243 static inline struct vc4_hdmi_connector_state * 244 conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state) 245 { 246 return container_of(conn_state, struct vc4_hdmi_connector_state, base); 247 } 248 249 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 250 struct vc4_hdmi_connector_state *vc4_conn_state); 251 void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 252 void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 253 void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 254 255 void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, 256 struct vc4_hdmi_connector_state *vc4_conn_state); 257 void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi); 258 void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi); 259 void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi); 260 261 #endif /* _VC4_HDMI_H_ */ 262