xref: /linux/drivers/gpu/drm/vc4/vc4_hdmi.h (revision 288440de9e5fdb4a3ff73864850f080c1250fc81)
1 #ifndef _VC4_HDMI_H_
2 #define _VC4_HDMI_H_
3 
4 #include <drm/drm_connector.h>
5 #include <media/cec.h>
6 #include <sound/dmaengine_pcm.h>
7 #include <sound/soc.h>
8 
9 #include "vc4_drv.h"
10 
11 struct vc4_hdmi;
12 struct vc4_hdmi_register;
13 struct vc4_hdmi_connector_state;
14 
15 enum vc4_hdmi_phy_channel {
16 	PHY_LANE_0 = 0,
17 	PHY_LANE_1,
18 	PHY_LANE_2,
19 	PHY_LANE_CK,
20 };
21 
22 struct vc4_hdmi_variant {
23 	/* Encoder Type for that controller */
24 	enum vc4_encoder_type encoder_type;
25 
26 	/* ALSA card name */
27 	const char *card_name;
28 
29 	/* Filename to expose the registers in debugfs */
30 	const char *debugfs_name;
31 
32 	/* Maximum pixel clock supported by the controller (in Hz) */
33 	unsigned long long max_pixel_clock;
34 
35 	/* List of the registers available on that variant */
36 	const struct vc4_hdmi_register *registers;
37 
38 	/* Number of registers on that variant */
39 	unsigned int num_registers;
40 
41 	/* BCM2711 Only.
42 	 * The variants don't map the lane in the same order in the
43 	 * PHY, so this is an array mapping the HDMI channel (index)
44 	 * to the PHY lane (value).
45 	 */
46 	enum vc4_hdmi_phy_channel phy_lane_mapping[4];
47 
48 	/* The BCM2711 cannot deal with odd horizontal pixel timings */
49 	bool unsupported_odd_h_timings;
50 
51 	/*
52 	 * The BCM2711 CEC/hotplug IRQ controller is shared between the
53 	 * two HDMI controllers, and we have a proper irqchip driver for
54 	 * it.
55 	 */
56 	bool external_irq_controller;
57 
58 	/* Callback to get the resources (memory region, interrupts,
59 	 * clocks, etc) for that variant.
60 	 */
61 	int (*init_resources)(struct vc4_hdmi *vc4_hdmi);
62 
63 	/* Callback to reset the HDMI block */
64 	void (*reset)(struct vc4_hdmi *vc4_hdmi);
65 
66 	/* Callback to enable / disable the CSC */
67 	void (*csc_setup)(struct vc4_hdmi *vc4_hdmi,
68 			  struct drm_connector_state *state,
69 			  const struct drm_display_mode *mode);
70 
71 	/* Callback to configure the video timings in the HDMI block */
72 	void (*set_timings)(struct vc4_hdmi *vc4_hdmi,
73 			    struct drm_connector_state *state,
74 			    struct drm_display_mode *mode);
75 
76 	/* Callback to initialize the PHY according to the connector state */
77 	void (*phy_init)(struct vc4_hdmi *vc4_hdmi,
78 			 struct vc4_hdmi_connector_state *vc4_conn_state);
79 
80 	/* Callback to disable the PHY */
81 	void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
82 
83 	/* Callback to enable the RNG in the PHY */
84 	void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
85 
86 	/* Callback to disable the RNG in the PHY */
87 	void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
88 
89 	/* Callback to get channel map */
90 	u32 (*channel_map)(struct vc4_hdmi *vc4_hdmi, u32 channel_mask);
91 
92 	/* Enables HDR metadata */
93 	bool supports_hdr;
94 
95 	/* Callback for hardware specific hotplug detect */
96 	bool (*hp_detect)(struct vc4_hdmi *vc4_hdmi);
97 };
98 
99 /* HDMI audio information */
100 struct vc4_hdmi_audio {
101 	struct snd_soc_card card;
102 	struct snd_soc_dai_link link;
103 	struct snd_soc_dai_link_component cpu;
104 	struct snd_soc_dai_link_component codec;
105 	struct snd_soc_dai_link_component platform;
106 	struct snd_dmaengine_dai_dma_data dma_data;
107 	struct hdmi_audio_infoframe infoframe;
108 	struct platform_device *codec_pdev;
109 	bool streaming;
110 };
111 
112 enum vc4_hdmi_output_format {
113 	VC4_HDMI_OUTPUT_RGB,
114 	VC4_HDMI_OUTPUT_YUV422,
115 	VC4_HDMI_OUTPUT_YUV444,
116 	VC4_HDMI_OUTPUT_YUV420,
117 };
118 
119 /* General HDMI hardware state. */
120 struct vc4_hdmi {
121 	struct vc4_hdmi_audio audio;
122 
123 	struct platform_device *pdev;
124 	const struct vc4_hdmi_variant *variant;
125 
126 	struct vc4_encoder encoder;
127 	struct drm_connector connector;
128 
129 	struct delayed_work scrambling_work;
130 
131 	struct i2c_adapter *ddc;
132 	void __iomem *hdmicore_regs;
133 	void __iomem *hd_regs;
134 
135 	/* VC5 Only */
136 	void __iomem *cec_regs;
137 	/* VC5 Only */
138 	void __iomem *csc_regs;
139 	/* VC5 Only */
140 	void __iomem *dvp_regs;
141 	/* VC5 Only */
142 	void __iomem *phy_regs;
143 	/* VC5 Only */
144 	void __iomem *ram_regs;
145 	/* VC5 Only */
146 	void __iomem *rm_regs;
147 
148 	struct gpio_desc *hpd_gpio;
149 
150 	/*
151 	 * On some systems (like the RPi4), some modes are in the same
152 	 * frequency range than the WiFi channels (1440p@60Hz for
153 	 * example). Should we take evasive actions because that system
154 	 * has a wifi adapter?
155 	 */
156 	bool disable_wifi_frequencies;
157 
158 	/*
159 	 * Even if HDMI0 on the RPi4 can output modes requiring a pixel
160 	 * rate higher than 297MHz, it needs some adjustments in the
161 	 * config.txt file to be able to do so and thus won't always be
162 	 * available.
163 	 */
164 	bool disable_4kp60;
165 
166 	struct cec_adapter *cec_adap;
167 	struct cec_msg cec_rx_msg;
168 	bool cec_tx_ok;
169 	bool cec_irq_was_rx;
170 
171 	struct clk *cec_clock;
172 	struct clk *pixel_clock;
173 	struct clk *hsm_clock;
174 	struct clk *audio_clock;
175 	struct clk *pixel_bvb_clock;
176 
177 	struct reset_control *reset;
178 
179 	struct debugfs_regset32 hdmi_regset;
180 	struct debugfs_regset32 hd_regset;
181 
182 	/* VC5 only */
183 	struct debugfs_regset32 cec_regset;
184 	struct debugfs_regset32 csc_regset;
185 	struct debugfs_regset32 dvp_regset;
186 	struct debugfs_regset32 phy_regset;
187 	struct debugfs_regset32 ram_regset;
188 	struct debugfs_regset32 rm_regset;
189 
190 	/**
191 	 * @hw_lock: Spinlock protecting device register access.
192 	 */
193 	spinlock_t hw_lock;
194 
195 	/**
196 	 * @mutex: Mutex protecting the driver access across multiple
197 	 * frameworks (KMS, ALSA).
198 	 *
199 	 * NOTE: While supported, CEC has been left out since
200 	 * cec_s_phys_addr_from_edid() might call .adap_enable and lead to a
201 	 * reentrancy issue between .get_modes (or .detect) and .adap_enable.
202 	 * Since we don't share any state between the CEC hooks and KMS', it's
203 	 * not a big deal. The only trouble might come from updating the CEC
204 	 * clock divider which might be affected by a modeset, but CEC should
205 	 * be resilient to that.
206 	 */
207 	struct mutex mutex;
208 
209 	/**
210 	 * @saved_adjusted_mode: Copy of @drm_crtc_state.adjusted_mode
211 	 * for use by ALSA hooks and interrupt handlers. Protected by @mutex.
212 	 */
213 	struct drm_display_mode saved_adjusted_mode;
214 
215 	/**
216 	 * @packet_ram_enabled: Is the HDMI controller packet RAM currently
217 	 * on? Protected by @mutex.
218 	 */
219 	bool packet_ram_enabled;
220 
221 	/**
222 	 * @scdc_enabled: Is the HDMI controller currently running with
223 	 * the scrambler on? Protected by @mutex.
224 	 */
225 	bool scdc_enabled;
226 
227 	/**
228 	 * @output_bpc: Copy of @vc4_connector_state.output_bpc for use
229 	 * outside of KMS hooks. Protected by @mutex.
230 	 */
231 	unsigned int output_bpc;
232 
233 	/**
234 	 * @output_format: Copy of @vc4_connector_state.output_format
235 	 * for use outside of KMS hooks. Protected by @mutex.
236 	 */
237 	enum vc4_hdmi_output_format output_format;
238 };
239 
240 static inline struct vc4_hdmi *
241 connector_to_vc4_hdmi(struct drm_connector *connector)
242 {
243 	return container_of(connector, struct vc4_hdmi, connector);
244 }
245 
246 static inline struct vc4_hdmi *
247 encoder_to_vc4_hdmi(struct drm_encoder *encoder)
248 {
249 	struct vc4_encoder *_encoder = to_vc4_encoder(encoder);
250 	return container_of(_encoder, struct vc4_hdmi, encoder);
251 }
252 
253 struct vc4_hdmi_connector_state {
254 	struct drm_connector_state	base;
255 	unsigned long long		tmds_char_rate;
256 	unsigned int 			output_bpc;
257 	enum vc4_hdmi_output_format	output_format;
258 };
259 
260 static inline struct vc4_hdmi_connector_state *
261 conn_state_to_vc4_hdmi_conn_state(struct drm_connector_state *conn_state)
262 {
263 	return container_of(conn_state, struct vc4_hdmi_connector_state, base);
264 }
265 
266 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
267 		       struct vc4_hdmi_connector_state *vc4_conn_state);
268 void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
269 void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
270 void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
271 
272 void vc5_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
273 		       struct vc4_hdmi_connector_state *vc4_conn_state);
274 void vc5_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
275 void vc5_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
276 void vc5_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
277 
278 #endif /* _VC4_HDMI_H_ */
279