1c8b75bcaSEric Anholt /* 2c8b75bcaSEric Anholt * Copyright (C) 2015 Broadcom 3c8b75bcaSEric Anholt * 4c8b75bcaSEric Anholt * This program is free software; you can redistribute it and/or modify 5c8b75bcaSEric Anholt * it under the terms of the GNU General Public License version 2 as 6c8b75bcaSEric Anholt * published by the Free Software Foundation. 7c8b75bcaSEric Anholt */ 8c8b75bcaSEric Anholt 9c8b75bcaSEric Anholt #include "drmP.h" 10c8b75bcaSEric Anholt #include "drm_gem_cma_helper.h" 11c8b75bcaSEric Anholt 12c8b75bcaSEric Anholt struct vc4_dev { 13c8b75bcaSEric Anholt struct drm_device *dev; 14c8b75bcaSEric Anholt 15c8b75bcaSEric Anholt struct vc4_hdmi *hdmi; 16c8b75bcaSEric Anholt struct vc4_hvs *hvs; 17c8b75bcaSEric Anholt struct vc4_crtc *crtc[3]; 18*d3f5168aSEric Anholt struct vc4_v3d *v3d; 1948666d56SDerek Foreman 2048666d56SDerek Foreman struct drm_fbdev_cma *fbdev; 21c826a6e1SEric Anholt 22c826a6e1SEric Anholt /* The kernel-space BO cache. Tracks buffers that have been 23c826a6e1SEric Anholt * unreferenced by all other users (refcounts of 0!) but not 24c826a6e1SEric Anholt * yet freed, so we can do cheap allocations. 25c826a6e1SEric Anholt */ 26c826a6e1SEric Anholt struct vc4_bo_cache { 27c826a6e1SEric Anholt /* Array of list heads for entries in the BO cache, 28c826a6e1SEric Anholt * based on number of pages, so we can do O(1) lookups 29c826a6e1SEric Anholt * in the cache when allocating. 30c826a6e1SEric Anholt */ 31c826a6e1SEric Anholt struct list_head *size_list; 32c826a6e1SEric Anholt uint32_t size_list_size; 33c826a6e1SEric Anholt 34c826a6e1SEric Anholt /* List of all BOs in the cache, ordered by age, so we 35c826a6e1SEric Anholt * can do O(1) lookups when trying to free old 36c826a6e1SEric Anholt * buffers. 37c826a6e1SEric Anholt */ 38c826a6e1SEric Anholt struct list_head time_list; 39c826a6e1SEric Anholt struct work_struct time_work; 40c826a6e1SEric Anholt struct timer_list time_timer; 41c826a6e1SEric Anholt } bo_cache; 42c826a6e1SEric Anholt 43c826a6e1SEric Anholt struct vc4_bo_stats { 44c826a6e1SEric Anholt u32 num_allocated; 45c826a6e1SEric Anholt u32 size_allocated; 46c826a6e1SEric Anholt u32 num_cached; 47c826a6e1SEric Anholt u32 size_cached; 48c826a6e1SEric Anholt } bo_stats; 49c826a6e1SEric Anholt 50c826a6e1SEric Anholt /* Protects bo_cache and the BO stats. */ 51c826a6e1SEric Anholt struct mutex bo_lock; 52c8b75bcaSEric Anholt }; 53c8b75bcaSEric Anholt 54c8b75bcaSEric Anholt static inline struct vc4_dev * 55c8b75bcaSEric Anholt to_vc4_dev(struct drm_device *dev) 56c8b75bcaSEric Anholt { 57c8b75bcaSEric Anholt return (struct vc4_dev *)dev->dev_private; 58c8b75bcaSEric Anholt } 59c8b75bcaSEric Anholt 60c8b75bcaSEric Anholt struct vc4_bo { 61c8b75bcaSEric Anholt struct drm_gem_cma_object base; 62c826a6e1SEric Anholt 63c826a6e1SEric Anholt /* List entry for the BO's position in either 64c826a6e1SEric Anholt * vc4_exec_info->unref_list or vc4_dev->bo_cache.time_list 65c826a6e1SEric Anholt */ 66c826a6e1SEric Anholt struct list_head unref_head; 67c826a6e1SEric Anholt 68c826a6e1SEric Anholt /* Time in jiffies when the BO was put in vc4->bo_cache. */ 69c826a6e1SEric Anholt unsigned long free_time; 70c826a6e1SEric Anholt 71c826a6e1SEric Anholt /* List entry for the BO's position in vc4_dev->bo_cache.size_list */ 72c826a6e1SEric Anholt struct list_head size_head; 73463873d5SEric Anholt 74463873d5SEric Anholt /* Struct for shader validation state, if created by 75463873d5SEric Anholt * DRM_IOCTL_VC4_CREATE_SHADER_BO. 76463873d5SEric Anholt */ 77463873d5SEric Anholt struct vc4_validated_shader_info *validated_shader; 78c8b75bcaSEric Anholt }; 79c8b75bcaSEric Anholt 80c8b75bcaSEric Anholt static inline struct vc4_bo * 81c8b75bcaSEric Anholt to_vc4_bo(struct drm_gem_object *bo) 82c8b75bcaSEric Anholt { 83c8b75bcaSEric Anholt return (struct vc4_bo *)bo; 84c8b75bcaSEric Anholt } 85c8b75bcaSEric Anholt 86*d3f5168aSEric Anholt struct vc4_v3d { 87*d3f5168aSEric Anholt struct platform_device *pdev; 88*d3f5168aSEric Anholt void __iomem *regs; 89*d3f5168aSEric Anholt }; 90*d3f5168aSEric Anholt 91c8b75bcaSEric Anholt struct vc4_hvs { 92c8b75bcaSEric Anholt struct platform_device *pdev; 93c8b75bcaSEric Anholt void __iomem *regs; 94c8b75bcaSEric Anholt void __iomem *dlist; 95c8b75bcaSEric Anholt }; 96c8b75bcaSEric Anholt 97c8b75bcaSEric Anholt struct vc4_plane { 98c8b75bcaSEric Anholt struct drm_plane base; 99c8b75bcaSEric Anholt }; 100c8b75bcaSEric Anholt 101c8b75bcaSEric Anholt static inline struct vc4_plane * 102c8b75bcaSEric Anholt to_vc4_plane(struct drm_plane *plane) 103c8b75bcaSEric Anholt { 104c8b75bcaSEric Anholt return (struct vc4_plane *)plane; 105c8b75bcaSEric Anholt } 106c8b75bcaSEric Anholt 107c8b75bcaSEric Anholt enum vc4_encoder_type { 108c8b75bcaSEric Anholt VC4_ENCODER_TYPE_HDMI, 109c8b75bcaSEric Anholt VC4_ENCODER_TYPE_VEC, 110c8b75bcaSEric Anholt VC4_ENCODER_TYPE_DSI0, 111c8b75bcaSEric Anholt VC4_ENCODER_TYPE_DSI1, 112c8b75bcaSEric Anholt VC4_ENCODER_TYPE_SMI, 113c8b75bcaSEric Anholt VC4_ENCODER_TYPE_DPI, 114c8b75bcaSEric Anholt }; 115c8b75bcaSEric Anholt 116c8b75bcaSEric Anholt struct vc4_encoder { 117c8b75bcaSEric Anholt struct drm_encoder base; 118c8b75bcaSEric Anholt enum vc4_encoder_type type; 119c8b75bcaSEric Anholt u32 clock_select; 120c8b75bcaSEric Anholt }; 121c8b75bcaSEric Anholt 122c8b75bcaSEric Anholt static inline struct vc4_encoder * 123c8b75bcaSEric Anholt to_vc4_encoder(struct drm_encoder *encoder) 124c8b75bcaSEric Anholt { 125c8b75bcaSEric Anholt return container_of(encoder, struct vc4_encoder, base); 126c8b75bcaSEric Anholt } 127c8b75bcaSEric Anholt 128*d3f5168aSEric Anholt #define V3D_READ(offset) readl(vc4->v3d->regs + offset) 129*d3f5168aSEric Anholt #define V3D_WRITE(offset, val) writel(val, vc4->v3d->regs + offset) 130c8b75bcaSEric Anholt #define HVS_READ(offset) readl(vc4->hvs->regs + offset) 131c8b75bcaSEric Anholt #define HVS_WRITE(offset, val) writel(val, vc4->hvs->regs + offset) 132c8b75bcaSEric Anholt 133c8b75bcaSEric Anholt /** 134463873d5SEric Anholt * struct vc4_texture_sample_info - saves the offsets into the UBO for texture 135463873d5SEric Anholt * setup parameters. 136463873d5SEric Anholt * 137463873d5SEric Anholt * This will be used at draw time to relocate the reference to the texture 138463873d5SEric Anholt * contents in p0, and validate that the offset combined with 139463873d5SEric Anholt * width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO. 140463873d5SEric Anholt * Note that the hardware treats unprovided config parameters as 0, so not all 141463873d5SEric Anholt * of them need to be set up for every texure sample, and we'll store ~0 as 142463873d5SEric Anholt * the offset to mark the unused ones. 143463873d5SEric Anholt * 144463873d5SEric Anholt * See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit 145463873d5SEric Anholt * Setup") for definitions of the texture parameters. 146463873d5SEric Anholt */ 147463873d5SEric Anholt struct vc4_texture_sample_info { 148463873d5SEric Anholt bool is_direct; 149463873d5SEric Anholt uint32_t p_offset[4]; 150463873d5SEric Anholt }; 151463873d5SEric Anholt 152463873d5SEric Anholt /** 153463873d5SEric Anholt * struct vc4_validated_shader_info - information about validated shaders that 154463873d5SEric Anholt * needs to be used from command list validation. 155463873d5SEric Anholt * 156463873d5SEric Anholt * For a given shader, each time a shader state record references it, we need 157463873d5SEric Anholt * to verify that the shader doesn't read more uniforms than the shader state 158463873d5SEric Anholt * record's uniform BO pointer can provide, and we need to apply relocations 159463873d5SEric Anholt * and validate the shader state record's uniforms that define the texture 160463873d5SEric Anholt * samples. 161463873d5SEric Anholt */ 162463873d5SEric Anholt struct vc4_validated_shader_info { 163463873d5SEric Anholt uint32_t uniforms_size; 164463873d5SEric Anholt uint32_t uniforms_src_size; 165463873d5SEric Anholt uint32_t num_texture_samples; 166463873d5SEric Anholt struct vc4_texture_sample_info *texture_samples; 167463873d5SEric Anholt }; 168463873d5SEric Anholt 169463873d5SEric Anholt /** 170c8b75bcaSEric Anholt * _wait_for - magic (register) wait macro 171c8b75bcaSEric Anholt * 172c8b75bcaSEric Anholt * Does the right thing for modeset paths when run under kdgb or similar atomic 173c8b75bcaSEric Anholt * contexts. Note that it's important that we check the condition again after 174c8b75bcaSEric Anholt * having timed out, since the timeout could be due to preemption or similar and 175c8b75bcaSEric Anholt * we've never had a chance to check the condition before the timeout. 176c8b75bcaSEric Anholt */ 177c8b75bcaSEric Anholt #define _wait_for(COND, MS, W) ({ \ 178c8b75bcaSEric Anholt unsigned long timeout__ = jiffies + msecs_to_jiffies(MS) + 1; \ 179c8b75bcaSEric Anholt int ret__ = 0; \ 180c8b75bcaSEric Anholt while (!(COND)) { \ 181c8b75bcaSEric Anholt if (time_after(jiffies, timeout__)) { \ 182c8b75bcaSEric Anholt if (!(COND)) \ 183c8b75bcaSEric Anholt ret__ = -ETIMEDOUT; \ 184c8b75bcaSEric Anholt break; \ 185c8b75bcaSEric Anholt } \ 186c8b75bcaSEric Anholt if (W && drm_can_sleep()) { \ 187c8b75bcaSEric Anholt msleep(W); \ 188c8b75bcaSEric Anholt } else { \ 189c8b75bcaSEric Anholt cpu_relax(); \ 190c8b75bcaSEric Anholt } \ 191c8b75bcaSEric Anholt } \ 192c8b75bcaSEric Anholt ret__; \ 193c8b75bcaSEric Anholt }) 194c8b75bcaSEric Anholt 195c8b75bcaSEric Anholt #define wait_for(COND, MS) _wait_for(COND, MS, 1) 196c8b75bcaSEric Anholt 197c8b75bcaSEric Anholt /* vc4_bo.c */ 198c826a6e1SEric Anholt struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size); 199c8b75bcaSEric Anholt void vc4_free_object(struct drm_gem_object *gem_obj); 200c826a6e1SEric Anholt struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t size, 201c826a6e1SEric Anholt bool from_cache); 202c8b75bcaSEric Anholt int vc4_dumb_create(struct drm_file *file_priv, 203c8b75bcaSEric Anholt struct drm_device *dev, 204c8b75bcaSEric Anholt struct drm_mode_create_dumb *args); 205c8b75bcaSEric Anholt struct dma_buf *vc4_prime_export(struct drm_device *dev, 206c8b75bcaSEric Anholt struct drm_gem_object *obj, int flags); 207d5bc60f6SEric Anholt int vc4_create_bo_ioctl(struct drm_device *dev, void *data, 208d5bc60f6SEric Anholt struct drm_file *file_priv); 209463873d5SEric Anholt int vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data, 210463873d5SEric Anholt struct drm_file *file_priv); 211d5bc60f6SEric Anholt int vc4_mmap_bo_ioctl(struct drm_device *dev, void *data, 212d5bc60f6SEric Anholt struct drm_file *file_priv); 213463873d5SEric Anholt int vc4_mmap(struct file *filp, struct vm_area_struct *vma); 214463873d5SEric Anholt int vc4_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); 215463873d5SEric Anholt void *vc4_prime_vmap(struct drm_gem_object *obj); 216c826a6e1SEric Anholt void vc4_bo_cache_init(struct drm_device *dev); 217c826a6e1SEric Anholt void vc4_bo_cache_destroy(struct drm_device *dev); 218c826a6e1SEric Anholt int vc4_bo_stats_debugfs(struct seq_file *m, void *arg); 219c8b75bcaSEric Anholt 220c8b75bcaSEric Anholt /* vc4_crtc.c */ 221c8b75bcaSEric Anholt extern struct platform_driver vc4_crtc_driver; 2221f43710aSDave Airlie int vc4_enable_vblank(struct drm_device *dev, unsigned int crtc_id); 2231f43710aSDave Airlie void vc4_disable_vblank(struct drm_device *dev, unsigned int crtc_id); 224c8b75bcaSEric Anholt void vc4_cancel_page_flip(struct drm_crtc *crtc, struct drm_file *file); 225c8b75bcaSEric Anholt int vc4_crtc_debugfs_regs(struct seq_file *m, void *arg); 226c8b75bcaSEric Anholt 227c8b75bcaSEric Anholt /* vc4_debugfs.c */ 228c8b75bcaSEric Anholt int vc4_debugfs_init(struct drm_minor *minor); 229c8b75bcaSEric Anholt void vc4_debugfs_cleanup(struct drm_minor *minor); 230c8b75bcaSEric Anholt 231c8b75bcaSEric Anholt /* vc4_drv.c */ 232c8b75bcaSEric Anholt void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index); 233c8b75bcaSEric Anholt 234c8b75bcaSEric Anholt /* vc4_hdmi.c */ 235c8b75bcaSEric Anholt extern struct platform_driver vc4_hdmi_driver; 236c8b75bcaSEric Anholt int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused); 237c8b75bcaSEric Anholt 238c8b75bcaSEric Anholt /* vc4_hvs.c */ 239c8b75bcaSEric Anholt extern struct platform_driver vc4_hvs_driver; 240c8b75bcaSEric Anholt void vc4_hvs_dump_state(struct drm_device *dev); 241c8b75bcaSEric Anholt int vc4_hvs_debugfs_regs(struct seq_file *m, void *unused); 242c8b75bcaSEric Anholt 243c8b75bcaSEric Anholt /* vc4_kms.c */ 244c8b75bcaSEric Anholt int vc4_kms_load(struct drm_device *dev); 245c8b75bcaSEric Anholt 246c8b75bcaSEric Anholt /* vc4_plane.c */ 247c8b75bcaSEric Anholt struct drm_plane *vc4_plane_init(struct drm_device *dev, 248c8b75bcaSEric Anholt enum drm_plane_type type); 249c8b75bcaSEric Anholt u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist); 250c8b75bcaSEric Anholt u32 vc4_plane_dlist_size(struct drm_plane_state *state); 251463873d5SEric Anholt 252*d3f5168aSEric Anholt /* vc4_v3d.c */ 253*d3f5168aSEric Anholt extern struct platform_driver vc4_v3d_driver; 254*d3f5168aSEric Anholt int vc4_v3d_debugfs_ident(struct seq_file *m, void *unused); 255*d3f5168aSEric Anholt int vc4_v3d_debugfs_regs(struct seq_file *m, void *unused); 256*d3f5168aSEric Anholt 257463873d5SEric Anholt /* vc4_validate_shader.c */ 258463873d5SEric Anholt struct vc4_validated_shader_info * 259463873d5SEric Anholt vc4_validate_shader(struct drm_gem_cma_object *shader_obj); 260