1caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 208302c35SEric Anholt /* 308302c35SEric Anholt * Copyright (C) 2016 Broadcom Limited 408302c35SEric Anholt */ 508302c35SEric Anholt 608302c35SEric Anholt /** 708302c35SEric Anholt * DOC: VC4 DPI module 808302c35SEric Anholt * 908302c35SEric Anholt * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI 10f6c01530SEric Anholt * signals. On BCM2835, these can be routed out to GPIO0-27 with the 11f6c01530SEric Anholt * ALT2 function. 1208302c35SEric Anholt */ 1308302c35SEric Anholt 14b7e8e25bSMasahiro Yamada #include <drm/drm_atomic_helper.h> 157b1298e0SEric Anholt #include <drm/drm_bridge.h> 1671b1bd4cSMaxime Ripard #include <drm/drm_drv.h> 17b7e8e25bSMasahiro Yamada #include <drm/drm_edid.h> 187b1298e0SEric Anholt #include <drm/drm_of.h> 19b7e8e25bSMasahiro Yamada #include <drm/drm_panel.h> 20fcd70cd3SDaniel Vetter #include <drm/drm_probe_helper.h> 21f6ebc1b0SThomas Zimmermann #include <drm/drm_simple_kms_helper.h> 22b7e8e25bSMasahiro Yamada #include <linux/clk.h> 23b7e8e25bSMasahiro Yamada #include <linux/component.h> 2472bd9ea3SVille Syrjälä #include <linux/media-bus-format.h> 25b7e8e25bSMasahiro Yamada #include <linux/of_graph.h> 26b7e8e25bSMasahiro Yamada #include <linux/of_platform.h> 2708302c35SEric Anholt #include "vc4_drv.h" 2808302c35SEric Anholt #include "vc4_regs.h" 2908302c35SEric Anholt 3008302c35SEric Anholt #define DPI_C 0x00 3108302c35SEric Anholt # define DPI_OUTPUT_ENABLE_MODE BIT(16) 3208302c35SEric Anholt 3308302c35SEric Anholt /* The order field takes the incoming 24 bit RGB from the pixel valve 3408302c35SEric Anholt * and shuffles the 3 channels. 3508302c35SEric Anholt */ 3608302c35SEric Anholt # define DPI_ORDER_MASK VC4_MASK(15, 14) 3708302c35SEric Anholt # define DPI_ORDER_SHIFT 14 3808302c35SEric Anholt # define DPI_ORDER_RGB 0 3908302c35SEric Anholt # define DPI_ORDER_BGR 1 4008302c35SEric Anholt # define DPI_ORDER_GRB 2 4108302c35SEric Anholt # define DPI_ORDER_BRG 3 4208302c35SEric Anholt 4308302c35SEric Anholt /* The format field takes the ORDER-shuffled pixel valve data and 4408302c35SEric Anholt * formats it onto the output lines. 4508302c35SEric Anholt */ 4608302c35SEric Anholt # define DPI_FORMAT_MASK VC4_MASK(13, 11) 4708302c35SEric Anholt # define DPI_FORMAT_SHIFT 11 4808302c35SEric Anholt /* This define is named in the hardware, but actually just outputs 0. */ 4908302c35SEric Anholt # define DPI_FORMAT_9BIT_666_RGB 0 5008302c35SEric Anholt /* Outputs 00000000rrrrrggggggbbbbb */ 5108302c35SEric Anholt # define DPI_FORMAT_16BIT_565_RGB_1 1 5208302c35SEric Anholt /* Outputs 000rrrrr00gggggg000bbbbb */ 5308302c35SEric Anholt # define DPI_FORMAT_16BIT_565_RGB_2 2 5408302c35SEric Anholt /* Outputs 00rrrrr000gggggg00bbbbb0 */ 5508302c35SEric Anholt # define DPI_FORMAT_16BIT_565_RGB_3 3 5608302c35SEric Anholt /* Outputs 000000rrrrrrggggggbbbbbb */ 5708302c35SEric Anholt # define DPI_FORMAT_18BIT_666_RGB_1 4 5808302c35SEric Anholt /* Outputs 00rrrrrr00gggggg00bbbbbb */ 5908302c35SEric Anholt # define DPI_FORMAT_18BIT_666_RGB_2 5 6008302c35SEric Anholt /* Outputs rrrrrrrrggggggggbbbbbbbb */ 6108302c35SEric Anholt # define DPI_FORMAT_24BIT_888_RGB 6 6208302c35SEric Anholt 6308302c35SEric Anholt /* Reverses the polarity of the corresponding signal */ 6408302c35SEric Anholt # define DPI_PIXEL_CLK_INVERT BIT(10) 6508302c35SEric Anholt # define DPI_HSYNC_INVERT BIT(9) 6608302c35SEric Anholt # define DPI_VSYNC_INVERT BIT(8) 6708302c35SEric Anholt # define DPI_OUTPUT_ENABLE_INVERT BIT(7) 6808302c35SEric Anholt 6908302c35SEric Anholt /* Outputs the signal the falling clock edge instead of rising. */ 7008302c35SEric Anholt # define DPI_HSYNC_NEGATE BIT(6) 7108302c35SEric Anholt # define DPI_VSYNC_NEGATE BIT(5) 7208302c35SEric Anholt # define DPI_OUTPUT_ENABLE_NEGATE BIT(4) 7308302c35SEric Anholt 7408302c35SEric Anholt /* Disables the signal */ 7508302c35SEric Anholt # define DPI_HSYNC_DISABLE BIT(3) 7608302c35SEric Anholt # define DPI_VSYNC_DISABLE BIT(2) 7708302c35SEric Anholt # define DPI_OUTPUT_ENABLE_DISABLE BIT(1) 7808302c35SEric Anholt 7908302c35SEric Anholt /* Power gate to the device, full reset at 0 -> 1 transition */ 8008302c35SEric Anholt # define DPI_ENABLE BIT(0) 8108302c35SEric Anholt 8208302c35SEric Anholt /* All other registers besides DPI_C return the ID */ 8308302c35SEric Anholt #define DPI_ID 0x04 8408302c35SEric Anholt # define DPI_ID_VALUE 0x00647069 8508302c35SEric Anholt 8608302c35SEric Anholt /* General DPI hardware state. */ 8708302c35SEric Anholt struct vc4_dpi { 887c9a4babSMaxime Ripard struct vc4_encoder encoder; 8908302c35SEric Anholt 907c9a4babSMaxime Ripard struct platform_device *pdev; 9108302c35SEric Anholt 9208302c35SEric Anholt void __iomem *regs; 9308302c35SEric Anholt 9408302c35SEric Anholt struct clk *pixel_clock; 9508302c35SEric Anholt struct clk *core_clock; 963051719aSEric Anholt 973051719aSEric Anholt struct debugfs_regset32 regset; 9808302c35SEric Anholt }; 9908302c35SEric Anholt 1007c9a4babSMaxime Ripard static inline struct vc4_dpi * 1017c9a4babSMaxime Ripard to_vc4_dpi(struct drm_encoder *encoder) 1027c9a4babSMaxime Ripard { 1037c9a4babSMaxime Ripard return container_of(encoder, struct vc4_dpi, encoder.base); 1047c9a4babSMaxime Ripard } 1057c9a4babSMaxime Ripard 10608302c35SEric Anholt #define DPI_READ(offset) readl(dpi->regs + (offset)) 10708302c35SEric Anholt #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset)) 10808302c35SEric Anholt 1093051719aSEric Anholt static const struct debugfs_reg32 dpi_regs[] = { 1103051719aSEric Anholt VC4_REG32(DPI_C), 1113051719aSEric Anholt VC4_REG32(DPI_ID), 11208302c35SEric Anholt }; 11308302c35SEric Anholt 11408302c35SEric Anholt static void vc4_dpi_encoder_disable(struct drm_encoder *encoder) 11508302c35SEric Anholt { 11671b1bd4cSMaxime Ripard struct drm_device *dev = encoder->dev; 1177c9a4babSMaxime Ripard struct vc4_dpi *dpi = to_vc4_dpi(encoder); 11871b1bd4cSMaxime Ripard int idx; 11971b1bd4cSMaxime Ripard 12071b1bd4cSMaxime Ripard if (!drm_dev_enter(dev, &idx)) 12171b1bd4cSMaxime Ripard return; 12208302c35SEric Anholt 12308302c35SEric Anholt clk_disable_unprepare(dpi->pixel_clock); 12471b1bd4cSMaxime Ripard 12571b1bd4cSMaxime Ripard drm_dev_exit(idx); 12608302c35SEric Anholt } 12708302c35SEric Anholt 12808302c35SEric Anholt static void vc4_dpi_encoder_enable(struct drm_encoder *encoder) 12908302c35SEric Anholt { 130164c2416SEric Anholt struct drm_device *dev = encoder->dev; 13108302c35SEric Anholt struct drm_display_mode *mode = &encoder->crtc->mode; 1327c9a4babSMaxime Ripard struct vc4_dpi *dpi = to_vc4_dpi(encoder); 133164c2416SEric Anholt struct drm_connector_list_iter conn_iter; 134164c2416SEric Anholt struct drm_connector *connector = NULL, *connector_scan; 1357fea3c23SDave Stevenson u32 dpi_c = DPI_ENABLE; 13671b1bd4cSMaxime Ripard int idx; 13708302c35SEric Anholt int ret; 13808302c35SEric Anholt 139164c2416SEric Anholt /* Look up the connector attached to DPI so we can get the 140164c2416SEric Anholt * bus_format. Ideally the bridge would tell us the 141164c2416SEric Anholt * bus_format we want, but it doesn't yet, so assume that it's 142164c2416SEric Anholt * uniform throughout the bridge chain. 143164c2416SEric Anholt */ 144164c2416SEric Anholt drm_connector_list_iter_begin(dev, &conn_iter); 145164c2416SEric Anholt drm_for_each_connector_iter(connector_scan, &conn_iter) { 146164c2416SEric Anholt if (connector_scan->encoder == encoder) { 147164c2416SEric Anholt connector = connector_scan; 148164c2416SEric Anholt break; 149164c2416SEric Anholt } 150164c2416SEric Anholt } 151164c2416SEric Anholt drm_connector_list_iter_end(&conn_iter); 152164c2416SEric Anholt 1530c9a31b8SDave Stevenson /* Default to 18bit if no connector or format found. */ 1540c9a31b8SDave Stevenson dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT); 1557a70b0b9SDave Stevenson 1563c270763SDave Stevenson if (connector) { 1573c270763SDave Stevenson if (connector->display_info.num_bus_formats) { 158164c2416SEric Anholt u32 bus_format = connector->display_info.bus_formats[0]; 15908302c35SEric Anholt 1607a70b0b9SDave Stevenson dpi_c &= ~DPI_FORMAT_MASK; 1617a70b0b9SDave Stevenson 16208302c35SEric Anholt switch (bus_format) { 16308302c35SEric Anholt case MEDIA_BUS_FMT_RGB888_1X24: 16408302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, 16508302c35SEric Anholt DPI_FORMAT); 16608302c35SEric Anholt break; 16708302c35SEric Anholt case MEDIA_BUS_FMT_BGR888_1X24: 16808302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, 16908302c35SEric Anholt DPI_FORMAT); 1703c270763SDave Stevenson dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, 1713c270763SDave Stevenson DPI_ORDER); 17208302c35SEric Anholt break; 173465bf9b7SJoerg Quinten case MEDIA_BUS_FMT_BGR666_1X24_CPADHI: 174465bf9b7SJoerg Quinten dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER); 175465bf9b7SJoerg Quinten fallthrough; 17608302c35SEric Anholt case MEDIA_BUS_FMT_RGB666_1X24_CPADHI: 17708302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2, 17808302c35SEric Anholt DPI_FORMAT); 17908302c35SEric Anholt break; 180465bf9b7SJoerg Quinten case MEDIA_BUS_FMT_BGR666_1X18: 181465bf9b7SJoerg Quinten dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER); 182465bf9b7SJoerg Quinten fallthrough; 18308302c35SEric Anholt case MEDIA_BUS_FMT_RGB666_1X18: 18408302c35SEric Anholt dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, 18508302c35SEric Anholt DPI_FORMAT); 18608302c35SEric Anholt break; 18708302c35SEric Anholt case MEDIA_BUS_FMT_RGB565_1X16: 188*0870d86eSDave Stevenson dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1, 18908302c35SEric Anholt DPI_FORMAT); 19008302c35SEric Anholt break; 19111fb69c7SChris Morgan case MEDIA_BUS_FMT_RGB565_1X24_CPADHI: 19211fb69c7SChris Morgan dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2, 19311fb69c7SChris Morgan DPI_FORMAT); 19411fb69c7SChris Morgan break; 19508302c35SEric Anholt default: 1963c270763SDave Stevenson DRM_ERROR("Unknown media bus format %d\n", 1973c270763SDave Stevenson bus_format); 19808302c35SEric Anholt break; 19908302c35SEric Anholt } 2003c270763SDave Stevenson } 2013c270763SDave Stevenson 2023c270763SDave Stevenson if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE) 2033c270763SDave Stevenson dpi_c |= DPI_PIXEL_CLK_INVERT; 2043c270763SDave Stevenson 2053c270763SDave Stevenson if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW) 2063c270763SDave Stevenson dpi_c |= DPI_OUTPUT_ENABLE_INVERT; 20708302c35SEric Anholt } 20808302c35SEric Anholt 2097fea3c23SDave Stevenson if (mode->flags & DRM_MODE_FLAG_CSYNC) { 2107fea3c23SDave Stevenson if (mode->flags & DRM_MODE_FLAG_NCSYNC) 2117fea3c23SDave Stevenson dpi_c |= DPI_OUTPUT_ENABLE_INVERT; 2127fea3c23SDave Stevenson } else { 2137fea3c23SDave Stevenson dpi_c |= DPI_OUTPUT_ENABLE_MODE; 2147fea3c23SDave Stevenson 21508302c35SEric Anholt if (mode->flags & DRM_MODE_FLAG_NHSYNC) 21608302c35SEric Anholt dpi_c |= DPI_HSYNC_INVERT; 21708302c35SEric Anholt else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC)) 21808302c35SEric Anholt dpi_c |= DPI_HSYNC_DISABLE; 21908302c35SEric Anholt 22008302c35SEric Anholt if (mode->flags & DRM_MODE_FLAG_NVSYNC) 22108302c35SEric Anholt dpi_c |= DPI_VSYNC_INVERT; 22208302c35SEric Anholt else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC)) 22308302c35SEric Anholt dpi_c |= DPI_VSYNC_DISABLE; 2247fea3c23SDave Stevenson } 22508302c35SEric Anholt 22671b1bd4cSMaxime Ripard if (!drm_dev_enter(dev, &idx)) 22771b1bd4cSMaxime Ripard return; 22871b1bd4cSMaxime Ripard 22908302c35SEric Anholt DPI_WRITE(DPI_C, dpi_c); 23008302c35SEric Anholt 23108302c35SEric Anholt ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000); 23208302c35SEric Anholt if (ret) 23308302c35SEric Anholt DRM_ERROR("Failed to set clock rate: %d\n", ret); 23408302c35SEric Anholt 23508302c35SEric Anholt ret = clk_prepare_enable(dpi->pixel_clock); 23608302c35SEric Anholt if (ret) 23708302c35SEric Anholt DRM_ERROR("Failed to set clock rate: %d\n", ret); 23871b1bd4cSMaxime Ripard 23971b1bd4cSMaxime Ripard drm_dev_exit(idx); 24008302c35SEric Anholt } 24108302c35SEric Anholt 242c50a115bSJose Abreu static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder, 243c50a115bSJose Abreu const struct drm_display_mode *mode) 244e2298350SMario Kleiner { 245c50a115bSJose Abreu if (mode->flags & DRM_MODE_FLAG_INTERLACE) 246c50a115bSJose Abreu return MODE_NO_INTERLACE; 247e2298350SMario Kleiner 248c50a115bSJose Abreu return MODE_OK; 249e2298350SMario Kleiner } 250e2298350SMario Kleiner 25108302c35SEric Anholt static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = { 25208302c35SEric Anholt .disable = vc4_dpi_encoder_disable, 25308302c35SEric Anholt .enable = vc4_dpi_encoder_enable, 254c50a115bSJose Abreu .mode_valid = vc4_dpi_encoder_mode_valid, 25508302c35SEric Anholt }; 25608302c35SEric Anholt 257445b287eSMaxime Ripard static int vc4_dpi_late_register(struct drm_encoder *encoder) 258445b287eSMaxime Ripard { 259445b287eSMaxime Ripard struct drm_device *drm = encoder->dev; 260445b287eSMaxime Ripard struct vc4_dpi *dpi = to_vc4_dpi(encoder); 261445b287eSMaxime Ripard int ret; 262445b287eSMaxime Ripard 263445b287eSMaxime Ripard ret = vc4_debugfs_add_regset32(drm->primary, "dpi_regs", &dpi->regset); 264445b287eSMaxime Ripard if (ret) 265445b287eSMaxime Ripard return ret; 266445b287eSMaxime Ripard 267445b287eSMaxime Ripard return 0; 268445b287eSMaxime Ripard } 269445b287eSMaxime Ripard 270445b287eSMaxime Ripard static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = { 271445b287eSMaxime Ripard .late_register = vc4_dpi_late_register, 272445b287eSMaxime Ripard }; 273445b287eSMaxime Ripard 27408302c35SEric Anholt static const struct of_device_id vc4_dpi_dt_match[] = { 27508302c35SEric Anholt { .compatible = "brcm,bcm2835-dpi", .data = NULL }, 27608302c35SEric Anholt {} 27708302c35SEric Anholt }; 27808302c35SEric Anholt 2797b1298e0SEric Anholt /* Sets up the next link in the display chain, whether it's a panel or 2807b1298e0SEric Anholt * a bridge. 28108302c35SEric Anholt */ 2827b1298e0SEric Anholt static int vc4_dpi_init_bridge(struct vc4_dpi *dpi) 28308302c35SEric Anholt { 284055af023SMaxime Ripard struct drm_device *drm = dpi->encoder.base.dev; 2857b1298e0SEric Anholt struct device *dev = &dpi->pdev->dev; 2868f6b06c1Sbenjamin.gaignard@linaro.org struct drm_bridge *bridge; 28708302c35SEric Anholt 288055af023SMaxime Ripard bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0); 2890caddbbfSMaxime Ripard if (IS_ERR(bridge)) { 2907b1298e0SEric Anholt /* If nothing was connected in the DT, that's not an 2917b1298e0SEric Anholt * error. 2927b1298e0SEric Anholt */ 2930caddbbfSMaxime Ripard if (PTR_ERR(bridge) == -ENODEV) 2947b1298e0SEric Anholt return 0; 2957b1298e0SEric Anholt else 2960caddbbfSMaxime Ripard return PTR_ERR(bridge); 2977b1298e0SEric Anholt } 29808302c35SEric Anholt 2997c9a4babSMaxime Ripard return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0); 30008302c35SEric Anholt } 30108302c35SEric Anholt 30277932adfSMaxime Ripard static void vc4_dpi_disable_clock(void *ptr) 30377932adfSMaxime Ripard { 30477932adfSMaxime Ripard struct vc4_dpi *dpi = ptr; 30577932adfSMaxime Ripard 30677932adfSMaxime Ripard clk_disable_unprepare(dpi->core_clock); 30777932adfSMaxime Ripard } 30877932adfSMaxime Ripard 30908302c35SEric Anholt static int vc4_dpi_bind(struct device *dev, struct device *master, void *data) 31008302c35SEric Anholt { 31108302c35SEric Anholt struct platform_device *pdev = to_platform_device(dev); 31208302c35SEric Anholt struct drm_device *drm = dev_get_drvdata(master); 31308302c35SEric Anholt struct vc4_dpi *dpi; 31408302c35SEric Anholt int ret; 31508302c35SEric Anholt 3167f0ba8f9SMaxime Ripard dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL); 31708302c35SEric Anholt if (!dpi) 31808302c35SEric Anholt return -ENOMEM; 3197f0ba8f9SMaxime Ripard 3207c9a4babSMaxime Ripard dpi->encoder.type = VC4_ENCODER_TYPE_DPI; 32108302c35SEric Anholt dpi->pdev = pdev; 32208302c35SEric Anholt dpi->regs = vc4_ioremap_regs(pdev, 0); 32308302c35SEric Anholt if (IS_ERR(dpi->regs)) 32408302c35SEric Anholt return PTR_ERR(dpi->regs); 3253051719aSEric Anholt dpi->regset.base = dpi->regs; 3263051719aSEric Anholt dpi->regset.regs = dpi_regs; 3273051719aSEric Anholt dpi->regset.nregs = ARRAY_SIZE(dpi_regs); 32808302c35SEric Anholt 32908302c35SEric Anholt if (DPI_READ(DPI_ID) != DPI_ID_VALUE) { 33008302c35SEric Anholt dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n", 33108302c35SEric Anholt DPI_READ(DPI_ID), DPI_ID_VALUE); 33208302c35SEric Anholt return -ENODEV; 33308302c35SEric Anholt } 33408302c35SEric Anholt 33508302c35SEric Anholt dpi->core_clock = devm_clk_get(dev, "core"); 33608302c35SEric Anholt if (IS_ERR(dpi->core_clock)) { 33708302c35SEric Anholt ret = PTR_ERR(dpi->core_clock); 33808302c35SEric Anholt if (ret != -EPROBE_DEFER) 33908302c35SEric Anholt DRM_ERROR("Failed to get core clock: %d\n", ret); 34008302c35SEric Anholt return ret; 34108302c35SEric Anholt } 342ff5b18ceSMaxime Ripard 34308302c35SEric Anholt dpi->pixel_clock = devm_clk_get(dev, "pixel"); 34408302c35SEric Anholt if (IS_ERR(dpi->pixel_clock)) { 34508302c35SEric Anholt ret = PTR_ERR(dpi->pixel_clock); 34608302c35SEric Anholt if (ret != -EPROBE_DEFER) 34708302c35SEric Anholt DRM_ERROR("Failed to get pixel clock: %d\n", ret); 34808302c35SEric Anholt return ret; 34908302c35SEric Anholt } 35008302c35SEric Anholt 35108302c35SEric Anholt ret = clk_prepare_enable(dpi->core_clock); 352ff5b18ceSMaxime Ripard if (ret) { 35308302c35SEric Anholt DRM_ERROR("Failed to turn on core clock: %d\n", ret); 354ff5b18ceSMaxime Ripard return ret; 355ff5b18ceSMaxime Ripard } 35608302c35SEric Anholt 35777932adfSMaxime Ripard ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi); 35877932adfSMaxime Ripard if (ret) 35977932adfSMaxime Ripard return ret; 36077932adfSMaxime Ripard 361e126d318SMaxime Ripard ret = drmm_encoder_init(drm, &dpi->encoder.base, 362445b287eSMaxime Ripard &vc4_dpi_encoder_funcs, 363e126d318SMaxime Ripard DRM_MODE_ENCODER_DPI, 364e126d318SMaxime Ripard NULL); 365e126d318SMaxime Ripard if (ret) 366e126d318SMaxime Ripard return ret; 367e126d318SMaxime Ripard 3687c9a4babSMaxime Ripard drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs); 36908302c35SEric Anholt 3707b1298e0SEric Anholt ret = vc4_dpi_init_bridge(dpi); 3717b1298e0SEric Anholt if (ret) 372e126d318SMaxime Ripard return ret; 37308302c35SEric Anholt 37408302c35SEric Anholt dev_set_drvdata(dev, dpi); 37508302c35SEric Anholt 37608302c35SEric Anholt return 0; 37708302c35SEric Anholt } 37808302c35SEric Anholt 37908302c35SEric Anholt static const struct component_ops vc4_dpi_ops = { 38008302c35SEric Anholt .bind = vc4_dpi_bind, 38108302c35SEric Anholt }; 38208302c35SEric Anholt 38308302c35SEric Anholt static int vc4_dpi_dev_probe(struct platform_device *pdev) 38408302c35SEric Anholt { 38508302c35SEric Anholt return component_add(&pdev->dev, &vc4_dpi_ops); 38608302c35SEric Anholt } 38708302c35SEric Anholt 38808302c35SEric Anholt static int vc4_dpi_dev_remove(struct platform_device *pdev) 38908302c35SEric Anholt { 39008302c35SEric Anholt component_del(&pdev->dev, &vc4_dpi_ops); 39108302c35SEric Anholt return 0; 39208302c35SEric Anholt } 39308302c35SEric Anholt 39408302c35SEric Anholt struct platform_driver vc4_dpi_driver = { 39508302c35SEric Anholt .probe = vc4_dpi_dev_probe, 39608302c35SEric Anholt .remove = vc4_dpi_dev_remove, 39708302c35SEric Anholt .driver = { 39808302c35SEric Anholt .name = "vc4_dpi", 39908302c35SEric Anholt .of_match_table = vc4_dpi_dt_match, 40008302c35SEric Anholt }, 40108302c35SEric Anholt }; 402