1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Copyright (C) 2015-2018 Broadcom */ 3 4 #include <linux/delay.h> 5 #include <linux/mutex.h> 6 #include <linux/spinlock_types.h> 7 #include <linux/workqueue.h> 8 9 #include <drm/drm_encoder.h> 10 #include <drm/drm_gem.h> 11 #include <drm/drm_gem_shmem_helper.h> 12 #include <drm/gpu_scheduler.h> 13 14 #include "v3d_performance_counters.h" 15 16 #include "uapi/drm/v3d_drm.h" 17 18 struct clk; 19 struct platform_device; 20 struct reset_control; 21 22 #define V3D_MMU_PAGE_SHIFT 12 23 #define V3D_PAGE_FACTOR (PAGE_SIZE >> V3D_MMU_PAGE_SHIFT) 24 25 #define V3D_MAX_QUEUES (V3D_CPU + 1) 26 27 static inline char *v3d_queue_to_string(enum v3d_queue queue) 28 { 29 switch (queue) { 30 case V3D_BIN: return "bin"; 31 case V3D_RENDER: return "render"; 32 case V3D_TFU: return "tfu"; 33 case V3D_CSD: return "csd"; 34 case V3D_CACHE_CLEAN: return "cache_clean"; 35 case V3D_CPU: return "cpu"; 36 } 37 return "UNKNOWN"; 38 } 39 40 struct v3d_stats { 41 u64 start_ns; 42 u64 enabled_ns; 43 u64 jobs_completed; 44 45 /* 46 * This seqcount is used to protect the access to the GPU stats 47 * variables. It must be used as, while we are reading the stats, 48 * IRQs can happen and the stats can be updated. 49 */ 50 seqcount_t lock; 51 }; 52 53 struct v3d_queue_state { 54 struct drm_gpu_scheduler sched; 55 56 u64 fence_context; 57 u64 emit_seqno; 58 59 /* Stores the GPU stats for this queue in the global context. */ 60 struct v3d_stats stats; 61 }; 62 63 /* Performance monitor object. The perform lifetime is controlled by userspace 64 * using perfmon related ioctls. A perfmon can be attached to a submit_cl 65 * request, and when this is the case, HW perf counters will be activated just 66 * before the submit_cl is submitted to the GPU and disabled when the job is 67 * done. This way, only events related to a specific job will be counted. 68 */ 69 struct v3d_perfmon { 70 /* Tracks the number of users of the perfmon, when this counter reaches 71 * zero the perfmon is destroyed. 72 */ 73 refcount_t refcnt; 74 75 /* Protects perfmon stop, as it can be invoked from multiple places. */ 76 struct mutex lock; 77 78 /* Number of counters activated in this perfmon instance 79 * (should be less than DRM_V3D_MAX_PERF_COUNTERS). 80 */ 81 u8 ncounters; 82 83 /* Events counted by the HW perf counters. */ 84 u8 counters[DRM_V3D_MAX_PERF_COUNTERS]; 85 86 /* Storage for counter values. Counters are incremented by the 87 * HW perf counter values every time the perfmon is attached 88 * to a GPU job. This way, perfmon users don't have to 89 * retrieve the results after each job if they want to track 90 * events covering several submissions. Note that counter 91 * values can't be reset, but you can fake a reset by 92 * destroying the perfmon and creating a new one. 93 */ 94 u64 values[] __counted_by(ncounters); 95 }; 96 97 struct v3d_dev { 98 struct drm_device drm; 99 100 /* Short representation (e.g. 33, 41) of the V3D tech version */ 101 int ver; 102 103 /* Short representation (e.g. 5, 6) of the V3D tech revision */ 104 int rev; 105 106 bool single_irq_line; 107 108 struct v3d_perfmon_info perfmon_info; 109 110 void __iomem *hub_regs; 111 void __iomem *core_regs[3]; 112 void __iomem *bridge_regs; 113 void __iomem *gca_regs; 114 struct clk *clk; 115 struct reset_control *reset; 116 117 /* Virtual and DMA addresses of the single shared page table. */ 118 volatile u32 *pt; 119 dma_addr_t pt_paddr; 120 121 /* Virtual and DMA addresses of the MMU's scratch page. When 122 * a read or write is invalid in the MMU, it will be 123 * redirected here. 124 */ 125 void *mmu_scratch; 126 dma_addr_t mmu_scratch_paddr; 127 /* virtual address bits from V3D to the MMU. */ 128 int va_width; 129 130 /* Number of V3D cores. */ 131 u32 cores; 132 133 /* Allocator managing the address space. All units are in 134 * number of pages. 135 */ 136 struct drm_mm mm; 137 spinlock_t mm_lock; 138 139 /* 140 * tmpfs instance used for shmem backed objects 141 */ 142 struct vfsmount *gemfs; 143 144 struct work_struct overflow_mem_work; 145 146 struct v3d_bin_job *bin_job; 147 struct v3d_render_job *render_job; 148 struct v3d_tfu_job *tfu_job; 149 struct v3d_csd_job *csd_job; 150 struct v3d_cpu_job *cpu_job; 151 152 struct v3d_queue_state queue[V3D_MAX_QUEUES]; 153 154 /* Spinlock used to synchronize the overflow memory 155 * management against bin job submission. 156 */ 157 spinlock_t job_lock; 158 159 /* Used to track the active perfmon if any. */ 160 struct v3d_perfmon *active_perfmon; 161 162 /* Protects bo_stats */ 163 struct mutex bo_lock; 164 165 /* Lock taken when resetting the GPU, to keep multiple 166 * processes from trying to park the scheduler threads and 167 * reset at once. 168 */ 169 struct mutex reset_lock; 170 171 /* Lock taken when creating and pushing the GPU scheduler 172 * jobs, to keep the sched-fence seqnos in order. 173 */ 174 struct mutex sched_lock; 175 176 /* Lock taken during a cache clean and when initiating an L2 177 * flush, to keep L2 flushes from interfering with the 178 * synchronous L2 cleans. 179 */ 180 struct mutex cache_clean_lock; 181 182 struct { 183 u32 num_allocated; 184 u32 pages_allocated; 185 } bo_stats; 186 187 /* To support a performance analysis tool in user space, we require 188 * a single, globally configured performance monitor (perfmon) for 189 * all jobs. 190 */ 191 struct v3d_perfmon *global_perfmon; 192 }; 193 194 static inline struct v3d_dev * 195 to_v3d_dev(struct drm_device *dev) 196 { 197 return container_of(dev, struct v3d_dev, drm); 198 } 199 200 static inline bool 201 v3d_has_csd(struct v3d_dev *v3d) 202 { 203 return v3d->ver >= 41; 204 } 205 206 #define v3d_to_pdev(v3d) to_platform_device((v3d)->drm.dev) 207 208 /* The per-fd struct, which tracks the MMU mappings. */ 209 struct v3d_file_priv { 210 struct v3d_dev *v3d; 211 212 struct { 213 struct idr idr; 214 struct mutex lock; 215 } perfmon; 216 217 struct drm_sched_entity sched_entity[V3D_MAX_QUEUES]; 218 219 /* Stores the GPU stats for a specific queue for this fd. */ 220 struct v3d_stats stats[V3D_MAX_QUEUES]; 221 }; 222 223 struct v3d_bo { 224 struct drm_gem_shmem_object base; 225 226 struct drm_mm_node node; 227 228 /* List entry for the BO's position in 229 * v3d_render_job->unref_list 230 */ 231 struct list_head unref_head; 232 233 void *vaddr; 234 }; 235 236 static inline struct v3d_bo * 237 to_v3d_bo(struct drm_gem_object *bo) 238 { 239 return (struct v3d_bo *)bo; 240 } 241 242 struct v3d_fence { 243 struct dma_fence base; 244 struct drm_device *dev; 245 /* v3d seqno for signaled() test */ 246 u64 seqno; 247 enum v3d_queue queue; 248 }; 249 250 static inline struct v3d_fence * 251 to_v3d_fence(struct dma_fence *fence) 252 { 253 return (struct v3d_fence *)fence; 254 } 255 256 #define V3D_READ(offset) readl(v3d->hub_regs + offset) 257 #define V3D_WRITE(offset, val) writel(val, v3d->hub_regs + offset) 258 259 #define V3D_BRIDGE_READ(offset) readl(v3d->bridge_regs + offset) 260 #define V3D_BRIDGE_WRITE(offset, val) writel(val, v3d->bridge_regs + offset) 261 262 #define V3D_GCA_READ(offset) readl(v3d->gca_regs + offset) 263 #define V3D_GCA_WRITE(offset, val) writel(val, v3d->gca_regs + offset) 264 265 #define V3D_CORE_READ(core, offset) readl(v3d->core_regs[core] + offset) 266 #define V3D_CORE_WRITE(core, offset, val) writel(val, v3d->core_regs[core] + offset) 267 268 struct v3d_job { 269 struct drm_sched_job base; 270 271 struct kref refcount; 272 273 struct v3d_dev *v3d; 274 275 /* This is the array of BOs that were looked up at the start 276 * of submission. 277 */ 278 struct drm_gem_object **bo; 279 u32 bo_count; 280 281 /* v3d fence to be signaled by IRQ handler when the job is complete. */ 282 struct dma_fence *irq_fence; 283 284 /* scheduler fence for when the job is considered complete and 285 * the BO reservations can be released. 286 */ 287 struct dma_fence *done_fence; 288 289 /* Pointer to a performance monitor object if the user requested it, 290 * NULL otherwise. 291 */ 292 struct v3d_perfmon *perfmon; 293 294 /* File descriptor of the process that submitted the job that could be used 295 * for collecting stats by process of GPU usage. 296 */ 297 struct drm_file *file; 298 299 /* Callback for the freeing of the job on refcount going to 0. */ 300 void (*free)(struct kref *ref); 301 }; 302 303 struct v3d_bin_job { 304 struct v3d_job base; 305 306 /* GPU virtual addresses of the start/end of the CL job. */ 307 u32 start, end; 308 309 u32 timedout_ctca, timedout_ctra; 310 311 /* Corresponding render job, for attaching our overflow memory. */ 312 struct v3d_render_job *render; 313 314 /* Submitted tile memory allocation start/size, tile state. */ 315 u32 qma, qms, qts; 316 }; 317 318 struct v3d_render_job { 319 struct v3d_job base; 320 321 /* GPU virtual addresses of the start/end of the CL job. */ 322 u32 start, end; 323 324 u32 timedout_ctca, timedout_ctra; 325 326 /* List of overflow BOs used in the job that need to be 327 * released once the job is complete. 328 */ 329 struct list_head unref_list; 330 }; 331 332 struct v3d_tfu_job { 333 struct v3d_job base; 334 335 struct drm_v3d_submit_tfu args; 336 }; 337 338 struct v3d_csd_job { 339 struct v3d_job base; 340 341 u32 timedout_batches; 342 343 struct drm_v3d_submit_csd args; 344 }; 345 346 enum v3d_cpu_job_type { 347 V3D_CPU_JOB_TYPE_INDIRECT_CSD = 1, 348 V3D_CPU_JOB_TYPE_TIMESTAMP_QUERY, 349 V3D_CPU_JOB_TYPE_RESET_TIMESTAMP_QUERY, 350 V3D_CPU_JOB_TYPE_COPY_TIMESTAMP_QUERY, 351 V3D_CPU_JOB_TYPE_RESET_PERFORMANCE_QUERY, 352 V3D_CPU_JOB_TYPE_COPY_PERFORMANCE_QUERY, 353 }; 354 355 struct v3d_timestamp_query { 356 /* Offset of this query in the timestamp BO for its value. */ 357 u32 offset; 358 359 /* Syncobj that indicates the timestamp availability */ 360 struct drm_syncobj *syncobj; 361 }; 362 363 struct v3d_performance_query { 364 /* Performance monitor IDs for this query */ 365 u32 *kperfmon_ids; 366 367 /* Syncobj that indicates the query availability */ 368 struct drm_syncobj *syncobj; 369 }; 370 371 struct v3d_indirect_csd_info { 372 /* Indirect CSD */ 373 struct v3d_csd_job *job; 374 375 /* Clean cache job associated to the Indirect CSD job */ 376 struct v3d_job *clean_job; 377 378 /* Offset within the BO where the workgroup counts are stored */ 379 u32 offset; 380 381 /* Workgroups size */ 382 u32 wg_size; 383 384 /* Indices of the uniforms with the workgroup dispatch counts 385 * in the uniform stream. 386 */ 387 u32 wg_uniform_offsets[3]; 388 389 /* Indirect BO */ 390 struct drm_gem_object *indirect; 391 392 /* Context of the Indirect CSD job */ 393 struct ww_acquire_ctx acquire_ctx; 394 }; 395 396 struct v3d_timestamp_query_info { 397 struct v3d_timestamp_query *queries; 398 399 u32 count; 400 }; 401 402 struct v3d_performance_query_info { 403 struct v3d_performance_query *queries; 404 405 /* Number of performance queries */ 406 u32 count; 407 408 /* Number of performance monitors related to that query pool */ 409 u32 nperfmons; 410 411 /* Number of performance counters related to that query pool */ 412 u32 ncounters; 413 }; 414 415 struct v3d_copy_query_results_info { 416 /* Define if should write to buffer using 64 or 32 bits */ 417 bool do_64bit; 418 419 /* Define if it can write to buffer even if the query is not available */ 420 bool do_partial; 421 422 /* Define if it should write availability bit to buffer */ 423 bool availability_bit; 424 425 /* Offset of the copy buffer in the BO */ 426 u32 offset; 427 428 /* Stride of the copy buffer in the BO */ 429 u32 stride; 430 }; 431 432 struct v3d_cpu_job { 433 struct v3d_job base; 434 435 enum v3d_cpu_job_type job_type; 436 437 struct v3d_indirect_csd_info indirect_csd; 438 439 struct v3d_timestamp_query_info timestamp_query; 440 441 struct v3d_copy_query_results_info copy; 442 443 struct v3d_performance_query_info performance_query; 444 }; 445 446 typedef void (*v3d_cpu_job_fn)(struct v3d_cpu_job *); 447 448 struct v3d_submit_outsync { 449 struct drm_syncobj *syncobj; 450 }; 451 452 struct v3d_submit_ext { 453 u32 flags; 454 u32 wait_stage; 455 456 u32 in_sync_count; 457 u64 in_syncs; 458 459 u32 out_sync_count; 460 struct v3d_submit_outsync *out_syncs; 461 }; 462 463 /** 464 * __wait_for - magic wait macro 465 * 466 * Macro to help avoid open coding check/wait/timeout patterns. Note that it's 467 * important that we check the condition again after having timed out, since the 468 * timeout could be due to preemption or similar and we've never had a chance to 469 * check the condition before the timeout. 470 */ 471 #define __wait_for(OP, COND, US, Wmin, Wmax) ({ \ 472 const ktime_t end__ = ktime_add_ns(ktime_get_raw(), 1000ll * (US)); \ 473 long wait__ = (Wmin); /* recommended min for usleep is 10 us */ \ 474 int ret__; \ 475 might_sleep(); \ 476 for (;;) { \ 477 const bool expired__ = ktime_after(ktime_get_raw(), end__); \ 478 OP; \ 479 /* Guarantee COND check prior to timeout */ \ 480 barrier(); \ 481 if (COND) { \ 482 ret__ = 0; \ 483 break; \ 484 } \ 485 if (expired__) { \ 486 ret__ = -ETIMEDOUT; \ 487 break; \ 488 } \ 489 usleep_range(wait__, wait__ * 2); \ 490 if (wait__ < (Wmax)) \ 491 wait__ <<= 1; \ 492 } \ 493 ret__; \ 494 }) 495 496 #define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \ 497 (Wmax)) 498 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) 499 500 static inline unsigned long nsecs_to_jiffies_timeout(const u64 n) 501 { 502 /* nsecs_to_jiffies64() does not guard against overflow */ 503 if ((NSEC_PER_SEC % HZ) != 0 && 504 div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ) 505 return MAX_JIFFY_OFFSET; 506 507 return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1); 508 } 509 510 /* v3d_bo.c */ 511 struct drm_gem_object *v3d_create_object(struct drm_device *dev, size_t size); 512 void v3d_free_object(struct drm_gem_object *gem_obj); 513 struct v3d_bo *v3d_bo_create(struct drm_device *dev, struct drm_file *file_priv, 514 size_t size); 515 void v3d_get_bo_vaddr(struct v3d_bo *bo); 516 void v3d_put_bo_vaddr(struct v3d_bo *bo); 517 int v3d_create_bo_ioctl(struct drm_device *dev, void *data, 518 struct drm_file *file_priv); 519 int v3d_mmap_bo_ioctl(struct drm_device *dev, void *data, 520 struct drm_file *file_priv); 521 int v3d_get_bo_offset_ioctl(struct drm_device *dev, void *data, 522 struct drm_file *file_priv); 523 int v3d_wait_bo_ioctl(struct drm_device *dev, void *data, 524 struct drm_file *file_priv); 525 struct drm_gem_object *v3d_prime_import_sg_table(struct drm_device *dev, 526 struct dma_buf_attachment *attach, 527 struct sg_table *sgt); 528 529 /* v3d_debugfs.c */ 530 void v3d_debugfs_init(struct drm_minor *minor); 531 532 /* v3d_drv.c */ 533 void v3d_get_stats(const struct v3d_stats *stats, u64 timestamp, 534 u64 *active_runtime, u64 *jobs_completed); 535 536 /* v3d_fence.c */ 537 extern const struct dma_fence_ops v3d_fence_ops; 538 struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue queue); 539 540 /* v3d_gem.c */ 541 int v3d_gem_init(struct drm_device *dev); 542 void v3d_gem_destroy(struct drm_device *dev); 543 void v3d_reset(struct v3d_dev *v3d); 544 void v3d_invalidate_caches(struct v3d_dev *v3d); 545 void v3d_clean_caches(struct v3d_dev *v3d); 546 547 /* v3d_gemfs.c */ 548 extern bool super_pages; 549 void v3d_gemfs_init(struct v3d_dev *v3d); 550 void v3d_gemfs_fini(struct v3d_dev *v3d); 551 552 /* v3d_submit.c */ 553 void v3d_job_cleanup(struct v3d_job *job); 554 void v3d_job_put(struct v3d_job *job); 555 int v3d_submit_cl_ioctl(struct drm_device *dev, void *data, 556 struct drm_file *file_priv); 557 int v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, 558 struct drm_file *file_priv); 559 int v3d_submit_csd_ioctl(struct drm_device *dev, void *data, 560 struct drm_file *file_priv); 561 int v3d_submit_cpu_ioctl(struct drm_device *dev, void *data, 562 struct drm_file *file_priv); 563 564 /* v3d_irq.c */ 565 int v3d_irq_init(struct v3d_dev *v3d); 566 void v3d_irq_enable(struct v3d_dev *v3d); 567 void v3d_irq_disable(struct v3d_dev *v3d); 568 void v3d_irq_reset(struct v3d_dev *v3d); 569 570 /* v3d_mmu.c */ 571 int v3d_mmu_flush_all(struct v3d_dev *v3d); 572 int v3d_mmu_set_page_table(struct v3d_dev *v3d); 573 void v3d_mmu_insert_ptes(struct v3d_bo *bo); 574 void v3d_mmu_remove_ptes(struct v3d_bo *bo); 575 576 /* v3d_sched.c */ 577 void v3d_timestamp_query_info_free(struct v3d_timestamp_query_info *query_info, 578 unsigned int count); 579 void v3d_performance_query_info_free(struct v3d_performance_query_info *query_info, 580 unsigned int count); 581 void v3d_job_update_stats(struct v3d_job *job, enum v3d_queue queue); 582 int v3d_sched_init(struct v3d_dev *v3d); 583 void v3d_sched_fini(struct v3d_dev *v3d); 584 585 /* v3d_perfmon.c */ 586 void v3d_perfmon_init(struct v3d_dev *v3d); 587 void v3d_perfmon_get(struct v3d_perfmon *perfmon); 588 void v3d_perfmon_put(struct v3d_perfmon *perfmon); 589 void v3d_perfmon_start(struct v3d_dev *v3d, struct v3d_perfmon *perfmon); 590 void v3d_perfmon_stop(struct v3d_dev *v3d, struct v3d_perfmon *perfmon, 591 bool capture); 592 struct v3d_perfmon *v3d_perfmon_find(struct v3d_file_priv *v3d_priv, int id); 593 void v3d_perfmon_open_file(struct v3d_file_priv *v3d_priv); 594 void v3d_perfmon_close_file(struct v3d_file_priv *v3d_priv); 595 int v3d_perfmon_create_ioctl(struct drm_device *dev, void *data, 596 struct drm_file *file_priv); 597 int v3d_perfmon_destroy_ioctl(struct drm_device *dev, void *data, 598 struct drm_file *file_priv); 599 int v3d_perfmon_get_values_ioctl(struct drm_device *dev, void *data, 600 struct drm_file *file_priv); 601 int v3d_perfmon_get_counter_ioctl(struct drm_device *dev, void *data, 602 struct drm_file *file_priv); 603 int v3d_perfmon_set_global_ioctl(struct drm_device *dev, void *data, 604 struct drm_file *file_priv); 605 606 /* v3d_sysfs.c */ 607 int v3d_sysfs_init(struct device *dev); 608 void v3d_sysfs_destroy(struct device *dev); 609