1 // SPDX-License-Identifier: GPL-2.0+ 2 /* Copyright (C) 2015-2018 Broadcom */ 3 4 #include <linux/delay.h> 5 #include <linux/mutex.h> 6 #include <linux/spinlock_types.h> 7 #include <linux/workqueue.h> 8 9 #include <drm/drm_encoder.h> 10 #include <drm/drm_gem.h> 11 #include <drm/drm_gem_shmem_helper.h> 12 #include <drm/gpu_scheduler.h> 13 14 #include "v3d_performance_counters.h" 15 16 #include "uapi/drm/v3d_drm.h" 17 18 struct clk; 19 struct platform_device; 20 struct reset_control; 21 22 #define V3D_MMU_PAGE_SHIFT 12 23 #define V3D_PAGE_FACTOR (PAGE_SIZE >> V3D_MMU_PAGE_SHIFT) 24 25 #define V3D_MAX_QUEUES (V3D_CPU + 1) 26 27 static inline char *v3d_queue_to_string(enum v3d_queue queue) 28 { 29 switch (queue) { 30 case V3D_BIN: return "bin"; 31 case V3D_RENDER: return "render"; 32 case V3D_TFU: return "tfu"; 33 case V3D_CSD: return "csd"; 34 case V3D_CACHE_CLEAN: return "cache_clean"; 35 case V3D_CPU: return "cpu"; 36 } 37 return "UNKNOWN"; 38 } 39 40 struct v3d_stats { 41 u64 start_ns; 42 u64 enabled_ns; 43 u64 jobs_completed; 44 45 /* 46 * This seqcount is used to protect the access to the GPU stats 47 * variables. It must be used as, while we are reading the stats, 48 * IRQs can happen and the stats can be updated. 49 */ 50 seqcount_t lock; 51 }; 52 53 struct v3d_queue_state { 54 struct drm_gpu_scheduler sched; 55 56 u64 fence_context; 57 u64 emit_seqno; 58 59 /* Stores the GPU stats for this queue in the global context. */ 60 struct v3d_stats stats; 61 }; 62 63 /* Performance monitor object. The perform lifetime is controlled by userspace 64 * using perfmon related ioctls. A perfmon can be attached to a submit_cl 65 * request, and when this is the case, HW perf counters will be activated just 66 * before the submit_cl is submitted to the GPU and disabled when the job is 67 * done. This way, only events related to a specific job will be counted. 68 */ 69 struct v3d_perfmon { 70 /* Tracks the number of users of the perfmon, when this counter reaches 71 * zero the perfmon is destroyed. 72 */ 73 refcount_t refcnt; 74 75 /* Protects perfmon stop, as it can be invoked from multiple places. */ 76 struct mutex lock; 77 78 /* Number of counters activated in this perfmon instance 79 * (should be less than DRM_V3D_MAX_PERF_COUNTERS). 80 */ 81 u8 ncounters; 82 83 /* Events counted by the HW perf counters. */ 84 u8 counters[DRM_V3D_MAX_PERF_COUNTERS]; 85 86 /* Storage for counter values. Counters are incremented by the 87 * HW perf counter values every time the perfmon is attached 88 * to a GPU job. This way, perfmon users don't have to 89 * retrieve the results after each job if they want to track 90 * events covering several submissions. Note that counter 91 * values can't be reset, but you can fake a reset by 92 * destroying the perfmon and creating a new one. 93 */ 94 u64 values[] __counted_by(ncounters); 95 }; 96 97 enum v3d_gen { 98 V3D_GEN_33 = 33, 99 V3D_GEN_41 = 41, 100 V3D_GEN_42 = 42, 101 V3D_GEN_71 = 71, 102 }; 103 104 enum v3d_irq { 105 V3D_CORE_IRQ, 106 V3D_HUB_IRQ, 107 V3D_MAX_IRQS, 108 }; 109 110 struct v3d_dev { 111 struct drm_device drm; 112 113 /* Short representation (e.g. 33, 41) of the V3D tech version */ 114 enum v3d_gen ver; 115 116 /* Short representation (e.g. 5, 6) of the V3D tech revision */ 117 int rev; 118 119 bool single_irq_line; 120 121 int irq[V3D_MAX_IRQS]; 122 123 struct v3d_perfmon_info perfmon_info; 124 125 void __iomem *hub_regs; 126 void __iomem *core_regs[3]; 127 void __iomem *bridge_regs; 128 void __iomem *gca_regs; 129 void __iomem *sms_regs; 130 struct clk *clk; 131 struct reset_control *reset; 132 133 /* Virtual and DMA addresses of the single shared page table. */ 134 volatile u32 *pt; 135 dma_addr_t pt_paddr; 136 137 /* Virtual and DMA addresses of the MMU's scratch page. When 138 * a read or write is invalid in the MMU, it will be 139 * redirected here. 140 */ 141 void *mmu_scratch; 142 dma_addr_t mmu_scratch_paddr; 143 /* virtual address bits from V3D to the MMU. */ 144 int va_width; 145 146 /* Number of V3D cores. */ 147 u32 cores; 148 149 /* Allocator managing the address space. All units are in 150 * number of pages. 151 */ 152 struct drm_mm mm; 153 spinlock_t mm_lock; 154 155 /* 156 * tmpfs instance used for shmem backed objects 157 */ 158 struct vfsmount *gemfs; 159 160 struct work_struct overflow_mem_work; 161 162 struct v3d_bin_job *bin_job; 163 struct v3d_render_job *render_job; 164 struct v3d_tfu_job *tfu_job; 165 struct v3d_csd_job *csd_job; 166 167 struct v3d_queue_state queue[V3D_MAX_QUEUES]; 168 169 /* Spinlock used to synchronize the overflow memory 170 * management against bin job submission. 171 */ 172 spinlock_t job_lock; 173 174 /* Used to track the active perfmon if any. */ 175 struct v3d_perfmon *active_perfmon; 176 177 /* Protects bo_stats */ 178 struct mutex bo_lock; 179 180 /* Lock taken when resetting the GPU, to keep multiple 181 * processes from trying to park the scheduler threads and 182 * reset at once. 183 */ 184 struct mutex reset_lock; 185 186 /* Lock taken when creating and pushing the GPU scheduler 187 * jobs, to keep the sched-fence seqnos in order. 188 */ 189 struct mutex sched_lock; 190 191 /* Lock taken during a cache clean and when initiating an L2 192 * flush, to keep L2 flushes from interfering with the 193 * synchronous L2 cleans. 194 */ 195 struct mutex cache_clean_lock; 196 197 struct { 198 u32 num_allocated; 199 u32 pages_allocated; 200 } bo_stats; 201 202 /* To support a performance analysis tool in user space, we require 203 * a single, globally configured performance monitor (perfmon) for 204 * all jobs. 205 */ 206 struct v3d_perfmon *global_perfmon; 207 }; 208 209 static inline struct v3d_dev * 210 to_v3d_dev(struct drm_device *dev) 211 { 212 return container_of(dev, struct v3d_dev, drm); 213 } 214 215 static inline bool 216 v3d_has_csd(struct v3d_dev *v3d) 217 { 218 return v3d->ver >= V3D_GEN_41; 219 } 220 221 #define v3d_to_pdev(v3d) to_platform_device((v3d)->drm.dev) 222 223 /* The per-fd struct, which tracks the MMU mappings. */ 224 struct v3d_file_priv { 225 struct v3d_dev *v3d; 226 227 struct { 228 struct idr idr; 229 struct mutex lock; 230 } perfmon; 231 232 struct drm_sched_entity sched_entity[V3D_MAX_QUEUES]; 233 234 /* Stores the GPU stats for a specific queue for this fd. */ 235 struct v3d_stats stats[V3D_MAX_QUEUES]; 236 }; 237 238 struct v3d_bo { 239 struct drm_gem_shmem_object base; 240 241 struct drm_mm_node node; 242 243 /* List entry for the BO's position in 244 * v3d_render_job->unref_list 245 */ 246 struct list_head unref_head; 247 248 void *vaddr; 249 }; 250 251 static inline struct v3d_bo * 252 to_v3d_bo(struct drm_gem_object *bo) 253 { 254 return (struct v3d_bo *)bo; 255 } 256 257 struct v3d_fence { 258 struct dma_fence base; 259 struct drm_device *dev; 260 /* v3d seqno for signaled() test */ 261 u64 seqno; 262 enum v3d_queue queue; 263 }; 264 265 static inline struct v3d_fence * 266 to_v3d_fence(struct dma_fence *fence) 267 { 268 return (struct v3d_fence *)fence; 269 } 270 271 #define V3D_READ(offset) readl(v3d->hub_regs + offset) 272 #define V3D_WRITE(offset, val) writel(val, v3d->hub_regs + offset) 273 274 #define V3D_BRIDGE_READ(offset) readl(v3d->bridge_regs + offset) 275 #define V3D_BRIDGE_WRITE(offset, val) writel(val, v3d->bridge_regs + offset) 276 277 #define V3D_GCA_READ(offset) readl(v3d->gca_regs + offset) 278 #define V3D_GCA_WRITE(offset, val) writel(val, v3d->gca_regs + offset) 279 280 #define V3D_SMS_IDLE 0x0 281 #define V3D_SMS_ISOLATING_FOR_RESET 0xa 282 #define V3D_SMS_RESETTING 0xb 283 #define V3D_SMS_ISOLATING_FOR_POWER_OFF 0xc 284 #define V3D_SMS_POWER_OFF_STATE 0xd 285 286 #define V3D_SMS_READ(offset) readl(v3d->sms_regs + (offset)) 287 #define V3D_SMS_WRITE(offset, val) writel(val, v3d->sms_regs + (offset)) 288 289 #define V3D_CORE_READ(core, offset) readl(v3d->core_regs[core] + offset) 290 #define V3D_CORE_WRITE(core, offset, val) writel(val, v3d->core_regs[core] + offset) 291 292 struct v3d_job { 293 struct drm_sched_job base; 294 295 struct kref refcount; 296 297 struct v3d_dev *v3d; 298 299 /* This is the array of BOs that were looked up at the start 300 * of submission. 301 */ 302 struct drm_gem_object **bo; 303 u32 bo_count; 304 305 /* v3d fence to be signaled by IRQ handler when the job is complete. */ 306 struct dma_fence *irq_fence; 307 308 /* scheduler fence for when the job is considered complete and 309 * the BO reservations can be released. 310 */ 311 struct dma_fence *done_fence; 312 313 /* Pointer to a performance monitor object if the user requested it, 314 * NULL otherwise. 315 */ 316 struct v3d_perfmon *perfmon; 317 318 /* File descriptor of the process that submitted the job that could be used 319 * for collecting stats by process of GPU usage. 320 */ 321 struct drm_file *file; 322 323 /* Callback for the freeing of the job on refcount going to 0. */ 324 void (*free)(struct kref *ref); 325 }; 326 327 struct v3d_bin_job { 328 struct v3d_job base; 329 330 /* GPU virtual addresses of the start/end of the CL job. */ 331 u32 start, end; 332 333 u32 timedout_ctca, timedout_ctra; 334 335 /* Corresponding render job, for attaching our overflow memory. */ 336 struct v3d_render_job *render; 337 338 /* Submitted tile memory allocation start/size, tile state. */ 339 u32 qma, qms, qts; 340 }; 341 342 struct v3d_render_job { 343 struct v3d_job base; 344 345 /* GPU virtual addresses of the start/end of the CL job. */ 346 u32 start, end; 347 348 u32 timedout_ctca, timedout_ctra; 349 350 /* List of overflow BOs used in the job that need to be 351 * released once the job is complete. 352 */ 353 struct list_head unref_list; 354 }; 355 356 struct v3d_tfu_job { 357 struct v3d_job base; 358 359 struct drm_v3d_submit_tfu args; 360 }; 361 362 struct v3d_csd_job { 363 struct v3d_job base; 364 365 u32 timedout_batches; 366 367 struct drm_v3d_submit_csd args; 368 }; 369 370 enum v3d_cpu_job_type { 371 V3D_CPU_JOB_TYPE_INDIRECT_CSD = 1, 372 V3D_CPU_JOB_TYPE_TIMESTAMP_QUERY, 373 V3D_CPU_JOB_TYPE_RESET_TIMESTAMP_QUERY, 374 V3D_CPU_JOB_TYPE_COPY_TIMESTAMP_QUERY, 375 V3D_CPU_JOB_TYPE_RESET_PERFORMANCE_QUERY, 376 V3D_CPU_JOB_TYPE_COPY_PERFORMANCE_QUERY, 377 }; 378 379 struct v3d_timestamp_query { 380 /* Offset of this query in the timestamp BO for its value. */ 381 u32 offset; 382 383 /* Syncobj that indicates the timestamp availability */ 384 struct drm_syncobj *syncobj; 385 }; 386 387 struct v3d_performance_query { 388 /* Performance monitor IDs for this query */ 389 u32 *kperfmon_ids; 390 391 /* Syncobj that indicates the query availability */ 392 struct drm_syncobj *syncobj; 393 }; 394 395 struct v3d_indirect_csd_info { 396 /* Indirect CSD */ 397 struct v3d_csd_job *job; 398 399 /* Clean cache job associated to the Indirect CSD job */ 400 struct v3d_job *clean_job; 401 402 /* Offset within the BO where the workgroup counts are stored */ 403 u32 offset; 404 405 /* Workgroups size */ 406 u32 wg_size; 407 408 /* Indices of the uniforms with the workgroup dispatch counts 409 * in the uniform stream. 410 */ 411 u32 wg_uniform_offsets[3]; 412 413 /* Indirect BO */ 414 struct drm_gem_object *indirect; 415 416 /* Context of the Indirect CSD job */ 417 struct ww_acquire_ctx acquire_ctx; 418 }; 419 420 struct v3d_timestamp_query_info { 421 struct v3d_timestamp_query *queries; 422 423 u32 count; 424 }; 425 426 struct v3d_performance_query_info { 427 struct v3d_performance_query *queries; 428 429 /* Number of performance queries */ 430 u32 count; 431 432 /* Number of performance monitors related to that query pool */ 433 u32 nperfmons; 434 435 /* Number of performance counters related to that query pool */ 436 u32 ncounters; 437 }; 438 439 struct v3d_copy_query_results_info { 440 /* Define if should write to buffer using 64 or 32 bits */ 441 bool do_64bit; 442 443 /* Define if it can write to buffer even if the query is not available */ 444 bool do_partial; 445 446 /* Define if it should write availability bit to buffer */ 447 bool availability_bit; 448 449 /* Offset of the copy buffer in the BO */ 450 u32 offset; 451 452 /* Stride of the copy buffer in the BO */ 453 u32 stride; 454 }; 455 456 struct v3d_cpu_job { 457 struct v3d_job base; 458 459 enum v3d_cpu_job_type job_type; 460 461 struct v3d_indirect_csd_info indirect_csd; 462 463 struct v3d_timestamp_query_info timestamp_query; 464 465 struct v3d_copy_query_results_info copy; 466 467 struct v3d_performance_query_info performance_query; 468 }; 469 470 typedef void (*v3d_cpu_job_fn)(struct v3d_cpu_job *); 471 472 struct v3d_submit_outsync { 473 struct drm_syncobj *syncobj; 474 }; 475 476 struct v3d_submit_ext { 477 u32 flags; 478 u32 wait_stage; 479 480 u32 in_sync_count; 481 u64 in_syncs; 482 483 u32 out_sync_count; 484 struct v3d_submit_outsync *out_syncs; 485 }; 486 487 /** 488 * __wait_for - magic wait macro 489 * 490 * Macro to help avoid open coding check/wait/timeout patterns. Note that it's 491 * important that we check the condition again after having timed out, since the 492 * timeout could be due to preemption or similar and we've never had a chance to 493 * check the condition before the timeout. 494 */ 495 #define __wait_for(OP, COND, US, Wmin, Wmax) ({ \ 496 const ktime_t end__ = ktime_add_ns(ktime_get_raw(), 1000ll * (US)); \ 497 long wait__ = (Wmin); /* recommended min for usleep is 10 us */ \ 498 int ret__; \ 499 might_sleep(); \ 500 for (;;) { \ 501 const bool expired__ = ktime_after(ktime_get_raw(), end__); \ 502 OP; \ 503 /* Guarantee COND check prior to timeout */ \ 504 barrier(); \ 505 if (COND) { \ 506 ret__ = 0; \ 507 break; \ 508 } \ 509 if (expired__) { \ 510 ret__ = -ETIMEDOUT; \ 511 break; \ 512 } \ 513 usleep_range(wait__, wait__ * 2); \ 514 if (wait__ < (Wmax)) \ 515 wait__ <<= 1; \ 516 } \ 517 ret__; \ 518 }) 519 520 #define _wait_for(COND, US, Wmin, Wmax) __wait_for(, (COND), (US), (Wmin), \ 521 (Wmax)) 522 #define wait_for(COND, MS) _wait_for((COND), (MS) * 1000, 10, 1000) 523 524 static inline unsigned long nsecs_to_jiffies_timeout(const u64 n) 525 { 526 /* nsecs_to_jiffies64() does not guard against overflow */ 527 if ((NSEC_PER_SEC % HZ) != 0 && 528 div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ) 529 return MAX_JIFFY_OFFSET; 530 531 return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1); 532 } 533 534 /* v3d_bo.c */ 535 struct drm_gem_object *v3d_create_object(struct drm_device *dev, size_t size); 536 void v3d_free_object(struct drm_gem_object *gem_obj); 537 struct v3d_bo *v3d_bo_create(struct drm_device *dev, struct drm_file *file_priv, 538 size_t size); 539 void v3d_get_bo_vaddr(struct v3d_bo *bo); 540 void v3d_put_bo_vaddr(struct v3d_bo *bo); 541 int v3d_create_bo_ioctl(struct drm_device *dev, void *data, 542 struct drm_file *file_priv); 543 int v3d_mmap_bo_ioctl(struct drm_device *dev, void *data, 544 struct drm_file *file_priv); 545 int v3d_get_bo_offset_ioctl(struct drm_device *dev, void *data, 546 struct drm_file *file_priv); 547 int v3d_wait_bo_ioctl(struct drm_device *dev, void *data, 548 struct drm_file *file_priv); 549 struct drm_gem_object *v3d_prime_import_sg_table(struct drm_device *dev, 550 struct dma_buf_attachment *attach, 551 struct sg_table *sgt); 552 553 /* v3d_debugfs.c */ 554 void v3d_debugfs_init(struct drm_minor *minor); 555 556 /* v3d_drv.c */ 557 void v3d_get_stats(const struct v3d_stats *stats, u64 timestamp, 558 u64 *active_runtime, u64 *jobs_completed); 559 560 /* v3d_fence.c */ 561 extern const struct dma_fence_ops v3d_fence_ops; 562 struct dma_fence *v3d_fence_create(struct v3d_dev *v3d, enum v3d_queue queue); 563 564 /* v3d_gem.c */ 565 int v3d_gem_init(struct drm_device *dev); 566 void v3d_gem_destroy(struct drm_device *dev); 567 void v3d_reset_sms(struct v3d_dev *v3d); 568 void v3d_reset(struct v3d_dev *v3d); 569 void v3d_invalidate_caches(struct v3d_dev *v3d); 570 void v3d_clean_caches(struct v3d_dev *v3d); 571 572 /* v3d_gemfs.c */ 573 extern bool super_pages; 574 void v3d_gemfs_init(struct v3d_dev *v3d); 575 void v3d_gemfs_fini(struct v3d_dev *v3d); 576 577 /* v3d_submit.c */ 578 void v3d_job_cleanup(struct v3d_job *job); 579 void v3d_job_put(struct v3d_job *job); 580 int v3d_submit_cl_ioctl(struct drm_device *dev, void *data, 581 struct drm_file *file_priv); 582 int v3d_submit_tfu_ioctl(struct drm_device *dev, void *data, 583 struct drm_file *file_priv); 584 int v3d_submit_csd_ioctl(struct drm_device *dev, void *data, 585 struct drm_file *file_priv); 586 int v3d_submit_cpu_ioctl(struct drm_device *dev, void *data, 587 struct drm_file *file_priv); 588 589 /* v3d_irq.c */ 590 int v3d_irq_init(struct v3d_dev *v3d); 591 void v3d_irq_enable(struct v3d_dev *v3d); 592 void v3d_irq_disable(struct v3d_dev *v3d); 593 void v3d_irq_reset(struct v3d_dev *v3d); 594 595 /* v3d_mmu.c */ 596 int v3d_mmu_flush_all(struct v3d_dev *v3d); 597 int v3d_mmu_set_page_table(struct v3d_dev *v3d); 598 void v3d_mmu_insert_ptes(struct v3d_bo *bo); 599 void v3d_mmu_remove_ptes(struct v3d_bo *bo); 600 601 /* v3d_sched.c */ 602 void v3d_timestamp_query_info_free(struct v3d_timestamp_query_info *query_info, 603 unsigned int count); 604 void v3d_performance_query_info_free(struct v3d_performance_query_info *query_info, 605 unsigned int count); 606 void v3d_job_update_stats(struct v3d_job *job, enum v3d_queue queue); 607 int v3d_sched_init(struct v3d_dev *v3d); 608 void v3d_sched_fini(struct v3d_dev *v3d); 609 610 /* v3d_perfmon.c */ 611 void v3d_perfmon_init(struct v3d_dev *v3d); 612 void v3d_perfmon_get(struct v3d_perfmon *perfmon); 613 void v3d_perfmon_put(struct v3d_perfmon *perfmon); 614 void v3d_perfmon_start(struct v3d_dev *v3d, struct v3d_perfmon *perfmon); 615 void v3d_perfmon_stop(struct v3d_dev *v3d, struct v3d_perfmon *perfmon, 616 bool capture); 617 struct v3d_perfmon *v3d_perfmon_find(struct v3d_file_priv *v3d_priv, int id); 618 void v3d_perfmon_open_file(struct v3d_file_priv *v3d_priv); 619 void v3d_perfmon_close_file(struct v3d_file_priv *v3d_priv); 620 int v3d_perfmon_create_ioctl(struct drm_device *dev, void *data, 621 struct drm_file *file_priv); 622 int v3d_perfmon_destroy_ioctl(struct drm_device *dev, void *data, 623 struct drm_file *file_priv); 624 int v3d_perfmon_get_values_ioctl(struct drm_device *dev, void *data, 625 struct drm_file *file_priv); 626 int v3d_perfmon_get_counter_ioctl(struct drm_device *dev, void *data, 627 struct drm_file *file_priv); 628 int v3d_perfmon_set_global_ioctl(struct drm_device *dev, void *data, 629 struct drm_file *file_priv); 630 631 /* v3d_sysfs.c */ 632 int v3d_sysfs_init(struct device *dev); 633 void v3d_sysfs_destroy(struct device *dev); 634