1d53adc24STvrtko Ursulin /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2d53adc24STvrtko Ursulin /* Copyright (c) 2025 Valve Corporation */ 3d53adc24STvrtko Ursulin 4d53adc24STvrtko Ursulin #ifndef _TTM_POOL_INTERNAL_H_ 5d53adc24STvrtko Ursulin #define _TTM_POOL_INTERNAL_H_ 6d53adc24STvrtko Ursulin 7*0af5b6a8STvrtko Ursulin #include <drm/ttm/ttm_allocation.h> 8d53adc24STvrtko Ursulin #include <drm/ttm/ttm_pool.h> 9d53adc24STvrtko Ursulin 10d53adc24STvrtko Ursulin static inline bool ttm_pool_uses_dma_alloc(struct ttm_pool *pool) 11d53adc24STvrtko Ursulin { 12*0af5b6a8STvrtko Ursulin return pool->alloc_flags & TTM_ALLOCATION_POOL_USE_DMA_ALLOC; 13d53adc24STvrtko Ursulin } 14d53adc24STvrtko Ursulin 15d53adc24STvrtko Ursulin static inline bool ttm_pool_uses_dma32(struct ttm_pool *pool) 16d53adc24STvrtko Ursulin { 17*0af5b6a8STvrtko Ursulin return pool->alloc_flags & TTM_ALLOCATION_POOL_USE_DMA32; 18d53adc24STvrtko Ursulin } 19d53adc24STvrtko Ursulin 20d53adc24STvrtko Ursulin #endif 21