1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * DRM driver for Multi-Inno MI0283QT panels 4 * 5 * Copyright 2016 Noralf Trønnes 6 */ 7 8 #include <linux/backlight.h> 9 #include <linux/delay.h> 10 #include <linux/gpio/consumer.h> 11 #include <linux/module.h> 12 #include <linux/property.h> 13 #include <linux/regulator/consumer.h> 14 #include <linux/spi/spi.h> 15 16 #include <drm/clients/drm_client_setup.h> 17 #include <drm/drm_atomic_helper.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fbdev_dma.h> 20 #include <drm/drm_gem_atomic_helper.h> 21 #include <drm/drm_gem_dma_helper.h> 22 #include <drm/drm_managed.h> 23 #include <drm/drm_mipi_dbi.h> 24 #include <drm/drm_modeset_helper.h> 25 #include <drm/drm_print.h> 26 #include <video/mipi_display.h> 27 28 #define ILI9341_FRMCTR1 0xb1 29 #define ILI9341_DISCTRL 0xb6 30 #define ILI9341_ETMOD 0xb7 31 32 #define ILI9341_PWCTRL1 0xc0 33 #define ILI9341_PWCTRL2 0xc1 34 #define ILI9341_VMCTRL1 0xc5 35 #define ILI9341_VMCTRL2 0xc7 36 #define ILI9341_PWCTRLA 0xcb 37 #define ILI9341_PWCTRLB 0xcf 38 39 #define ILI9341_PGAMCTRL 0xe0 40 #define ILI9341_NGAMCTRL 0xe1 41 #define ILI9341_DTCTRLA 0xe8 42 #define ILI9341_DTCTRLB 0xea 43 #define ILI9341_PWRSEQ 0xed 44 45 #define ILI9341_EN3GAM 0xf2 46 #define ILI9341_PUMPCTRL 0xf7 47 48 #define ILI9341_MADCTL_BGR BIT(3) 49 #define ILI9341_MADCTL_MV BIT(5) 50 #define ILI9341_MADCTL_MX BIT(6) 51 #define ILI9341_MADCTL_MY BIT(7) 52 53 struct mi0283qt_device { 54 struct mipi_dbi_dev dbidev; 55 56 struct drm_plane plane; 57 struct drm_crtc crtc; 58 struct drm_encoder encoder; 59 struct drm_connector connector; 60 }; 61 62 static struct mi0283qt_device *to_mi0283qt_device(struct drm_device *dev) 63 { 64 return container_of(drm_to_mipi_dbi_dev(dev), struct mi0283qt_device, dbidev); 65 } 66 67 static const u32 mi0283qt_plane_formats[] = { 68 DRM_MIPI_DBI_PLANE_FORMATS, 69 }; 70 71 static const u64 mi0283qt_plane_format_modifiers[] = { 72 DRM_MIPI_DBI_PLANE_FORMAT_MODIFIERS, 73 }; 74 75 static const struct drm_plane_helper_funcs mi0283qt_plane_helper_funcs = { 76 DRM_MIPI_DBI_PLANE_HELPER_FUNCS, 77 }; 78 79 static const struct drm_plane_funcs mi0283qt_plane_funcs = { 80 DRM_MIPI_DBI_PLANE_FUNCS, 81 .destroy = drm_plane_cleanup, 82 }; 83 84 static void mi0283qt_crtc_helper_atomic_enable(struct drm_crtc *crtc, 85 struct drm_atomic_state *state) 86 { 87 struct drm_device *drm = crtc->dev; 88 struct mi0283qt_device *mi0283qt = to_mi0283qt_device(drm); 89 struct mipi_dbi_dev *dbidev = &mi0283qt->dbidev; 90 struct mipi_dbi *dbi = &dbidev->dbi; 91 u8 addr_mode; 92 int ret, idx; 93 94 if (!drm_dev_enter(drm, &idx)) 95 return; 96 97 DRM_DEBUG_KMS("\n"); 98 99 ret = mipi_dbi_poweron_conditional_reset(dbidev); 100 if (ret < 0) 101 goto out_exit; 102 if (ret == 1) 103 goto out_enable; 104 105 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF); 106 107 mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30); 108 mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81); 109 mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79); 110 mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02); 111 mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20); 112 mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00); 113 114 /* Power Control */ 115 mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26); 116 mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11); 117 /* VCOM */ 118 mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x35, 0x3e); 119 mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0xbe); 120 121 /* Memory Access Control */ 122 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT); 123 124 /* Frame Rate */ 125 mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b); 126 127 /* Gamma */ 128 mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x08); 129 mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01); 130 mipi_dbi_command(dbi, ILI9341_PGAMCTRL, 131 0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87, 132 0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00); 133 mipi_dbi_command(dbi, ILI9341_NGAMCTRL, 134 0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78, 135 0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f); 136 137 /* DDRAM */ 138 mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07); 139 140 /* Display */ 141 mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00); 142 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); 143 msleep(100); 144 145 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON); 146 msleep(100); 147 148 out_enable: 149 /* The PiTFT (ili9340) has a hardware reset circuit that 150 * resets only on power-on and not on each reboot through 151 * a gpio like the rpi-display does. 152 * As a result, we need to always apply the rotation value 153 * regardless of the display "on/off" state. 154 */ 155 switch (dbidev->rotation) { 156 default: 157 addr_mode = ILI9341_MADCTL_MV | ILI9341_MADCTL_MY | 158 ILI9341_MADCTL_MX; 159 break; 160 case 90: 161 addr_mode = ILI9341_MADCTL_MY; 162 break; 163 case 180: 164 addr_mode = ILI9341_MADCTL_MV; 165 break; 166 case 270: 167 addr_mode = ILI9341_MADCTL_MX; 168 break; 169 } 170 addr_mode |= ILI9341_MADCTL_BGR; 171 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode); 172 173 backlight_enable(dbidev->backlight); 174 out_exit: 175 drm_dev_exit(idx); 176 } 177 178 static const struct drm_crtc_helper_funcs mi0283qt_crtc_helper_funcs = { 179 DRM_MIPI_DBI_CRTC_HELPER_FUNCS, 180 .atomic_enable = mi0283qt_crtc_helper_atomic_enable, 181 }; 182 183 static const struct drm_crtc_funcs mi0283qt_crtc_funcs = { 184 DRM_MIPI_DBI_CRTC_FUNCS, 185 .destroy = drm_crtc_cleanup, 186 }; 187 188 static const struct drm_encoder_funcs mi0283qt_encoder_funcs = { 189 .destroy = drm_encoder_cleanup, 190 }; 191 192 static const struct drm_connector_helper_funcs mi0283qt_connector_helper_funcs = { 193 DRM_MIPI_DBI_CONNECTOR_HELPER_FUNCS, 194 }; 195 196 static const struct drm_connector_funcs mi0283qt_connector_funcs = { 197 DRM_MIPI_DBI_CONNECTOR_FUNCS, 198 .destroy = drm_connector_cleanup, 199 }; 200 201 static const struct drm_mode_config_helper_funcs mi0283qt_mode_config_helper_funcs = { 202 DRM_MIPI_DBI_MODE_CONFIG_HELPER_FUNCS, 203 }; 204 205 static const struct drm_mode_config_funcs mi0283qt_mode_config_funcs = { 206 DRM_MIPI_DBI_MODE_CONFIG_FUNCS, 207 }; 208 209 static const struct drm_display_mode mi0283qt_mode = { 210 DRM_SIMPLE_MODE(320, 240, 58, 43), 211 }; 212 213 DEFINE_DRM_GEM_DMA_FOPS(mi0283qt_fops); 214 215 static const struct drm_driver mi0283qt_driver = { 216 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 217 .fops = &mi0283qt_fops, 218 DRM_GEM_DMA_DRIVER_OPS_VMAP, 219 DRM_FBDEV_DMA_DRIVER_OPS, 220 .debugfs_init = mipi_dbi_debugfs_init, 221 .name = "mi0283qt", 222 .desc = "Multi-Inno MI0283QT", 223 .major = 1, 224 .minor = 0, 225 }; 226 227 static const struct of_device_id mi0283qt_of_match[] = { 228 { .compatible = "multi-inno,mi0283qt" }, 229 {}, 230 }; 231 MODULE_DEVICE_TABLE(of, mi0283qt_of_match); 232 233 static const struct spi_device_id mi0283qt_id[] = { 234 { "mi0283qt", 0 }, 235 { }, 236 }; 237 MODULE_DEVICE_TABLE(spi, mi0283qt_id); 238 239 static int mi0283qt_probe(struct spi_device *spi) 240 { 241 struct device *dev = &spi->dev; 242 struct mi0283qt_device *mi0283qt; 243 struct mipi_dbi_dev *dbidev; 244 struct drm_device *drm; 245 struct mipi_dbi *dbi; 246 struct gpio_desc *dc; 247 struct drm_plane *plane; 248 struct drm_crtc *crtc; 249 struct drm_encoder *encoder; 250 struct drm_connector *connector; 251 u32 rotation = 0; 252 int ret; 253 254 mi0283qt = devm_drm_dev_alloc(dev, &mi0283qt_driver, struct mi0283qt_device, dbidev.drm); 255 if (IS_ERR(mi0283qt)) 256 return PTR_ERR(mi0283qt); 257 dbidev = &mi0283qt->dbidev; 258 dbi = &dbidev->dbi; 259 drm = &dbidev->drm; 260 261 dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); 262 if (IS_ERR(dbi->reset)) 263 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n"); 264 265 dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW); 266 if (IS_ERR(dc)) 267 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n"); 268 269 dbidev->regulator = devm_regulator_get(dev, "power"); 270 if (IS_ERR(dbidev->regulator)) 271 return PTR_ERR(dbidev->regulator); 272 273 dbidev->backlight = devm_of_find_backlight(dev); 274 if (IS_ERR(dbidev->backlight)) 275 return PTR_ERR(dbidev->backlight); 276 277 device_property_read_u32(dev, "rotation", &rotation); 278 279 ret = mipi_dbi_spi_init(spi, dbi, dc); 280 if (ret) 281 return ret; 282 283 ret = drm_mipi_dbi_dev_init(dbidev, &mi0283qt_mode, mi0283qt_plane_formats[0], 284 rotation, 0); 285 if (ret) 286 return ret; 287 288 ret = drmm_mode_config_init(drm); 289 if (ret) 290 return ret; 291 292 drm->mode_config.min_width = dbidev->mode.hdisplay; 293 drm->mode_config.max_width = dbidev->mode.hdisplay; 294 drm->mode_config.min_height = dbidev->mode.vdisplay; 295 drm->mode_config.max_height = dbidev->mode.vdisplay; 296 drm->mode_config.funcs = &mi0283qt_mode_config_funcs; 297 drm->mode_config.preferred_depth = 16; 298 drm->mode_config.helper_private = &mi0283qt_mode_config_helper_funcs; 299 300 plane = &mi0283qt->plane; 301 ret = drm_universal_plane_init(drm, plane, 0, &mi0283qt_plane_funcs, 302 mi0283qt_plane_formats, ARRAY_SIZE(mi0283qt_plane_formats), 303 mi0283qt_plane_format_modifiers, 304 DRM_PLANE_TYPE_PRIMARY, NULL); 305 if (ret) 306 return ret; 307 drm_plane_helper_add(plane, &mi0283qt_plane_helper_funcs); 308 drm_plane_enable_fb_damage_clips(plane); 309 310 crtc = &mi0283qt->crtc; 311 ret = drm_crtc_init_with_planes(drm, crtc, plane, NULL, &mi0283qt_crtc_funcs, NULL); 312 if (ret) 313 return ret; 314 drm_crtc_helper_add(crtc, &mi0283qt_crtc_helper_funcs); 315 316 encoder = &mi0283qt->encoder; 317 ret = drm_encoder_init(drm, encoder, &mi0283qt_encoder_funcs, DRM_MODE_ENCODER_NONE, NULL); 318 if (ret) 319 return ret; 320 encoder->possible_crtcs = drm_crtc_mask(crtc); 321 322 connector = &mi0283qt->connector; 323 ret = drm_connector_init(drm, connector, &mi0283qt_connector_funcs, 324 DRM_MODE_CONNECTOR_SPI); 325 if (ret) 326 return ret; 327 drm_connector_helper_add(connector, &mi0283qt_connector_helper_funcs); 328 329 ret = drm_connector_attach_encoder(connector, encoder); 330 if (ret) 331 return ret; 332 333 drm_mode_config_reset(drm); 334 335 ret = drm_dev_register(drm, 0); 336 if (ret) 337 return ret; 338 339 spi_set_drvdata(spi, drm); 340 341 drm_client_setup(drm, NULL); 342 343 return 0; 344 } 345 346 static void mi0283qt_remove(struct spi_device *spi) 347 { 348 struct drm_device *drm = spi_get_drvdata(spi); 349 350 drm_dev_unplug(drm); 351 drm_atomic_helper_shutdown(drm); 352 } 353 354 static void mi0283qt_shutdown(struct spi_device *spi) 355 { 356 drm_atomic_helper_shutdown(spi_get_drvdata(spi)); 357 } 358 359 static int __maybe_unused mi0283qt_pm_suspend(struct device *dev) 360 { 361 return drm_mode_config_helper_suspend(dev_get_drvdata(dev)); 362 } 363 364 static int __maybe_unused mi0283qt_pm_resume(struct device *dev) 365 { 366 drm_mode_config_helper_resume(dev_get_drvdata(dev)); 367 368 return 0; 369 } 370 371 static const struct dev_pm_ops mi0283qt_pm_ops = { 372 SET_SYSTEM_SLEEP_PM_OPS(mi0283qt_pm_suspend, mi0283qt_pm_resume) 373 }; 374 375 static struct spi_driver mi0283qt_spi_driver = { 376 .driver = { 377 .name = "mi0283qt", 378 .of_match_table = mi0283qt_of_match, 379 .pm = &mi0283qt_pm_ops, 380 }, 381 .id_table = mi0283qt_id, 382 .probe = mi0283qt_probe, 383 .remove = mi0283qt_remove, 384 .shutdown = mi0283qt_shutdown, 385 }; 386 module_spi_driver(mi0283qt_spi_driver); 387 388 MODULE_DESCRIPTION("Multi-Inno MI0283QT DRM driver"); 389 MODULE_AUTHOR("Noralf Trønnes"); 390 MODULE_LICENSE("GPL"); 391