xref: /linux/drivers/gpu/drm/tiny/ili9486.c (revision afca12e35e711ae8f97e835a3704cc305592eac9)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * DRM driver for Ilitek ILI9486 panels
4  *
5  * Copyright 2020 Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>
6  */
7 
8 #include <linux/backlight.h>
9 #include <linux/delay.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/module.h>
12 #include <linux/property.h>
13 #include <linux/spi/spi.h>
14 
15 #include <video/mipi_display.h>
16 
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_drv.h>
19 #include <drm/drm_fbdev_generic.h>
20 #include <drm/drm_gem_atomic_helper.h>
21 #include <drm/drm_gem_dma_helper.h>
22 #include <drm/drm_managed.h>
23 #include <drm/drm_mipi_dbi.h>
24 #include <drm/drm_modeset_helper.h>
25 
26 #define ILI9486_ITFCTR1         0xb0
27 #define ILI9486_PWCTRL1         0xc2
28 #define ILI9486_VMCTRL1         0xc5
29 #define ILI9486_PGAMCTRL        0xe0
30 #define ILI9486_NGAMCTRL        0xe1
31 #define ILI9486_DGAMCTRL        0xe2
32 #define ILI9486_MADCTL_BGR      BIT(3)
33 #define ILI9486_MADCTL_MV       BIT(5)
34 #define ILI9486_MADCTL_MX       BIT(6)
35 #define ILI9486_MADCTL_MY       BIT(7)
36 
37 /*
38  * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
39  * in front of the  display controller. This means that 8-bit values have to be
40  * transferred as 16-bit.
41  */
42 static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par,
43 			     size_t num)
44 {
45 	struct spi_device *spi = mipi->spi;
46 	unsigned int bpw = 8;
47 	void *data = par;
48 	u32 speed_hz;
49 	int i, ret;
50 	__be16 *buf;
51 
52 	buf = kmalloc(32 * sizeof(u16), GFP_KERNEL);
53 	if (!buf)
54 		return -ENOMEM;
55 
56 	/*
57 	 * The displays are Raspberry Pi HATs and connected to the 8-bit only
58 	 * SPI controller, so 16-bit command and parameters need byte swapping
59 	 * before being transferred as 8-bit on the big endian SPI bus.
60 	 */
61 	buf[0] = cpu_to_be16(*cmd);
62 	spi_bus_lock(spi->controller);
63 	gpiod_set_value_cansleep(mipi->dc, 0);
64 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2);
65 	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2);
66 	spi_bus_unlock(spi->controller);
67 	if (ret || !num)
68 		goto free;
69 
70 	/* 8-bit configuration data, not 16-bit pixel data */
71 	if (num <= 32) {
72 		for (i = 0; i < num; i++)
73 			buf[i] = cpu_to_be16(par[i]);
74 		num *= 2;
75 		data = buf;
76 	}
77 
78 	/*
79 	 * Check whether pixel data bytes needs to be swapped or not
80 	 */
81 	if (*cmd == MIPI_DCS_WRITE_MEMORY_START && !mipi->swap_bytes)
82 		bpw = 16;
83 
84 	spi_bus_lock(spi->controller);
85 	gpiod_set_value_cansleep(mipi->dc, 1);
86 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
87 	ret = mipi_dbi_spi_transfer(spi, speed_hz, bpw, data, num);
88 	spi_bus_unlock(spi->controller);
89  free:
90 	kfree(buf);
91 
92 	return ret;
93 }
94 
95 static void waveshare_enable(struct drm_simple_display_pipe *pipe,
96 			     struct drm_crtc_state *crtc_state,
97 			     struct drm_plane_state *plane_state)
98 {
99 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
100 	struct mipi_dbi *dbi = &dbidev->dbi;
101 	u8 addr_mode;
102 	int ret, idx;
103 
104 	if (!drm_dev_enter(pipe->crtc.dev, &idx))
105 		return;
106 
107 	DRM_DEBUG_KMS("\n");
108 
109 	ret = mipi_dbi_poweron_conditional_reset(dbidev);
110 	if (ret < 0)
111 		goto out_exit;
112 	if (ret == 1)
113 		goto out_enable;
114 
115 	mipi_dbi_command(dbi, ILI9486_ITFCTR1);
116 	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
117 	msleep(250);
118 
119 	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
120 
121 	mipi_dbi_command(dbi, ILI9486_PWCTRL1, 0x44);
122 
123 	mipi_dbi_command(dbi, ILI9486_VMCTRL1, 0x00, 0x00, 0x00, 0x00);
124 
125 	mipi_dbi_command(dbi, ILI9486_PGAMCTRL,
126 			 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
127 			 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x0);
128 	mipi_dbi_command(dbi, ILI9486_NGAMCTRL,
129 			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
130 			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
131 	mipi_dbi_command(dbi, ILI9486_DGAMCTRL,
132 			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
133 			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
134 
135 	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
136 	msleep(100);
137 
138  out_enable:
139 	switch (dbidev->rotation) {
140 	case 90:
141 		addr_mode = ILI9486_MADCTL_MY;
142 		break;
143 	case 180:
144 		addr_mode = ILI9486_MADCTL_MV;
145 		break;
146 	case 270:
147 		addr_mode = ILI9486_MADCTL_MX;
148 		break;
149 	default:
150 		addr_mode = ILI9486_MADCTL_MV | ILI9486_MADCTL_MY |
151 			ILI9486_MADCTL_MX;
152 		break;
153 	}
154 	addr_mode |= ILI9486_MADCTL_BGR;
155 	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
156 	mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
157  out_exit:
158 	drm_dev_exit(idx);
159 }
160 
161 static const struct drm_simple_display_pipe_funcs waveshare_pipe_funcs = {
162 	DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(waveshare_enable),
163 };
164 
165 static const struct drm_display_mode waveshare_mode = {
166 	DRM_SIMPLE_MODE(480, 320, 73, 49),
167 };
168 
169 DEFINE_DRM_GEM_DMA_FOPS(ili9486_fops);
170 
171 static const struct drm_driver ili9486_driver = {
172 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
173 	.fops			= &ili9486_fops,
174 	DRM_GEM_DMA_DRIVER_OPS_VMAP,
175 	.debugfs_init		= mipi_dbi_debugfs_init,
176 	.name			= "ili9486",
177 	.desc			= "Ilitek ILI9486",
178 	.date			= "20200118",
179 	.major			= 1,
180 	.minor			= 0,
181 };
182 
183 static const struct of_device_id ili9486_of_match[] = {
184 	{ .compatible = "waveshare,rpi-lcd-35" },
185 	{ .compatible = "ozzmaker,piscreen" },
186 	{},
187 };
188 MODULE_DEVICE_TABLE(of, ili9486_of_match);
189 
190 static const struct spi_device_id ili9486_id[] = {
191 	{ "ili9486", 0 },
192 	{ "rpi-lcd-35", 0 },
193 	{ "piscreen", 0 },
194 	{ }
195 };
196 MODULE_DEVICE_TABLE(spi, ili9486_id);
197 
198 static int ili9486_probe(struct spi_device *spi)
199 {
200 	struct device *dev = &spi->dev;
201 	struct mipi_dbi_dev *dbidev;
202 	struct drm_device *drm;
203 	struct mipi_dbi *dbi;
204 	struct gpio_desc *dc;
205 	u32 rotation = 0;
206 	int ret;
207 
208 	dbidev = devm_drm_dev_alloc(dev, &ili9486_driver,
209 				    struct mipi_dbi_dev, drm);
210 	if (IS_ERR(dbidev))
211 		return PTR_ERR(dbidev);
212 
213 	dbi = &dbidev->dbi;
214 	drm = &dbidev->drm;
215 
216 	dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
217 	if (IS_ERR(dbi->reset))
218 		return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
219 
220 	dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
221 	if (IS_ERR(dc))
222 		return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
223 
224 	dbidev->backlight = devm_of_find_backlight(dev);
225 	if (IS_ERR(dbidev->backlight))
226 		return PTR_ERR(dbidev->backlight);
227 
228 	device_property_read_u32(dev, "rotation", &rotation);
229 
230 	ret = mipi_dbi_spi_init(spi, dbi, dc);
231 	if (ret)
232 		return ret;
233 
234 	dbi->command = waveshare_command;
235 	dbi->read_commands = NULL;
236 
237 	ret = mipi_dbi_dev_init(dbidev, &waveshare_pipe_funcs,
238 				&waveshare_mode, rotation);
239 	if (ret)
240 		return ret;
241 
242 	drm_mode_config_reset(drm);
243 
244 	ret = drm_dev_register(drm, 0);
245 	if (ret)
246 		return ret;
247 
248 	spi_set_drvdata(spi, drm);
249 
250 	drm_fbdev_generic_setup(drm, 0);
251 
252 	return 0;
253 }
254 
255 static void ili9486_remove(struct spi_device *spi)
256 {
257 	struct drm_device *drm = spi_get_drvdata(spi);
258 
259 	drm_dev_unplug(drm);
260 	drm_atomic_helper_shutdown(drm);
261 }
262 
263 static void ili9486_shutdown(struct spi_device *spi)
264 {
265 	drm_atomic_helper_shutdown(spi_get_drvdata(spi));
266 }
267 
268 static struct spi_driver ili9486_spi_driver = {
269 	.driver = {
270 		.name = "ili9486",
271 		.of_match_table = ili9486_of_match,
272 	},
273 	.id_table = ili9486_id,
274 	.probe = ili9486_probe,
275 	.remove = ili9486_remove,
276 	.shutdown = ili9486_shutdown,
277 };
278 module_spi_driver(ili9486_spi_driver);
279 
280 MODULE_DESCRIPTION("Ilitek ILI9486 DRM driver");
281 MODULE_AUTHOR("Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>");
282 MODULE_LICENSE("GPL");
283