xref: /linux/drivers/gpu/drm/tiny/ili9486.c (revision 2306f5d042e479806c3dae3044b3ebbc475118de)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * DRM driver for Ilitek ILI9486 panels
4  *
5  * Copyright 2020 Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>
6  */
7 
8 #include <linux/backlight.h>
9 #include <linux/delay.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/module.h>
12 #include <linux/property.h>
13 #include <linux/spi/spi.h>
14 
15 #include <video/mipi_display.h>
16 
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_drv.h>
19 #include <drm/drm_fbdev_generic.h>
20 #include <drm/drm_gem_atomic_helper.h>
21 #include <drm/drm_gem_dma_helper.h>
22 #include <drm/drm_managed.h>
23 #include <drm/drm_mipi_dbi.h>
24 #include <drm/drm_modeset_helper.h>
25 
26 #define ILI9486_ITFCTR1         0xb0
27 #define ILI9486_PWCTRL1         0xc2
28 #define ILI9486_VMCTRL1         0xc5
29 #define ILI9486_PGAMCTRL        0xe0
30 #define ILI9486_NGAMCTRL        0xe1
31 #define ILI9486_DGAMCTRL        0xe2
32 #define ILI9486_MADCTL_BGR      BIT(3)
33 #define ILI9486_MADCTL_MV       BIT(5)
34 #define ILI9486_MADCTL_MX       BIT(6)
35 #define ILI9486_MADCTL_MY       BIT(7)
36 
37 /*
38  * The PiScreen/waveshare rpi-lcd-35 has a SPI to 16-bit parallel bus converter
39  * in front of the  display controller. This means that 8-bit values have to be
40  * transferred as 16-bit.
41  */
42 static int waveshare_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par,
43 			     size_t num)
44 {
45 	struct spi_device *spi = mipi->spi;
46 	void *data = par;
47 	u32 speed_hz;
48 	int i, ret;
49 	__be16 *buf;
50 
51 	buf = kmalloc(32 * sizeof(u16), GFP_KERNEL);
52 	if (!buf)
53 		return -ENOMEM;
54 
55 	/*
56 	 * The displays are Raspberry Pi HATs and connected to the 8-bit only
57 	 * SPI controller, so 16-bit command and parameters need byte swapping
58 	 * before being transferred as 8-bit on the big endian SPI bus.
59 	 * Pixel data bytes have already been swapped before this function is
60 	 * called.
61 	 */
62 	buf[0] = cpu_to_be16(*cmd);
63 	gpiod_set_value_cansleep(mipi->dc, 0);
64 	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 2);
65 	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, buf, 2);
66 	if (ret || !num)
67 		goto free;
68 
69 	/* 8-bit configuration data, not 16-bit pixel data */
70 	if (num <= 32) {
71 		for (i = 0; i < num; i++)
72 			buf[i] = cpu_to_be16(par[i]);
73 		num *= 2;
74 		speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);
75 		data = buf;
76 	}
77 
78 	gpiod_set_value_cansleep(mipi->dc, 1);
79 	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, data, num);
80  free:
81 	kfree(buf);
82 
83 	return ret;
84 }
85 
86 static void waveshare_enable(struct drm_simple_display_pipe *pipe,
87 			     struct drm_crtc_state *crtc_state,
88 			     struct drm_plane_state *plane_state)
89 {
90 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
91 	struct mipi_dbi *dbi = &dbidev->dbi;
92 	u8 addr_mode;
93 	int ret, idx;
94 
95 	if (!drm_dev_enter(pipe->crtc.dev, &idx))
96 		return;
97 
98 	DRM_DEBUG_KMS("\n");
99 
100 	ret = mipi_dbi_poweron_conditional_reset(dbidev);
101 	if (ret < 0)
102 		goto out_exit;
103 	if (ret == 1)
104 		goto out_enable;
105 
106 	mipi_dbi_command(dbi, ILI9486_ITFCTR1);
107 	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
108 	msleep(250);
109 
110 	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55);
111 
112 	mipi_dbi_command(dbi, ILI9486_PWCTRL1, 0x44);
113 
114 	mipi_dbi_command(dbi, ILI9486_VMCTRL1, 0x00, 0x00, 0x00, 0x00);
115 
116 	mipi_dbi_command(dbi, ILI9486_PGAMCTRL,
117 			 0x0F, 0x1F, 0x1C, 0x0C, 0x0F, 0x08, 0x48, 0x98,
118 			 0x37, 0x0A, 0x13, 0x04, 0x11, 0x0D, 0x0);
119 	mipi_dbi_command(dbi, ILI9486_NGAMCTRL,
120 			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
121 			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
122 	mipi_dbi_command(dbi, ILI9486_DGAMCTRL,
123 			 0x0F, 0x32, 0x2E, 0x0B, 0x0D, 0x05, 0x47, 0x75,
124 			 0x37, 0x06, 0x10, 0x03, 0x24, 0x20, 0x00);
125 
126 	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
127 	msleep(100);
128 
129  out_enable:
130 	switch (dbidev->rotation) {
131 	case 90:
132 		addr_mode = ILI9486_MADCTL_MY;
133 		break;
134 	case 180:
135 		addr_mode = ILI9486_MADCTL_MV;
136 		break;
137 	case 270:
138 		addr_mode = ILI9486_MADCTL_MX;
139 		break;
140 	default:
141 		addr_mode = ILI9486_MADCTL_MV | ILI9486_MADCTL_MY |
142 			ILI9486_MADCTL_MX;
143 		break;
144 	}
145 	addr_mode |= ILI9486_MADCTL_BGR;
146 	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
147 	mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
148  out_exit:
149 	drm_dev_exit(idx);
150 }
151 
152 static const struct drm_simple_display_pipe_funcs waveshare_pipe_funcs = {
153 	DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(waveshare_enable),
154 };
155 
156 static const struct drm_display_mode waveshare_mode = {
157 	DRM_SIMPLE_MODE(480, 320, 73, 49),
158 };
159 
160 DEFINE_DRM_GEM_DMA_FOPS(ili9486_fops);
161 
162 static const struct drm_driver ili9486_driver = {
163 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
164 	.fops			= &ili9486_fops,
165 	DRM_GEM_DMA_DRIVER_OPS_VMAP,
166 	.debugfs_init		= mipi_dbi_debugfs_init,
167 	.name			= "ili9486",
168 	.desc			= "Ilitek ILI9486",
169 	.date			= "20200118",
170 	.major			= 1,
171 	.minor			= 0,
172 };
173 
174 static const struct of_device_id ili9486_of_match[] = {
175 	{ .compatible = "waveshare,rpi-lcd-35" },
176 	{ .compatible = "ozzmaker,piscreen" },
177 	{},
178 };
179 MODULE_DEVICE_TABLE(of, ili9486_of_match);
180 
181 static const struct spi_device_id ili9486_id[] = {
182 	{ "ili9486", 0 },
183 	{ }
184 };
185 MODULE_DEVICE_TABLE(spi, ili9486_id);
186 
187 static int ili9486_probe(struct spi_device *spi)
188 {
189 	struct device *dev = &spi->dev;
190 	struct mipi_dbi_dev *dbidev;
191 	struct drm_device *drm;
192 	struct mipi_dbi *dbi;
193 	struct gpio_desc *dc;
194 	u32 rotation = 0;
195 	int ret;
196 
197 	dbidev = devm_drm_dev_alloc(dev, &ili9486_driver,
198 				    struct mipi_dbi_dev, drm);
199 	if (IS_ERR(dbidev))
200 		return PTR_ERR(dbidev);
201 
202 	dbi = &dbidev->dbi;
203 	drm = &dbidev->drm;
204 
205 	dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
206 	if (IS_ERR(dbi->reset))
207 		return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
208 
209 	dc = devm_gpiod_get(dev, "dc", GPIOD_OUT_LOW);
210 	if (IS_ERR(dc))
211 		return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
212 
213 	dbidev->backlight = devm_of_find_backlight(dev);
214 	if (IS_ERR(dbidev->backlight))
215 		return PTR_ERR(dbidev->backlight);
216 
217 	device_property_read_u32(dev, "rotation", &rotation);
218 
219 	ret = mipi_dbi_spi_init(spi, dbi, dc);
220 	if (ret)
221 		return ret;
222 
223 	dbi->command = waveshare_command;
224 	dbi->read_commands = NULL;
225 
226 	ret = mipi_dbi_dev_init(dbidev, &waveshare_pipe_funcs,
227 				&waveshare_mode, rotation);
228 	if (ret)
229 		return ret;
230 
231 	drm_mode_config_reset(drm);
232 
233 	ret = drm_dev_register(drm, 0);
234 	if (ret)
235 		return ret;
236 
237 	spi_set_drvdata(spi, drm);
238 
239 	drm_fbdev_generic_setup(drm, 0);
240 
241 	return 0;
242 }
243 
244 static void ili9486_remove(struct spi_device *spi)
245 {
246 	struct drm_device *drm = spi_get_drvdata(spi);
247 
248 	drm_dev_unplug(drm);
249 	drm_atomic_helper_shutdown(drm);
250 }
251 
252 static void ili9486_shutdown(struct spi_device *spi)
253 {
254 	drm_atomic_helper_shutdown(spi_get_drvdata(spi));
255 }
256 
257 static struct spi_driver ili9486_spi_driver = {
258 	.driver = {
259 		.name = "ili9486",
260 		.of_match_table = ili9486_of_match,
261 	},
262 	.id_table = ili9486_id,
263 	.probe = ili9486_probe,
264 	.remove = ili9486_remove,
265 	.shutdown = ili9486_shutdown,
266 };
267 module_spi_driver(ili9486_spi_driver);
268 
269 MODULE_DESCRIPTION("Ilitek ILI9486 DRM driver");
270 MODULE_AUTHOR("Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>");
271 MODULE_LICENSE("GPL");
272