xref: /linux/drivers/gpu/drm/tiny/ili9163.c (revision f6e8dc9edf963dbc99085e54f6ced6da9daa6100)
1 // SPDX-License-Identifier: GPL-2.0+
2 
3 #include <linux/backlight.h>
4 #include <linux/delay.h>
5 #include <linux/gpio/consumer.h>
6 #include <linux/module.h>
7 #include <linux/property.h>
8 #include <linux/spi/spi.h>
9 
10 #include <drm/clients/drm_client_setup.h>
11 #include <drm/drm_atomic_helper.h>
12 #include <drm/drm_drv.h>
13 #include <drm/drm_fbdev_dma.h>
14 #include <drm/drm_gem_atomic_helper.h>
15 #include <drm/drm_gem_dma_helper.h>
16 #include <drm/drm_mipi_dbi.h>
17 #include <drm/drm_modeset_helper.h>
18 #include <drm/drm_print.h>
19 
20 #include <video/mipi_display.h>
21 
22 #define ILI9163_FRMCTR1		0xb1
23 
24 #define ILI9163_PWCTRL1		0xc0
25 #define ILI9163_PWCTRL2		0xc1
26 #define ILI9163_VMCTRL1		0xc5
27 #define ILI9163_VMCTRL2		0xc7
28 #define ILI9163_PWCTRLA		0xcb
29 #define ILI9163_PWCTRLB		0xcf
30 
31 #define ILI9163_EN3GAM		0xf2
32 
33 #define ILI9163_MADCTL_BGR	BIT(3)
34 #define ILI9163_MADCTL_MV	BIT(5)
35 #define ILI9163_MADCTL_MX	BIT(6)
36 #define ILI9163_MADCTL_MY	BIT(7)
37 
38 static void yx240qv29_enable(struct drm_simple_display_pipe *pipe,
39 			     struct drm_crtc_state *crtc_state,
40 			     struct drm_plane_state *plane_state)
41 {
42 	struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
43 	struct mipi_dbi *dbi = &dbidev->dbi;
44 	u8 addr_mode;
45 	int ret, idx;
46 
47 	if (!drm_dev_enter(pipe->crtc.dev, &idx))
48 		return;
49 
50 	DRM_DEBUG_KMS("\n");
51 
52 	ret = mipi_dbi_poweron_conditional_reset(dbidev);
53 	if (ret < 0)
54 		goto out_exit;
55 	if (ret == 1)
56 		goto out_enable;
57 
58 	/* Gamma */
59 	mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x04);
60 	mipi_dbi_command(dbi, ILI9163_EN3GAM, 0x00);
61 
62 	/* Frame Rate */
63 	mipi_dbi_command(dbi, ILI9163_FRMCTR1, 0x0a, 0x14);
64 
65 	/* Power Control */
66 	mipi_dbi_command(dbi, ILI9163_PWCTRL1, 0x0a, 0x00);
67 	mipi_dbi_command(dbi, ILI9163_PWCTRL2, 0x02);
68 
69 	/* VCOM */
70 	mipi_dbi_command(dbi, ILI9163_VMCTRL1, 0x2f, 0x3e);
71 	mipi_dbi_command(dbi, ILI9163_VMCTRL2, 0x40);
72 
73 	/* Memory Access Control */
74 	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
75 
76 	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
77 	msleep(100);
78 
79 	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
80 	msleep(100);
81 
82 out_enable:
83 	switch (dbidev->rotation) {
84 	default:
85 		addr_mode = ILI9163_MADCTL_MX | ILI9163_MADCTL_MY;
86 		break;
87 	case 90:
88 		addr_mode = ILI9163_MADCTL_MX | ILI9163_MADCTL_MV;
89 		break;
90 	case 180:
91 		addr_mode = 0;
92 		break;
93 	case 270:
94 		addr_mode = ILI9163_MADCTL_MY | ILI9163_MADCTL_MV;
95 		break;
96 	}
97 	addr_mode |= ILI9163_MADCTL_BGR;
98 	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
99 	mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
100 out_exit:
101 	drm_dev_exit(idx);
102 }
103 
104 static const struct drm_simple_display_pipe_funcs ili9163_pipe_funcs = {
105 	DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(yx240qv29_enable),
106 };
107 
108 static const struct drm_display_mode yx240qv29_mode = {
109 	DRM_SIMPLE_MODE(128, 160, 28, 35),
110 };
111 
112 DEFINE_DRM_GEM_DMA_FOPS(ili9163_fops);
113 
114 static struct drm_driver ili9163_driver = {
115 	.driver_features	= DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
116 	.fops			= &ili9163_fops,
117 	DRM_GEM_DMA_DRIVER_OPS_VMAP,
118 	DRM_FBDEV_DMA_DRIVER_OPS,
119 	.debugfs_init		= mipi_dbi_debugfs_init,
120 	.name			= "ili9163",
121 	.desc			= "Ilitek ILI9163",
122 	.major			= 1,
123 	.minor			= 0,
124 };
125 
126 static const struct of_device_id ili9163_of_match[] = {
127 	{ .compatible = "newhaven,1.8-128160EF" },
128 	{ }
129 };
130 MODULE_DEVICE_TABLE(of, ili9163_of_match);
131 
132 static const struct spi_device_id ili9163_id[] = {
133 	{ "nhd-1.8-128160EF", 0 },
134 	{ }
135 };
136 MODULE_DEVICE_TABLE(spi, ili9163_id);
137 
138 static int ili9163_probe(struct spi_device *spi)
139 {
140 	struct device *dev = &spi->dev;
141 	struct mipi_dbi_dev *dbidev;
142 	struct drm_device *drm;
143 	struct mipi_dbi *dbi;
144 	struct gpio_desc *dc;
145 	u32 rotation = 0;
146 	int ret;
147 
148 	dbidev = devm_drm_dev_alloc(dev, &ili9163_driver,
149 				    struct mipi_dbi_dev, drm);
150 	if (IS_ERR(dbidev))
151 		return PTR_ERR(dbidev);
152 
153 	dbi = &dbidev->dbi;
154 	drm = &dbidev->drm;
155 
156 	spi_set_drvdata(spi, drm);
157 
158 	dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
159 	if (IS_ERR(dbi->reset)) {
160 		DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");
161 		return PTR_ERR(dbi->reset);
162 	}
163 
164 	dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
165 	if (IS_ERR(dc)) {
166 		DRM_DEV_ERROR(dev, "Failed to get gpio 'dc'\n");
167 		return PTR_ERR(dc);
168 	}
169 
170 	dbidev->backlight = devm_of_find_backlight(dev);
171 	if (IS_ERR(dbidev->backlight))
172 		return PTR_ERR(dbidev->backlight);
173 
174 	device_property_read_u32(dev, "rotation", &rotation);
175 
176 	ret = mipi_dbi_spi_init(spi, dbi, dc);
177 	if (ret)
178 		return ret;
179 
180 	ret = mipi_dbi_dev_init(dbidev, &ili9163_pipe_funcs, &yx240qv29_mode, rotation);
181 	if (ret)
182 		return ret;
183 
184 	drm_mode_config_reset(drm);
185 
186 	ret = drm_dev_register(drm, 0);
187 	if (ret)
188 		return ret;
189 
190 	drm_client_setup(drm, NULL);
191 
192 	return 0;
193 }
194 
195 static void ili9163_remove(struct spi_device *spi)
196 {
197 	struct drm_device *drm = spi_get_drvdata(spi);
198 
199 	drm_dev_unplug(drm);
200 	drm_atomic_helper_shutdown(drm);
201 }
202 
203 static void ili9163_shutdown(struct spi_device *spi)
204 {
205 	drm_atomic_helper_shutdown(spi_get_drvdata(spi));
206 }
207 
208 static struct spi_driver ili9163_spi_driver = {
209 	.driver = {
210 		.name = "ili9163",
211 		.of_match_table = ili9163_of_match,
212 	},
213 	.id_table = ili9163_id,
214 	.probe = ili9163_probe,
215 	.remove = ili9163_remove,
216 	.shutdown = ili9163_shutdown,
217 };
218 module_spi_driver(ili9163_spi_driver);
219 
220 MODULE_DESCRIPTION("Ilitek ILI9163 DRM driver");
221 MODULE_AUTHOR("Daniel Mack <daniel@zonque.org>");
222 MODULE_LICENSE("GPL");
223