1 // SPDX-License-Identifier: GPL-2.0-or-later 2 3 #include <linux/module.h> 4 #include <linux/pci.h> 5 6 #include <drm/drm_aperture.h> 7 #include <drm/drm_atomic.h> 8 #include <drm/drm_atomic_helper.h> 9 #include <drm/drm_damage_helper.h> 10 #include <drm/drm_drv.h> 11 #include <drm/drm_edid.h> 12 #include <drm/drm_fbdev_shmem.h> 13 #include <drm/drm_fourcc.h> 14 #include <drm/drm_framebuffer.h> 15 #include <drm/drm_gem_atomic_helper.h> 16 #include <drm/drm_gem_framebuffer_helper.h> 17 #include <drm/drm_gem_shmem_helper.h> 18 #include <drm/drm_managed.h> 19 #include <drm/drm_module.h> 20 #include <drm/drm_plane_helper.h> 21 #include <drm/drm_probe_helper.h> 22 23 #include <video/vga.h> 24 25 /* ---------------------------------------------------------------------- */ 26 27 #define VBE_DISPI_IOPORT_INDEX 0x01CE 28 #define VBE_DISPI_IOPORT_DATA 0x01CF 29 30 #define VBE_DISPI_INDEX_ID 0x0 31 #define VBE_DISPI_INDEX_XRES 0x1 32 #define VBE_DISPI_INDEX_YRES 0x2 33 #define VBE_DISPI_INDEX_BPP 0x3 34 #define VBE_DISPI_INDEX_ENABLE 0x4 35 #define VBE_DISPI_INDEX_BANK 0x5 36 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 37 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 38 #define VBE_DISPI_INDEX_X_OFFSET 0x8 39 #define VBE_DISPI_INDEX_Y_OFFSET 0x9 40 #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa 41 42 #define VBE_DISPI_ID0 0xB0C0 43 #define VBE_DISPI_ID1 0xB0C1 44 #define VBE_DISPI_ID2 0xB0C2 45 #define VBE_DISPI_ID3 0xB0C3 46 #define VBE_DISPI_ID4 0xB0C4 47 #define VBE_DISPI_ID5 0xB0C5 48 49 #define VBE_DISPI_DISABLED 0x00 50 #define VBE_DISPI_ENABLED 0x01 51 #define VBE_DISPI_GETCAPS 0x02 52 #define VBE_DISPI_8BIT_DAC 0x20 53 #define VBE_DISPI_LFB_ENABLED 0x40 54 #define VBE_DISPI_NOCLEARMEM 0x80 55 56 static int bochs_modeset = -1; 57 static int defx = 1024; 58 static int defy = 768; 59 60 module_param_named(modeset, bochs_modeset, int, 0444); 61 MODULE_PARM_DESC(modeset, "enable/disable kernel modesetting"); 62 63 module_param(defx, int, 0444); 64 module_param(defy, int, 0444); 65 MODULE_PARM_DESC(defx, "default x resolution"); 66 MODULE_PARM_DESC(defy, "default y resolution"); 67 68 /* ---------------------------------------------------------------------- */ 69 70 enum bochs_types { 71 BOCHS_QEMU_STDVGA, 72 BOCHS_SIMICS, 73 BOCHS_UNKNOWN, 74 }; 75 76 struct bochs_device { 77 struct drm_device dev; 78 79 /* hw */ 80 void __iomem *mmio; 81 int ioports; 82 void __iomem *fb_map; 83 unsigned long fb_base; 84 unsigned long fb_size; 85 unsigned long qext_size; 86 87 /* mode */ 88 u16 xres; 89 u16 yres; 90 u16 yres_virtual; 91 u32 stride; 92 u32 bpp; 93 94 /* drm */ 95 struct drm_plane primary_plane; 96 struct drm_crtc crtc; 97 struct drm_encoder encoder; 98 struct drm_connector connector; 99 }; 100 101 static struct bochs_device *to_bochs_device(const struct drm_device *dev) 102 { 103 return container_of(dev, struct bochs_device, dev); 104 } 105 106 /* ---------------------------------------------------------------------- */ 107 108 static void bochs_vga_writeb(struct bochs_device *bochs, u16 ioport, u8 val) 109 { 110 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df)) 111 return; 112 113 if (bochs->mmio) { 114 int offset = ioport - 0x3c0 + 0x400; 115 116 writeb(val, bochs->mmio + offset); 117 } else { 118 outb(val, ioport); 119 } 120 } 121 122 static u8 bochs_vga_readb(struct bochs_device *bochs, u16 ioport) 123 { 124 if (WARN_ON(ioport < 0x3c0 || ioport > 0x3df)) 125 return 0xff; 126 127 if (bochs->mmio) { 128 int offset = ioport - 0x3c0 + 0x400; 129 130 return readb(bochs->mmio + offset); 131 } else { 132 return inb(ioport); 133 } 134 } 135 136 static u16 bochs_dispi_read(struct bochs_device *bochs, u16 reg) 137 { 138 u16 ret = 0; 139 140 if (bochs->mmio) { 141 int offset = 0x500 + (reg << 1); 142 143 ret = readw(bochs->mmio + offset); 144 } else { 145 outw(reg, VBE_DISPI_IOPORT_INDEX); 146 ret = inw(VBE_DISPI_IOPORT_DATA); 147 } 148 return ret; 149 } 150 151 static void bochs_dispi_write(struct bochs_device *bochs, u16 reg, u16 val) 152 { 153 if (bochs->mmio) { 154 int offset = 0x500 + (reg << 1); 155 156 writew(val, bochs->mmio + offset); 157 } else { 158 outw(reg, VBE_DISPI_IOPORT_INDEX); 159 outw(val, VBE_DISPI_IOPORT_DATA); 160 } 161 } 162 163 static void bochs_hw_set_big_endian(struct bochs_device *bochs) 164 { 165 if (bochs->qext_size < 8) 166 return; 167 168 writel(0xbebebebe, bochs->mmio + 0x604); 169 } 170 171 static void bochs_hw_set_little_endian(struct bochs_device *bochs) 172 { 173 if (bochs->qext_size < 8) 174 return; 175 176 writel(0x1e1e1e1e, bochs->mmio + 0x604); 177 } 178 179 #ifdef __BIG_ENDIAN 180 #define bochs_hw_set_native_endian(_b) bochs_hw_set_big_endian(_b) 181 #else 182 #define bochs_hw_set_native_endian(_b) bochs_hw_set_little_endian(_b) 183 #endif 184 185 static int bochs_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len) 186 { 187 struct bochs_device *bochs = data; 188 size_t i, start = block * EDID_LENGTH; 189 190 if (!bochs->mmio) 191 return -1; 192 193 if (start + len > 0x400 /* vga register offset */) 194 return -1; 195 196 for (i = 0; i < len; i++) 197 buf[i] = readb(bochs->mmio + start + i); 198 199 return 0; 200 } 201 202 static const struct drm_edid *bochs_hw_read_edid(struct drm_connector *connector) 203 { 204 struct drm_device *dev = connector->dev; 205 struct bochs_device *bochs = to_bochs_device(dev); 206 u8 header[8]; 207 208 /* check header to detect whenever edid support is enabled in qemu */ 209 bochs_get_edid_block(bochs, header, 0, ARRAY_SIZE(header)); 210 if (drm_edid_header_is_valid(header) != 8) 211 return NULL; 212 213 drm_dbg(dev, "Found EDID data blob.\n"); 214 215 return drm_edid_read_custom(connector, bochs_get_edid_block, bochs); 216 } 217 218 static int bochs_hw_init(struct bochs_device *bochs) 219 { 220 struct drm_device *dev = &bochs->dev; 221 struct pci_dev *pdev = to_pci_dev(dev->dev); 222 unsigned long addr, size, mem, ioaddr, iosize; 223 u16 id; 224 225 if (pdev->resource[2].flags & IORESOURCE_MEM) { 226 ioaddr = pci_resource_start(pdev, 2); 227 iosize = pci_resource_len(pdev, 2); 228 /* mmio bar with vga and bochs registers present */ 229 if (!devm_request_mem_region(&pdev->dev, ioaddr, iosize, "bochs-drm")) { 230 DRM_ERROR("Cannot request mmio region\n"); 231 return -EBUSY; 232 } 233 bochs->mmio = devm_ioremap(&pdev->dev, ioaddr, iosize); 234 if (bochs->mmio == NULL) { 235 DRM_ERROR("Cannot map mmio region\n"); 236 return -ENOMEM; 237 } 238 } else { 239 ioaddr = VBE_DISPI_IOPORT_INDEX; 240 iosize = 2; 241 if (!devm_request_region(&pdev->dev, ioaddr, iosize, "bochs-drm")) { 242 DRM_ERROR("Cannot request ioports\n"); 243 return -EBUSY; 244 } 245 bochs->ioports = 1; 246 } 247 248 id = bochs_dispi_read(bochs, VBE_DISPI_INDEX_ID); 249 mem = bochs_dispi_read(bochs, VBE_DISPI_INDEX_VIDEO_MEMORY_64K) 250 * 64 * 1024; 251 if ((id & 0xfff0) != VBE_DISPI_ID0) { 252 DRM_ERROR("ID mismatch\n"); 253 return -ENODEV; 254 } 255 256 if ((pdev->resource[0].flags & IORESOURCE_MEM) == 0) 257 return -ENODEV; 258 addr = pci_resource_start(pdev, 0); 259 size = pci_resource_len(pdev, 0); 260 if (addr == 0) 261 return -ENODEV; 262 if (size != mem) { 263 DRM_ERROR("Size mismatch: pci=%ld, bochs=%ld\n", 264 size, mem); 265 size = min(size, mem); 266 } 267 268 if (!devm_request_mem_region(&pdev->dev, addr, size, "bochs-drm")) 269 DRM_WARN("Cannot request framebuffer, boot fb still active?\n"); 270 271 bochs->fb_map = devm_ioremap_wc(&pdev->dev, addr, size); 272 if (bochs->fb_map == NULL) { 273 DRM_ERROR("Cannot map framebuffer\n"); 274 return -ENOMEM; 275 } 276 bochs->fb_base = addr; 277 bochs->fb_size = size; 278 279 DRM_INFO("Found bochs VGA, ID 0x%x.\n", id); 280 DRM_INFO("Framebuffer size %ld kB @ 0x%lx, %s @ 0x%lx.\n", 281 size / 1024, addr, 282 bochs->ioports ? "ioports" : "mmio", 283 ioaddr); 284 285 if (bochs->mmio && pdev->revision >= 2) { 286 bochs->qext_size = readl(bochs->mmio + 0x600); 287 if (bochs->qext_size < 4 || bochs->qext_size > iosize) { 288 bochs->qext_size = 0; 289 goto noext; 290 } 291 DRM_DEBUG("Found qemu ext regs, size %ld\n", 292 bochs->qext_size); 293 bochs_hw_set_native_endian(bochs); 294 } 295 296 noext: 297 return 0; 298 } 299 300 static void bochs_hw_blank(struct bochs_device *bochs, bool blank) 301 { 302 DRM_DEBUG_DRIVER("hw_blank %d\n", blank); 303 /* enable color bit (so VGA_IS1_RC access works) */ 304 bochs_vga_writeb(bochs, VGA_MIS_W, VGA_MIS_COLOR); 305 /* discard ar_flip_flop */ 306 (void)bochs_vga_readb(bochs, VGA_IS1_RC); 307 /* blank or unblank; we need only update index and set 0x20 */ 308 bochs_vga_writeb(bochs, VGA_ATT_W, blank ? 0 : 0x20); 309 } 310 311 static void bochs_hw_setmode(struct bochs_device *bochs, struct drm_display_mode *mode) 312 { 313 int idx; 314 315 if (!drm_dev_enter(&bochs->dev, &idx)) 316 return; 317 318 bochs->xres = mode->hdisplay; 319 bochs->yres = mode->vdisplay; 320 bochs->bpp = 32; 321 bochs->stride = mode->hdisplay * (bochs->bpp / 8); 322 bochs->yres_virtual = bochs->fb_size / bochs->stride; 323 324 DRM_DEBUG_DRIVER("%dx%d @ %d bpp, vy %d\n", 325 bochs->xres, bochs->yres, bochs->bpp, 326 bochs->yres_virtual); 327 328 bochs_hw_blank(bochs, false); 329 330 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, 0); 331 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BPP, bochs->bpp); 332 bochs_dispi_write(bochs, VBE_DISPI_INDEX_XRES, bochs->xres); 333 bochs_dispi_write(bochs, VBE_DISPI_INDEX_YRES, bochs->yres); 334 bochs_dispi_write(bochs, VBE_DISPI_INDEX_BANK, 0); 335 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, bochs->xres); 336 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_HEIGHT, 337 bochs->yres_virtual); 338 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, 0); 339 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, 0); 340 341 bochs_dispi_write(bochs, VBE_DISPI_INDEX_ENABLE, 342 VBE_DISPI_ENABLED | VBE_DISPI_LFB_ENABLED); 343 344 drm_dev_exit(idx); 345 } 346 347 static void bochs_hw_setformat(struct bochs_device *bochs, const struct drm_format_info *format) 348 { 349 int idx; 350 351 if (!drm_dev_enter(&bochs->dev, &idx)) 352 return; 353 354 DRM_DEBUG_DRIVER("format %c%c%c%c\n", 355 (format->format >> 0) & 0xff, 356 (format->format >> 8) & 0xff, 357 (format->format >> 16) & 0xff, 358 (format->format >> 24) & 0xff); 359 360 switch (format->format) { 361 case DRM_FORMAT_XRGB8888: 362 bochs_hw_set_little_endian(bochs); 363 break; 364 case DRM_FORMAT_BGRX8888: 365 bochs_hw_set_big_endian(bochs); 366 break; 367 default: 368 /* should not happen */ 369 DRM_ERROR("%s: Huh? Got framebuffer format 0x%x", 370 __func__, format->format); 371 break; 372 } 373 374 drm_dev_exit(idx); 375 } 376 377 static void bochs_hw_setbase(struct bochs_device *bochs, int x, int y, int stride, u64 addr) 378 { 379 unsigned long offset; 380 unsigned int vx, vy, vwidth, idx; 381 382 if (!drm_dev_enter(&bochs->dev, &idx)) 383 return; 384 385 bochs->stride = stride; 386 offset = (unsigned long)addr + 387 y * bochs->stride + 388 x * (bochs->bpp / 8); 389 vy = offset / bochs->stride; 390 vx = (offset % bochs->stride) * 8 / bochs->bpp; 391 vwidth = stride * 8 / bochs->bpp; 392 393 DRM_DEBUG_DRIVER("x %d, y %d, addr %llx -> offset %lx, vx %d, vy %d\n", 394 x, y, addr, offset, vx, vy); 395 bochs_dispi_write(bochs, VBE_DISPI_INDEX_VIRT_WIDTH, vwidth); 396 bochs_dispi_write(bochs, VBE_DISPI_INDEX_X_OFFSET, vx); 397 bochs_dispi_write(bochs, VBE_DISPI_INDEX_Y_OFFSET, vy); 398 399 drm_dev_exit(idx); 400 } 401 402 /* ---------------------------------------------------------------------- */ 403 404 static const uint32_t bochs_primary_plane_formats[] = { 405 DRM_FORMAT_XRGB8888, 406 DRM_FORMAT_BGRX8888, 407 }; 408 409 static int bochs_primary_plane_helper_atomic_check(struct drm_plane *plane, 410 struct drm_atomic_state *state) 411 { 412 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane); 413 struct drm_crtc *new_crtc = new_plane_state->crtc; 414 struct drm_crtc_state *new_crtc_state = NULL; 415 int ret; 416 417 if (new_crtc) 418 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc); 419 420 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state, 421 DRM_PLANE_NO_SCALING, 422 DRM_PLANE_NO_SCALING, 423 false, false); 424 if (ret) 425 return ret; 426 else if (!new_plane_state->visible) 427 return 0; 428 429 return 0; 430 } 431 432 static void bochs_primary_plane_helper_atomic_update(struct drm_plane *plane, 433 struct drm_atomic_state *state) 434 { 435 struct drm_device *dev = plane->dev; 436 struct bochs_device *bochs = to_bochs_device(dev); 437 struct drm_plane_state *plane_state = plane->state; 438 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); 439 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 440 struct drm_framebuffer *fb = plane_state->fb; 441 struct drm_atomic_helper_damage_iter iter; 442 struct drm_rect damage; 443 444 if (!fb || !bochs->stride) 445 return; 446 447 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); 448 drm_atomic_for_each_plane_damage(&iter, &damage) { 449 struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(bochs->fb_map); 450 451 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, &damage)); 452 drm_fb_memcpy(&dst, fb->pitches, shadow_plane_state->data, fb, &damage); 453 } 454 455 /* Always scanout image at VRAM offset 0 */ 456 bochs_hw_setbase(bochs, 457 plane_state->crtc_x, 458 plane_state->crtc_y, 459 fb->pitches[0], 460 0); 461 bochs_hw_setformat(bochs, fb->format); 462 } 463 464 static const struct drm_plane_helper_funcs bochs_primary_plane_helper_funcs = { 465 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, 466 .atomic_check = bochs_primary_plane_helper_atomic_check, 467 .atomic_update = bochs_primary_plane_helper_atomic_update, 468 }; 469 470 static const struct drm_plane_funcs bochs_primary_plane_funcs = { 471 .update_plane = drm_atomic_helper_update_plane, 472 .disable_plane = drm_atomic_helper_disable_plane, 473 .destroy = drm_plane_cleanup, 474 DRM_GEM_SHADOW_PLANE_FUNCS 475 }; 476 477 static void bochs_crtc_helper_mode_set_nofb(struct drm_crtc *crtc) 478 { 479 struct bochs_device *bochs = to_bochs_device(crtc->dev); 480 struct drm_crtc_state *crtc_state = crtc->state; 481 482 bochs_hw_setmode(bochs, &crtc_state->mode); 483 } 484 485 static int bochs_crtc_helper_atomic_check(struct drm_crtc *crtc, 486 struct drm_atomic_state *state) 487 { 488 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 489 490 if (!crtc_state->enable) 491 return 0; 492 493 return drm_atomic_helper_check_crtc_primary_plane(crtc_state); 494 } 495 496 static void bochs_crtc_helper_atomic_enable(struct drm_crtc *crtc, 497 struct drm_atomic_state *state) 498 { 499 } 500 501 static void bochs_crtc_helper_atomic_disable(struct drm_crtc *crtc, 502 struct drm_atomic_state *crtc_state) 503 { 504 struct bochs_device *bochs = to_bochs_device(crtc->dev); 505 506 bochs_hw_blank(bochs, true); 507 } 508 509 static const struct drm_crtc_helper_funcs bochs_crtc_helper_funcs = { 510 .mode_set_nofb = bochs_crtc_helper_mode_set_nofb, 511 .atomic_check = bochs_crtc_helper_atomic_check, 512 .atomic_enable = bochs_crtc_helper_atomic_enable, 513 .atomic_disable = bochs_crtc_helper_atomic_disable, 514 }; 515 516 static const struct drm_crtc_funcs bochs_crtc_funcs = { 517 .reset = drm_atomic_helper_crtc_reset, 518 .destroy = drm_crtc_cleanup, 519 .set_config = drm_atomic_helper_set_config, 520 .page_flip = drm_atomic_helper_page_flip, 521 .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, 522 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 523 }; 524 525 static const struct drm_encoder_funcs bochs_encoder_funcs = { 526 .destroy = drm_encoder_cleanup, 527 }; 528 529 static int bochs_connector_helper_get_modes(struct drm_connector *connector) 530 { 531 const struct drm_edid *edid; 532 int count; 533 534 edid = bochs_hw_read_edid(connector); 535 536 if (edid) { 537 drm_edid_connector_update(connector, edid); 538 count = drm_edid_connector_add_modes(connector); 539 drm_edid_free(edid); 540 } else { 541 drm_edid_connector_update(connector, NULL); 542 count = drm_add_modes_noedid(connector, 8192, 8192); 543 drm_set_preferred_mode(connector, defx, defy); 544 } 545 546 return count; 547 } 548 549 static const struct drm_connector_helper_funcs bochs_connector_helper_funcs = { 550 .get_modes = bochs_connector_helper_get_modes, 551 }; 552 553 static const struct drm_connector_funcs bochs_connector_funcs = { 554 .fill_modes = drm_helper_probe_single_connector_modes, 555 .destroy = drm_connector_cleanup, 556 .reset = drm_atomic_helper_connector_reset, 557 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 558 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 559 }; 560 561 static enum drm_mode_status bochs_mode_config_mode_valid(struct drm_device *dev, 562 const struct drm_display_mode *mode) 563 { 564 struct bochs_device *bochs = to_bochs_device(dev); 565 const struct drm_format_info *format = drm_format_info(DRM_FORMAT_XRGB8888); 566 u64 pitch; 567 568 if (drm_WARN_ON(dev, !format)) 569 return MODE_ERROR; 570 571 pitch = drm_format_info_min_pitch(format, 0, mode->hdisplay); 572 if (!pitch) 573 return MODE_BAD_WIDTH; 574 if (mode->vdisplay > DIV_ROUND_DOWN_ULL(bochs->fb_size, pitch)) 575 return MODE_MEM; 576 577 return MODE_OK; 578 } 579 580 static const struct drm_mode_config_funcs bochs_mode_config_funcs = { 581 .fb_create = drm_gem_fb_create_with_dirty, 582 .mode_valid = bochs_mode_config_mode_valid, 583 .atomic_check = drm_atomic_helper_check, 584 .atomic_commit = drm_atomic_helper_commit, 585 }; 586 587 static int bochs_kms_init(struct bochs_device *bochs) 588 { 589 struct drm_device *dev = &bochs->dev; 590 struct drm_plane *primary_plane; 591 struct drm_crtc *crtc; 592 struct drm_connector *connector; 593 struct drm_encoder *encoder; 594 int ret; 595 596 ret = drmm_mode_config_init(dev); 597 if (ret) 598 return ret; 599 600 dev->mode_config.max_width = 8192; 601 dev->mode_config.max_height = 8192; 602 603 dev->mode_config.preferred_depth = 24; 604 dev->mode_config.quirk_addfb_prefer_host_byte_order = true; 605 606 dev->mode_config.funcs = &bochs_mode_config_funcs; 607 608 primary_plane = &bochs->primary_plane; 609 ret = drm_universal_plane_init(dev, primary_plane, 0, 610 &bochs_primary_plane_funcs, 611 bochs_primary_plane_formats, 612 ARRAY_SIZE(bochs_primary_plane_formats), 613 NULL, 614 DRM_PLANE_TYPE_PRIMARY, NULL); 615 if (ret) 616 return ret; 617 drm_plane_helper_add(primary_plane, &bochs_primary_plane_helper_funcs); 618 drm_plane_enable_fb_damage_clips(primary_plane); 619 620 crtc = &bochs->crtc; 621 ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL, 622 &bochs_crtc_funcs, NULL); 623 if (ret) 624 return ret; 625 drm_crtc_helper_add(crtc, &bochs_crtc_helper_funcs); 626 627 encoder = &bochs->encoder; 628 ret = drm_encoder_init(dev, encoder, &bochs_encoder_funcs, 629 DRM_MODE_ENCODER_VIRTUAL, NULL); 630 if (ret) 631 return ret; 632 encoder->possible_crtcs = drm_crtc_mask(crtc); 633 634 connector = &bochs->connector; 635 ret = drm_connector_init(dev, connector, &bochs_connector_funcs, 636 DRM_MODE_CONNECTOR_VIRTUAL); 637 if (ret) 638 return ret; 639 drm_connector_helper_add(connector, &bochs_connector_helper_funcs); 640 drm_connector_attach_edid_property(connector); 641 drm_connector_attach_encoder(connector, encoder); 642 643 drm_mode_config_reset(dev); 644 645 return 0; 646 } 647 648 /* ---------------------------------------------------------------------- */ 649 /* drm interface */ 650 651 static int bochs_load(struct bochs_device *bochs) 652 { 653 int ret; 654 655 ret = bochs_hw_init(bochs); 656 if (ret) 657 return ret; 658 659 ret = bochs_kms_init(bochs); 660 if (ret) 661 return ret; 662 663 return 0; 664 } 665 666 DEFINE_DRM_GEM_FOPS(bochs_fops); 667 668 static const struct drm_driver bochs_driver = { 669 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 670 .fops = &bochs_fops, 671 .name = "bochs-drm", 672 .desc = "bochs dispi vga interface (qemu stdvga)", 673 .date = "20130925", 674 .major = 1, 675 .minor = 0, 676 DRM_GEM_SHMEM_DRIVER_OPS, 677 }; 678 679 /* ---------------------------------------------------------------------- */ 680 /* pm interface */ 681 682 #ifdef CONFIG_PM_SLEEP 683 static int bochs_pm_suspend(struct device *dev) 684 { 685 struct drm_device *drm_dev = dev_get_drvdata(dev); 686 687 return drm_mode_config_helper_suspend(drm_dev); 688 } 689 690 static int bochs_pm_resume(struct device *dev) 691 { 692 struct drm_device *drm_dev = dev_get_drvdata(dev); 693 694 return drm_mode_config_helper_resume(drm_dev); 695 } 696 #endif 697 698 static const struct dev_pm_ops bochs_pm_ops = { 699 SET_SYSTEM_SLEEP_PM_OPS(bochs_pm_suspend, 700 bochs_pm_resume) 701 }; 702 703 /* ---------------------------------------------------------------------- */ 704 /* pci interface */ 705 706 static int bochs_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 707 { 708 struct bochs_device *bochs; 709 struct drm_device *dev; 710 int ret; 711 712 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &bochs_driver); 713 if (ret) 714 return ret; 715 716 bochs = devm_drm_dev_alloc(&pdev->dev, &bochs_driver, struct bochs_device, dev); 717 if (IS_ERR(bochs)) 718 return PTR_ERR(dev); 719 dev = &bochs->dev; 720 721 ret = pcim_enable_device(pdev); 722 if (ret) 723 goto err_free_dev; 724 725 pci_set_drvdata(pdev, dev); 726 727 ret = bochs_load(bochs); 728 if (ret) 729 goto err_free_dev; 730 731 ret = drm_dev_register(dev, 0); 732 if (ret) 733 goto err_free_dev; 734 735 drm_fbdev_shmem_setup(dev, 32); 736 return ret; 737 738 err_free_dev: 739 drm_dev_put(dev); 740 return ret; 741 } 742 743 static void bochs_pci_remove(struct pci_dev *pdev) 744 { 745 struct drm_device *dev = pci_get_drvdata(pdev); 746 747 drm_dev_unplug(dev); 748 drm_atomic_helper_shutdown(dev); 749 drm_dev_put(dev); 750 } 751 752 static void bochs_pci_shutdown(struct pci_dev *pdev) 753 { 754 drm_atomic_helper_shutdown(pci_get_drvdata(pdev)); 755 } 756 757 static const struct pci_device_id bochs_pci_tbl[] = { 758 { 759 .vendor = 0x1234, 760 .device = 0x1111, 761 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET, 762 .subdevice = PCI_SUBDEVICE_ID_QEMU, 763 .driver_data = BOCHS_QEMU_STDVGA, 764 }, 765 { 766 .vendor = 0x1234, 767 .device = 0x1111, 768 .subvendor = PCI_ANY_ID, 769 .subdevice = PCI_ANY_ID, 770 .driver_data = BOCHS_UNKNOWN, 771 }, 772 { 773 .vendor = 0x4321, 774 .device = 0x1111, 775 .subvendor = PCI_ANY_ID, 776 .subdevice = PCI_ANY_ID, 777 .driver_data = BOCHS_SIMICS, 778 }, 779 { /* end of list */ } 780 }; 781 782 static struct pci_driver bochs_pci_driver = { 783 .name = "bochs-drm", 784 .id_table = bochs_pci_tbl, 785 .probe = bochs_pci_probe, 786 .remove = bochs_pci_remove, 787 .shutdown = bochs_pci_shutdown, 788 .driver.pm = &bochs_pm_ops, 789 }; 790 791 /* ---------------------------------------------------------------------- */ 792 /* module init/exit */ 793 794 drm_module_pci_driver_if_modeset(bochs_pci_driver, bochs_modeset); 795 796 MODULE_DEVICE_TABLE(pci, bochs_pci_tbl); 797 MODULE_AUTHOR("Gerd Hoffmann <kraxel@redhat.com>"); 798 MODULE_DESCRIPTION("DRM Support for bochs dispi vga interface (qemu stdvga)"); 799 MODULE_LICENSE("GPL"); 800