1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Texas Instruments 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 /* LCDC DRM driver, based on da8xx-fb */ 8 9 #include <linux/component.h> 10 #include <linux/mod_devicetable.h> 11 #include <linux/module.h> 12 #include <linux/pinctrl/consumer.h> 13 #include <linux/platform_device.h> 14 #include <linux/pm_runtime.h> 15 16 #include <drm/drm_atomic_helper.h> 17 #include <drm/drm_client_setup.h> 18 #include <drm/drm_debugfs.h> 19 #include <drm/drm_drv.h> 20 #include <drm/drm_fbdev_dma.h> 21 #include <drm/drm_fourcc.h> 22 #include <drm/drm_gem_dma_helper.h> 23 #include <drm/drm_gem_framebuffer_helper.h> 24 #include <drm/drm_mm.h> 25 #include <drm/drm_probe_helper.h> 26 #include <drm/drm_vblank.h> 27 28 29 #include "tilcdc_drv.h" 30 #include "tilcdc_external.h" 31 #include "tilcdc_panel.h" 32 #include "tilcdc_regs.h" 33 34 static LIST_HEAD(module_list); 35 36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 }; 37 38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565, 39 DRM_FORMAT_BGR888, 40 DRM_FORMAT_XBGR8888 }; 41 42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, 43 DRM_FORMAT_RGB888, 44 DRM_FORMAT_XRGB8888 }; 45 46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565, 47 DRM_FORMAT_RGB888, 48 DRM_FORMAT_XRGB8888 }; 49 50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name, 51 const struct tilcdc_module_ops *funcs) 52 { 53 mod->name = name; 54 mod->funcs = funcs; 55 INIT_LIST_HEAD(&mod->list); 56 list_add(&mod->list, &module_list); 57 } 58 59 void tilcdc_module_cleanup(struct tilcdc_module *mod) 60 { 61 list_del(&mod->list); 62 } 63 64 static int tilcdc_atomic_check(struct drm_device *dev, 65 struct drm_atomic_state *state) 66 { 67 int ret; 68 69 ret = drm_atomic_helper_check_modeset(dev, state); 70 if (ret) 71 return ret; 72 73 ret = drm_atomic_helper_check_planes(dev, state); 74 if (ret) 75 return ret; 76 77 /* 78 * tilcdc ->atomic_check can update ->mode_changed if pixel format 79 * changes, hence will we check modeset changes again. 80 */ 81 ret = drm_atomic_helper_check_modeset(dev, state); 82 if (ret) 83 return ret; 84 85 return ret; 86 } 87 88 static const struct drm_mode_config_funcs mode_config_funcs = { 89 .fb_create = drm_gem_fb_create, 90 .atomic_check = tilcdc_atomic_check, 91 .atomic_commit = drm_atomic_helper_commit, 92 }; 93 94 static void modeset_init(struct drm_device *dev) 95 { 96 struct tilcdc_drm_private *priv = dev->dev_private; 97 struct tilcdc_module *mod; 98 99 list_for_each_entry(mod, &module_list, list) { 100 DBG("loading module: %s", mod->name); 101 mod->funcs->modeset_init(mod, dev); 102 } 103 104 dev->mode_config.min_width = 0; 105 dev->mode_config.min_height = 0; 106 dev->mode_config.max_width = priv->max_width; 107 dev->mode_config.max_height = 2048; 108 dev->mode_config.funcs = &mode_config_funcs; 109 } 110 111 #ifdef CONFIG_CPU_FREQ 112 static int cpufreq_transition(struct notifier_block *nb, 113 unsigned long val, void *data) 114 { 115 struct tilcdc_drm_private *priv = container_of(nb, 116 struct tilcdc_drm_private, freq_transition); 117 118 if (val == CPUFREQ_POSTCHANGE) 119 tilcdc_crtc_update_clk(priv->crtc); 120 121 return 0; 122 } 123 #endif 124 125 static irqreturn_t tilcdc_irq(int irq, void *arg) 126 { 127 struct drm_device *dev = arg; 128 struct tilcdc_drm_private *priv = dev->dev_private; 129 130 return tilcdc_crtc_irq(priv->crtc); 131 } 132 133 static int tilcdc_irq_install(struct drm_device *dev, unsigned int irq) 134 { 135 struct tilcdc_drm_private *priv = dev->dev_private; 136 int ret; 137 138 ret = request_irq(irq, tilcdc_irq, 0, dev->driver->name, dev); 139 if (ret) 140 return ret; 141 142 priv->irq_enabled = true; 143 144 return 0; 145 } 146 147 static void tilcdc_irq_uninstall(struct drm_device *dev) 148 { 149 struct tilcdc_drm_private *priv = dev->dev_private; 150 151 if (!priv->irq_enabled) 152 return; 153 154 free_irq(priv->irq, dev); 155 priv->irq_enabled = false; 156 } 157 158 /* 159 * DRM operations: 160 */ 161 162 static void tilcdc_fini(struct drm_device *dev) 163 { 164 struct tilcdc_drm_private *priv = dev->dev_private; 165 166 #ifdef CONFIG_CPU_FREQ 167 if (priv->freq_transition.notifier_call) 168 cpufreq_unregister_notifier(&priv->freq_transition, 169 CPUFREQ_TRANSITION_NOTIFIER); 170 #endif 171 172 if (priv->crtc) 173 tilcdc_crtc_shutdown(priv->crtc); 174 175 if (priv->is_registered) 176 drm_dev_unregister(dev); 177 178 drm_kms_helper_poll_fini(dev); 179 drm_atomic_helper_shutdown(dev); 180 tilcdc_irq_uninstall(dev); 181 drm_mode_config_cleanup(dev); 182 183 if (priv->clk) 184 clk_put(priv->clk); 185 186 if (priv->wq) 187 destroy_workqueue(priv->wq); 188 189 dev->dev_private = NULL; 190 191 pm_runtime_disable(dev->dev); 192 193 drm_dev_put(dev); 194 } 195 196 static int tilcdc_init(const struct drm_driver *ddrv, struct device *dev) 197 { 198 struct drm_device *ddev; 199 struct platform_device *pdev = to_platform_device(dev); 200 struct device_node *node = dev->of_node; 201 struct tilcdc_drm_private *priv; 202 u32 bpp = 0; 203 int ret; 204 205 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 206 if (!priv) 207 return -ENOMEM; 208 209 ddev = drm_dev_alloc(ddrv, dev); 210 if (IS_ERR(ddev)) 211 return PTR_ERR(ddev); 212 213 ddev->dev_private = priv; 214 platform_set_drvdata(pdev, ddev); 215 drm_mode_config_init(ddev); 216 217 priv->is_componentized = 218 tilcdc_get_external_components(dev, NULL) > 0; 219 220 priv->wq = alloc_ordered_workqueue("tilcdc", 0); 221 if (!priv->wq) { 222 ret = -ENOMEM; 223 goto init_failed; 224 } 225 226 priv->mmio = devm_platform_ioremap_resource(pdev, 0); 227 if (IS_ERR(priv->mmio)) { 228 dev_err(dev, "failed to request / ioremap\n"); 229 ret = PTR_ERR(priv->mmio); 230 goto init_failed; 231 } 232 233 priv->clk = clk_get(dev, "fck"); 234 if (IS_ERR(priv->clk)) { 235 dev_err(dev, "failed to get functional clock\n"); 236 ret = -ENODEV; 237 goto init_failed; 238 } 239 240 pm_runtime_enable(dev); 241 242 /* Determine LCD IP Version */ 243 pm_runtime_get_sync(dev); 244 switch (tilcdc_read(ddev, LCDC_PID_REG)) { 245 case 0x4c100102: 246 priv->rev = 1; 247 break; 248 case 0x4f200800: 249 case 0x4f201000: 250 priv->rev = 2; 251 break; 252 default: 253 dev_warn(dev, "Unknown PID Reg value 0x%08x, " 254 "defaulting to LCD revision 1\n", 255 tilcdc_read(ddev, LCDC_PID_REG)); 256 priv->rev = 1; 257 break; 258 } 259 260 pm_runtime_put_sync(dev); 261 262 if (priv->rev == 1) { 263 DBG("Revision 1 LCDC supports only RGB565 format"); 264 priv->pixelformats = tilcdc_rev1_formats; 265 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats); 266 bpp = 16; 267 } else { 268 const char *str = "\0"; 269 270 of_property_read_string(node, "blue-and-red-wiring", &str); 271 if (0 == strcmp(str, "crossed")) { 272 DBG("Configured for crossed blue and red wires"); 273 priv->pixelformats = tilcdc_crossed_formats; 274 priv->num_pixelformats = 275 ARRAY_SIZE(tilcdc_crossed_formats); 276 bpp = 32; /* Choose bpp with RGB support for fbdef */ 277 } else if (0 == strcmp(str, "straight")) { 278 DBG("Configured for straight blue and red wires"); 279 priv->pixelformats = tilcdc_straight_formats; 280 priv->num_pixelformats = 281 ARRAY_SIZE(tilcdc_straight_formats); 282 bpp = 16; /* Choose bpp with RGB support for fbdef */ 283 } else { 284 DBG("Blue and red wiring '%s' unknown, use legacy mode", 285 str); 286 priv->pixelformats = tilcdc_legacy_formats; 287 priv->num_pixelformats = 288 ARRAY_SIZE(tilcdc_legacy_formats); 289 bpp = 16; /* This is just a guess */ 290 } 291 } 292 293 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth)) 294 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH; 295 296 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); 297 298 if (of_property_read_u32(node, "max-width", &priv->max_width)) { 299 if (priv->rev == 1) 300 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1; 301 else 302 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2; 303 } 304 305 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); 306 307 if (of_property_read_u32(node, "max-pixelclock", 308 &priv->max_pixelclock)) 309 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; 310 311 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); 312 313 ret = tilcdc_crtc_create(ddev); 314 if (ret < 0) { 315 dev_err(dev, "failed to create crtc\n"); 316 goto init_failed; 317 } 318 modeset_init(ddev); 319 320 #ifdef CONFIG_CPU_FREQ 321 priv->freq_transition.notifier_call = cpufreq_transition; 322 ret = cpufreq_register_notifier(&priv->freq_transition, 323 CPUFREQ_TRANSITION_NOTIFIER); 324 if (ret) { 325 dev_err(dev, "failed to register cpufreq notifier\n"); 326 priv->freq_transition.notifier_call = NULL; 327 goto init_failed; 328 } 329 #endif 330 331 if (priv->is_componentized) { 332 ret = component_bind_all(dev, ddev); 333 if (ret < 0) 334 goto init_failed; 335 336 ret = tilcdc_add_component_encoder(ddev); 337 if (ret < 0) 338 goto init_failed; 339 } else { 340 ret = tilcdc_attach_external_device(ddev); 341 if (ret) 342 goto init_failed; 343 } 344 345 if (!priv->external_connector && 346 ((priv->num_encoders == 0) || (priv->num_connectors == 0))) { 347 dev_err(dev, "no encoders/connectors found\n"); 348 ret = -EPROBE_DEFER; 349 goto init_failed; 350 } 351 352 ret = drm_vblank_init(ddev, 1); 353 if (ret < 0) { 354 dev_err(dev, "failed to initialize vblank\n"); 355 goto init_failed; 356 } 357 358 ret = platform_get_irq(pdev, 0); 359 if (ret < 0) 360 goto init_failed; 361 priv->irq = ret; 362 363 ret = tilcdc_irq_install(ddev, priv->irq); 364 if (ret < 0) { 365 dev_err(dev, "failed to install IRQ handler\n"); 366 goto init_failed; 367 } 368 369 drm_mode_config_reset(ddev); 370 371 drm_kms_helper_poll_init(ddev); 372 373 ret = drm_dev_register(ddev, 0); 374 if (ret) 375 goto init_failed; 376 priv->is_registered = true; 377 378 drm_client_setup_with_color_mode(ddev, bpp); 379 380 return 0; 381 382 init_failed: 383 tilcdc_fini(ddev); 384 platform_set_drvdata(pdev, NULL); 385 386 return ret; 387 } 388 389 #if defined(CONFIG_DEBUG_FS) 390 static const struct { 391 const char *name; 392 uint8_t rev; 393 uint8_t save; 394 uint32_t reg; 395 } registers[] = { 396 #define REG(rev, save, reg) { #reg, rev, save, reg } 397 /* exists in revision 1: */ 398 REG(1, false, LCDC_PID_REG), 399 REG(1, true, LCDC_CTRL_REG), 400 REG(1, false, LCDC_STAT_REG), 401 REG(1, true, LCDC_RASTER_CTRL_REG), 402 REG(1, true, LCDC_RASTER_TIMING_0_REG), 403 REG(1, true, LCDC_RASTER_TIMING_1_REG), 404 REG(1, true, LCDC_RASTER_TIMING_2_REG), 405 REG(1, true, LCDC_DMA_CTRL_REG), 406 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), 407 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), 408 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), 409 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), 410 /* new in revision 2: */ 411 REG(2, false, LCDC_RAW_STAT_REG), 412 REG(2, false, LCDC_MASKED_STAT_REG), 413 REG(2, true, LCDC_INT_ENABLE_SET_REG), 414 REG(2, false, LCDC_INT_ENABLE_CLR_REG), 415 REG(2, false, LCDC_END_OF_INT_IND_REG), 416 REG(2, true, LCDC_CLK_ENABLE_REG), 417 #undef REG 418 }; 419 420 #endif 421 422 #ifdef CONFIG_DEBUG_FS 423 static int tilcdc_regs_show(struct seq_file *m, void *arg) 424 { 425 struct drm_info_node *node = (struct drm_info_node *) m->private; 426 struct drm_device *dev = node->minor->dev; 427 struct tilcdc_drm_private *priv = dev->dev_private; 428 unsigned i; 429 430 pm_runtime_get_sync(dev->dev); 431 432 seq_printf(m, "revision: %d\n", priv->rev); 433 434 for (i = 0; i < ARRAY_SIZE(registers); i++) 435 if (priv->rev >= registers[i].rev) 436 seq_printf(m, "%s:\t %08x\n", registers[i].name, 437 tilcdc_read(dev, registers[i].reg)); 438 439 pm_runtime_put_sync(dev->dev); 440 441 return 0; 442 } 443 444 static int tilcdc_mm_show(struct seq_file *m, void *arg) 445 { 446 struct drm_info_node *node = (struct drm_info_node *) m->private; 447 struct drm_device *dev = node->minor->dev; 448 struct drm_printer p = drm_seq_file_printer(m); 449 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 450 return 0; 451 } 452 453 static struct drm_info_list tilcdc_debugfs_list[] = { 454 { "regs", tilcdc_regs_show, 0, NULL }, 455 { "mm", tilcdc_mm_show, 0, NULL }, 456 }; 457 458 static void tilcdc_debugfs_init(struct drm_minor *minor) 459 { 460 struct tilcdc_module *mod; 461 462 drm_debugfs_create_files(tilcdc_debugfs_list, 463 ARRAY_SIZE(tilcdc_debugfs_list), 464 minor->debugfs_root, minor); 465 466 list_for_each_entry(mod, &module_list, list) 467 if (mod->funcs->debugfs_init) 468 mod->funcs->debugfs_init(mod, minor); 469 } 470 #endif 471 472 DEFINE_DRM_GEM_DMA_FOPS(fops); 473 474 static const struct drm_driver tilcdc_driver = { 475 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 476 DRM_GEM_DMA_DRIVER_OPS, 477 DRM_FBDEV_DMA_DRIVER_OPS, 478 #ifdef CONFIG_DEBUG_FS 479 .debugfs_init = tilcdc_debugfs_init, 480 #endif 481 .fops = &fops, 482 .name = "tilcdc", 483 .desc = "TI LCD Controller DRM", 484 .date = "20121205", 485 .major = 1, 486 .minor = 0, 487 }; 488 489 /* 490 * Power management: 491 */ 492 493 static int tilcdc_pm_suspend(struct device *dev) 494 { 495 struct drm_device *ddev = dev_get_drvdata(dev); 496 int ret = 0; 497 498 ret = drm_mode_config_helper_suspend(ddev); 499 500 /* Select sleep pin state */ 501 pinctrl_pm_select_sleep_state(dev); 502 503 return ret; 504 } 505 506 static int tilcdc_pm_resume(struct device *dev) 507 { 508 struct drm_device *ddev = dev_get_drvdata(dev); 509 510 /* Select default pin state */ 511 pinctrl_pm_select_default_state(dev); 512 return drm_mode_config_helper_resume(ddev); 513 } 514 515 static DEFINE_SIMPLE_DEV_PM_OPS(tilcdc_pm_ops, 516 tilcdc_pm_suspend, tilcdc_pm_resume); 517 518 /* 519 * Platform driver: 520 */ 521 static int tilcdc_bind(struct device *dev) 522 { 523 return tilcdc_init(&tilcdc_driver, dev); 524 } 525 526 static void tilcdc_unbind(struct device *dev) 527 { 528 struct drm_device *ddev = dev_get_drvdata(dev); 529 530 /* Check if a subcomponent has already triggered the unloading. */ 531 if (!ddev->dev_private) 532 return; 533 534 tilcdc_fini(ddev); 535 dev_set_drvdata(dev, NULL); 536 } 537 538 static const struct component_master_ops tilcdc_comp_ops = { 539 .bind = tilcdc_bind, 540 .unbind = tilcdc_unbind, 541 }; 542 543 static int tilcdc_pdev_probe(struct platform_device *pdev) 544 { 545 struct component_match *match = NULL; 546 int ret; 547 548 /* bail out early if no DT data: */ 549 if (!pdev->dev.of_node) { 550 dev_err(&pdev->dev, "device-tree data is missing\n"); 551 return -ENXIO; 552 } 553 554 ret = tilcdc_get_external_components(&pdev->dev, &match); 555 if (ret < 0) 556 return ret; 557 else if (ret == 0) 558 return tilcdc_init(&tilcdc_driver, &pdev->dev); 559 else 560 return component_master_add_with_match(&pdev->dev, 561 &tilcdc_comp_ops, 562 match); 563 } 564 565 static void tilcdc_pdev_remove(struct platform_device *pdev) 566 { 567 int ret; 568 569 ret = tilcdc_get_external_components(&pdev->dev, NULL); 570 if (ret < 0) 571 dev_err(&pdev->dev, "tilcdc_get_external_components() failed (%pe)\n", 572 ERR_PTR(ret)); 573 else if (ret == 0) 574 tilcdc_fini(platform_get_drvdata(pdev)); 575 else 576 component_master_del(&pdev->dev, &tilcdc_comp_ops); 577 } 578 579 static void tilcdc_pdev_shutdown(struct platform_device *pdev) 580 { 581 drm_atomic_helper_shutdown(platform_get_drvdata(pdev)); 582 } 583 584 static const struct of_device_id tilcdc_of_match[] = { 585 { .compatible = "ti,am33xx-tilcdc", }, 586 { .compatible = "ti,da850-tilcdc", }, 587 { }, 588 }; 589 MODULE_DEVICE_TABLE(of, tilcdc_of_match); 590 591 static struct platform_driver tilcdc_platform_driver = { 592 .probe = tilcdc_pdev_probe, 593 .remove_new = tilcdc_pdev_remove, 594 .shutdown = tilcdc_pdev_shutdown, 595 .driver = { 596 .name = "tilcdc", 597 .pm = pm_sleep_ptr(&tilcdc_pm_ops), 598 .of_match_table = tilcdc_of_match, 599 }, 600 }; 601 602 static int __init tilcdc_drm_init(void) 603 { 604 if (drm_firmware_drivers_only()) 605 return -ENODEV; 606 607 DBG("init"); 608 tilcdc_panel_init(); 609 return platform_driver_register(&tilcdc_platform_driver); 610 } 611 612 static void __exit tilcdc_drm_fini(void) 613 { 614 DBG("fini"); 615 platform_driver_unregister(&tilcdc_platform_driver); 616 tilcdc_panel_fini(); 617 } 618 619 module_init(tilcdc_drm_init); 620 module_exit(tilcdc_drm_fini); 621 622 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 623 MODULE_DESCRIPTION("TI LCD Controller DRM Driver"); 624 MODULE_LICENSE("GPL"); 625