1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Texas Instruments 4 * Author: Rob Clark <robdclark@gmail.com> 5 */ 6 7 /* LCDC DRM driver, based on da8xx-fb */ 8 9 #include <linux/pinctrl/consumer.h> 10 #include <linux/platform_device.h> 11 #include <linux/pm_runtime.h> 12 13 #include <drm/clients/drm_client_setup.h> 14 #include <drm/drm_atomic_helper.h> 15 #include <drm/drm_debugfs.h> 16 #include <drm/drm_drv.h> 17 #include <drm/drm_fbdev_dma.h> 18 #include <drm/drm_fourcc.h> 19 #include <drm/drm_gem_dma_helper.h> 20 #include <drm/drm_gem_framebuffer_helper.h> 21 #include <drm/drm_mm.h> 22 #include <drm/drm_module.h> 23 #include <drm/drm_probe_helper.h> 24 #include <drm/drm_vblank.h> 25 26 27 #include "tilcdc_drv.h" 28 #include "tilcdc_encoder.h" 29 #include "tilcdc_regs.h" 30 31 enum tilcdc_variant { 32 AM33XX_TILCDC, 33 DA850_TILCDC, 34 }; 35 36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 }; 37 38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565, 39 DRM_FORMAT_BGR888, 40 DRM_FORMAT_XBGR8888 }; 41 42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, 43 DRM_FORMAT_RGB888, 44 DRM_FORMAT_XRGB8888 }; 45 46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565, 47 DRM_FORMAT_RGB888, 48 DRM_FORMAT_XRGB8888 }; 49 50 static int tilcdc_atomic_check(struct drm_device *dev, 51 struct drm_atomic_commit *state) 52 { 53 int ret; 54 55 ret = drm_atomic_helper_check_modeset(dev, state); 56 if (ret) 57 return ret; 58 59 ret = drm_atomic_helper_check_planes(dev, state); 60 if (ret) 61 return ret; 62 63 /* 64 * tilcdc ->atomic_check can update ->mode_changed if pixel format 65 * changes, hence will we check modeset changes again. 66 */ 67 ret = drm_atomic_helper_check_modeset(dev, state); 68 if (ret) 69 return ret; 70 71 return ret; 72 } 73 74 static const struct drm_mode_config_funcs mode_config_funcs = { 75 .fb_create = drm_gem_fb_create, 76 .atomic_check = tilcdc_atomic_check, 77 .atomic_commit = drm_atomic_helper_commit, 78 }; 79 80 static void modeset_init(struct drm_device *dev) 81 { 82 struct tilcdc_drm_private *priv = ddev_to_tilcdc_priv(dev); 83 84 dev->mode_config.min_width = 0; 85 dev->mode_config.min_height = 0; 86 dev->mode_config.max_width = priv->max_width; 87 dev->mode_config.max_height = 2048; 88 dev->mode_config.funcs = &mode_config_funcs; 89 } 90 91 #ifdef CONFIG_CPU_FREQ 92 static int cpufreq_transition(struct notifier_block *nb, 93 unsigned long val, void *data) 94 { 95 struct tilcdc_drm_private *priv = container_of(nb, 96 struct tilcdc_drm_private, freq_transition); 97 98 if (val == CPUFREQ_POSTCHANGE) 99 tilcdc_crtc_update_clk(priv->crtc); 100 101 return 0; 102 } 103 #endif 104 105 static irqreturn_t tilcdc_irq(int irq, void *arg) 106 { 107 struct drm_device *dev = arg; 108 struct tilcdc_drm_private *priv = ddev_to_tilcdc_priv(dev); 109 110 return tilcdc_crtc_irq(priv->crtc); 111 } 112 113 static int tilcdc_irq_install(struct drm_device *dev, unsigned int irq) 114 { 115 struct tilcdc_drm_private *priv = ddev_to_tilcdc_priv(dev); 116 int ret; 117 118 ret = request_irq(irq, tilcdc_irq, 0, dev->driver->name, dev); 119 if (ret) 120 return ret; 121 122 priv->irq_enabled = true; 123 124 return 0; 125 } 126 127 static void tilcdc_irq_uninstall(struct drm_device *dev) 128 { 129 struct tilcdc_drm_private *priv = ddev_to_tilcdc_priv(dev); 130 131 if (!priv->irq_enabled) 132 return; 133 134 free_irq(priv->irq, dev); 135 priv->irq_enabled = false; 136 } 137 138 /* 139 * DRM operations: 140 */ 141 142 #if defined(CONFIG_DEBUG_FS) 143 static const struct { 144 const char *name; 145 uint8_t rev; 146 uint8_t save; 147 uint32_t reg; 148 } registers[] = { 149 #define REG(rev, save, reg) { #reg, rev, save, reg } 150 /* exists in revision 1: */ 151 REG(1, false, LCDC_PID_REG), 152 REG(1, true, LCDC_CTRL_REG), 153 REG(1, false, LCDC_STAT_REG), 154 REG(1, true, LCDC_RASTER_CTRL_REG), 155 REG(1, true, LCDC_RASTER_TIMING_0_REG), 156 REG(1, true, LCDC_RASTER_TIMING_1_REG), 157 REG(1, true, LCDC_RASTER_TIMING_2_REG), 158 REG(1, true, LCDC_DMA_CTRL_REG), 159 REG(1, true, LCDC_DMA_FB_BASE_ADDR_0_REG), 160 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_0_REG), 161 REG(1, true, LCDC_DMA_FB_BASE_ADDR_1_REG), 162 REG(1, true, LCDC_DMA_FB_CEILING_ADDR_1_REG), 163 /* new in revision 2: */ 164 REG(2, false, LCDC_RAW_STAT_REG), 165 REG(2, false, LCDC_MASKED_STAT_REG), 166 REG(2, true, LCDC_INT_ENABLE_SET_REG), 167 REG(2, false, LCDC_INT_ENABLE_CLR_REG), 168 REG(2, false, LCDC_END_OF_INT_IND_REG), 169 REG(2, true, LCDC_CLK_ENABLE_REG), 170 #undef REG 171 }; 172 173 static int tilcdc_regs_show(struct seq_file *m, void *arg) 174 { 175 struct drm_info_node *node = (struct drm_info_node *) m->private; 176 struct drm_device *dev = node->minor->dev; 177 struct tilcdc_drm_private *priv = ddev_to_tilcdc_priv(dev); 178 unsigned i; 179 180 pm_runtime_get_sync(dev->dev); 181 182 seq_printf(m, "revision: %d\n", priv->rev); 183 184 for (i = 0; i < ARRAY_SIZE(registers); i++) 185 if (priv->rev >= registers[i].rev) 186 seq_printf(m, "%s:\t %08x\n", registers[i].name, 187 tilcdc_read(dev, registers[i].reg)); 188 189 pm_runtime_put_sync(dev->dev); 190 191 return 0; 192 } 193 194 static int tilcdc_mm_show(struct seq_file *m, void *arg) 195 { 196 struct drm_info_node *node = (struct drm_info_node *) m->private; 197 struct drm_device *dev = node->minor->dev; 198 struct drm_printer p = drm_seq_file_printer(m); 199 drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p); 200 return 0; 201 } 202 203 static struct drm_info_list tilcdc_debugfs_list[] = { 204 { "regs", tilcdc_regs_show, 0, NULL }, 205 { "mm", tilcdc_mm_show, 0, NULL }, 206 }; 207 208 static void tilcdc_debugfs_init(struct drm_minor *minor) 209 { 210 drm_debugfs_create_files(tilcdc_debugfs_list, 211 ARRAY_SIZE(tilcdc_debugfs_list), 212 minor->debugfs_root, minor); 213 } 214 #endif 215 216 DEFINE_DRM_GEM_DMA_FOPS(fops); 217 218 static const struct drm_driver tilcdc_driver = { 219 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 220 DRM_GEM_DMA_DRIVER_OPS, 221 DRM_FBDEV_DMA_DRIVER_OPS, 222 #ifdef CONFIG_DEBUG_FS 223 .debugfs_init = tilcdc_debugfs_init, 224 #endif 225 .fops = &fops, 226 .name = "tilcdc", 227 .desc = "TI LCD Controller DRM", 228 .major = 1, 229 .minor = 0, 230 }; 231 232 /* 233 * Power management: 234 */ 235 236 static int tilcdc_pm_suspend(struct device *dev) 237 { 238 struct drm_device *ddev = dev_get_drvdata(dev); 239 int ret = 0; 240 241 ret = drm_mode_config_helper_suspend(ddev); 242 243 /* Select sleep pin state */ 244 pinctrl_pm_select_sleep_state(dev); 245 246 return ret; 247 } 248 249 static int tilcdc_pm_resume(struct device *dev) 250 { 251 struct drm_device *ddev = dev_get_drvdata(dev); 252 253 /* Select default pin state */ 254 pinctrl_pm_select_default_state(dev); 255 return drm_mode_config_helper_resume(ddev); 256 } 257 258 static DEFINE_SIMPLE_DEV_PM_OPS(tilcdc_pm_ops, 259 tilcdc_pm_suspend, tilcdc_pm_resume); 260 261 static int tilcdc_pdev_probe(struct platform_device *pdev) 262 { 263 struct device_node *node = pdev->dev.of_node; 264 struct tilcdc_drm_private *priv; 265 struct device *dev = &pdev->dev; 266 enum tilcdc_variant variant; 267 struct drm_device *ddev; 268 u32 bpp = 0; 269 int ret; 270 271 priv = devm_drm_dev_alloc(dev, &tilcdc_driver, 272 struct tilcdc_drm_private, ddev); 273 if (IS_ERR(priv)) 274 return PTR_ERR(priv); 275 276 variant = (uintptr_t)of_device_get_match_data(dev); 277 278 platform_set_drvdata(pdev, priv); 279 ddev = &priv->ddev; 280 ret = drmm_mode_config_init(ddev); 281 if (ret) 282 return ret; 283 284 priv->wq = alloc_ordered_workqueue("tilcdc", 0); 285 if (!priv->wq) 286 return -ENOMEM; 287 288 priv->mmio = devm_platform_ioremap_resource(pdev, 0); 289 if (IS_ERR(priv->mmio)) { 290 drm_err(ddev, "failed to request / ioremap\n"); 291 ret = PTR_ERR(priv->mmio); 292 goto free_wq; 293 } 294 295 priv->clk = clk_get(dev, "fck"); 296 if (IS_ERR(priv->clk)) { 297 drm_err(ddev, "failed to get functional clock\n"); 298 ret = -ENODEV; 299 goto free_wq; 300 } 301 302 pm_runtime_enable(dev); 303 304 /* Determine LCD IP Version */ 305 pm_runtime_get_sync(dev); 306 switch (tilcdc_read(ddev, LCDC_PID_REG)) { 307 case 0x4c100102: 308 priv->rev = 1; 309 break; 310 case 0x4f200800: 311 case 0x4f201000: 312 priv->rev = 2; 313 break; 314 default: 315 drm_warn(ddev, "Unknown PID Reg value 0x%08x, " 316 "defaulting to LCD revision 1\n", 317 tilcdc_read(ddev, LCDC_PID_REG)); 318 priv->rev = 1; 319 break; 320 } 321 322 pm_runtime_put_sync(dev); 323 324 if (priv->rev == 1) { 325 DBG("Revision 1 LCDC supports only RGB565 format"); 326 priv->pixelformats = tilcdc_rev1_formats; 327 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats); 328 bpp = 16; 329 } else { 330 const char *str = "\0"; 331 332 of_property_read_string(node, "blue-and-red-wiring", &str); 333 if (0 == strcmp(str, "crossed")) { 334 DBG("Configured for crossed blue and red wires"); 335 priv->pixelformats = tilcdc_crossed_formats; 336 priv->num_pixelformats = 337 ARRAY_SIZE(tilcdc_crossed_formats); 338 bpp = 32; /* Choose bpp with RGB support for fbdef */ 339 } else if (0 == strcmp(str, "straight")) { 340 DBG("Configured for straight blue and red wires"); 341 priv->pixelformats = tilcdc_straight_formats; 342 priv->num_pixelformats = 343 ARRAY_SIZE(tilcdc_straight_formats); 344 bpp = 16; /* Choose bpp with RGB support for fbdef */ 345 } else { 346 DBG("Blue and red wiring '%s' unknown, use legacy mode", 347 str); 348 priv->pixelformats = tilcdc_legacy_formats; 349 priv->num_pixelformats = 350 ARRAY_SIZE(tilcdc_legacy_formats); 351 bpp = 16; /* This is just a guess */ 352 } 353 } 354 355 if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth)) 356 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH; 357 358 DBG("Maximum Bandwidth Value %d", priv->max_bandwidth); 359 360 if (of_property_read_u32(node, "max-width", &priv->max_width)) { 361 if (priv->rev == 1) 362 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V1; 363 else 364 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH_V2; 365 } 366 367 DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width); 368 369 if (of_property_read_u32(node, "max-pixelclock", 370 &priv->max_pixelclock)) 371 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK; 372 373 DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock); 374 375 if (variant == DA850_TILCDC) 376 priv->fifo_th = 16; 377 else 378 priv->fifo_th = 8; 379 380 ret = tilcdc_crtc_create(ddev); 381 if (ret < 0) { 382 drm_err(ddev, "failed to create crtc\n"); 383 goto disable_pm; 384 } 385 modeset_init(ddev); 386 387 #ifdef CONFIG_CPU_FREQ 388 priv->freq_transition.notifier_call = cpufreq_transition; 389 ret = cpufreq_register_notifier(&priv->freq_transition, 390 CPUFREQ_TRANSITION_NOTIFIER); 391 if (ret) { 392 drm_err(ddev, "failed to register cpufreq notifier\n"); 393 priv->freq_transition.notifier_call = NULL; 394 goto disable_pm; 395 } 396 #endif 397 398 ret = tilcdc_encoder_create(ddev); 399 if (ret) 400 goto unregister_cpufreq_notif; 401 402 if (!priv->connector) { 403 drm_err(ddev, "no encoders/connectors found\n"); 404 ret = -EPROBE_DEFER; 405 goto unregister_cpufreq_notif; 406 } 407 408 ret = drm_vblank_init(ddev, 1); 409 if (ret < 0) { 410 drm_err(ddev, "failed to initialize vblank\n"); 411 goto unregister_cpufreq_notif; 412 } 413 414 ret = platform_get_irq(pdev, 0); 415 if (ret < 0) 416 goto unregister_cpufreq_notif; 417 priv->irq = ret; 418 419 ret = tilcdc_irq_install(ddev, priv->irq); 420 if (ret < 0) { 421 drm_err(ddev, "failed to install IRQ handler\n"); 422 goto unregister_cpufreq_notif; 423 } 424 425 drm_mode_config_reset(ddev); 426 427 drm_kms_helper_poll_init(ddev); 428 429 ret = drm_dev_register(ddev, 0); 430 if (ret) 431 goto stop_poll; 432 433 drm_client_setup_with_color_mode(ddev, bpp); 434 435 return 0; 436 437 stop_poll: 438 drm_kms_helper_poll_fini(ddev); 439 tilcdc_irq_uninstall(ddev); 440 unregister_cpufreq_notif: 441 #ifdef CONFIG_CPU_FREQ 442 cpufreq_unregister_notifier(&priv->freq_transition, 443 CPUFREQ_TRANSITION_NOTIFIER); 444 #endif 445 disable_pm: 446 pm_runtime_disable(dev); 447 clk_put(priv->clk); 448 free_wq: 449 destroy_workqueue(priv->wq); 450 451 return ret; 452 } 453 454 static void tilcdc_pdev_remove(struct platform_device *pdev) 455 { 456 struct tilcdc_drm_private *priv = platform_get_drvdata(pdev); 457 struct drm_device *ddev = &priv->ddev; 458 459 drm_dev_unregister(ddev); 460 drm_kms_helper_poll_fini(ddev); 461 tilcdc_irq_uninstall(ddev); 462 #ifdef CONFIG_CPU_FREQ 463 cpufreq_unregister_notifier(&priv->freq_transition, 464 CPUFREQ_TRANSITION_NOTIFIER); 465 #endif 466 pm_runtime_disable(&pdev->dev); 467 clk_put(priv->clk); 468 destroy_workqueue(priv->wq); 469 } 470 471 static void tilcdc_pdev_shutdown(struct platform_device *pdev) 472 { 473 struct tilcdc_drm_private *priv = platform_get_drvdata(pdev); 474 struct drm_device *ddev = &priv->ddev; 475 476 drm_atomic_helper_shutdown(ddev); 477 } 478 479 static const struct of_device_id tilcdc_of_match[] = { 480 { .compatible = "ti,am33xx-tilcdc", .data = (void *)AM33XX_TILCDC}, 481 { .compatible = "ti,da850-tilcdc", .data = (void *)DA850_TILCDC}, 482 { }, 483 }; 484 MODULE_DEVICE_TABLE(of, tilcdc_of_match); 485 486 static struct platform_driver tilcdc_platform_driver = { 487 .probe = tilcdc_pdev_probe, 488 .remove = tilcdc_pdev_remove, 489 .shutdown = tilcdc_pdev_shutdown, 490 .driver = { 491 .name = "tilcdc", 492 .pm = pm_sleep_ptr(&tilcdc_pm_ops), 493 .of_match_table = tilcdc_of_match, 494 }, 495 }; 496 497 drm_module_platform_driver(tilcdc_platform_driver); 498 499 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com"); 500 MODULE_DESCRIPTION("TI LCD Controller DRM Driver"); 501 MODULE_LICENSE("GPL"); 502