xref: /linux/drivers/gpu/drm/tidss/tidss_plane.h (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
132a1795fSJyri Sarha /* SPDX-License-Identifier: GPL-2.0 */
232a1795fSJyri Sarha /*
3*9410113fSAlexander A. Klimov  * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
432a1795fSJyri Sarha  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
532a1795fSJyri Sarha  */
632a1795fSJyri Sarha 
732a1795fSJyri Sarha #ifndef __TIDSS_PLANE_H__
832a1795fSJyri Sarha #define __TIDSS_PLANE_H__
932a1795fSJyri Sarha 
1032a1795fSJyri Sarha #define to_tidss_plane(p) container_of((p), struct tidss_plane, plane)
1132a1795fSJyri Sarha 
1232a1795fSJyri Sarha struct tidss_device;
1332a1795fSJyri Sarha 
1432a1795fSJyri Sarha struct tidss_plane {
1532a1795fSJyri Sarha 	struct drm_plane plane;
1632a1795fSJyri Sarha 
1732a1795fSJyri Sarha 	u32 hw_plane_id;
1832a1795fSJyri Sarha };
1932a1795fSJyri Sarha 
2032a1795fSJyri Sarha struct tidss_plane *tidss_plane_create(struct tidss_device *tidss,
2132a1795fSJyri Sarha 				       u32 hw_plane_id, u32 plane_type,
2232a1795fSJyri Sarha 				       u32 crtc_mask, const u32 *formats,
2332a1795fSJyri Sarha 				       u32 num_formats);
2432a1795fSJyri Sarha 
2532a1795fSJyri Sarha #endif
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