1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <drm/drm_atomic.h> 8 #include <drm/drm_atomic_helper.h> 9 #include <drm/drm_blend.h> 10 #include <drm/drm_crtc.h> 11 #include <drm/drm_fb_dma_helper.h> 12 #include <drm/drm_fourcc.h> 13 #include <drm/drm_framebuffer.h> 14 #include <drm/drm_gem_atomic_helper.h> 15 16 #include "tidss_crtc.h" 17 #include "tidss_dispc.h" 18 #include "tidss_drv.h" 19 #include "tidss_plane.h" 20 21 void tidss_plane_error_irq(struct drm_plane *plane, u64 irqstatus) 22 { 23 struct tidss_plane *tplane = to_tidss_plane(plane); 24 25 dev_err_ratelimited(plane->dev->dev, "Plane%u underflow (irq %llx)\n", 26 tplane->hw_plane_id, irqstatus); 27 } 28 29 /* drm_plane_helper_funcs */ 30 31 static int tidss_plane_atomic_check(struct drm_plane *plane, 32 struct drm_atomic_state *state) 33 { 34 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 35 plane); 36 struct drm_device *ddev = plane->dev; 37 struct tidss_device *tidss = to_tidss(ddev); 38 struct tidss_plane *tplane = to_tidss_plane(plane); 39 const struct drm_format_info *finfo; 40 struct drm_crtc_state *crtc_state; 41 u32 hw_plane = tplane->hw_plane_id; 42 u32 hw_videoport; 43 int ret; 44 45 dev_dbg(ddev->dev, "%s\n", __func__); 46 47 if (!new_plane_state->crtc) { 48 /* 49 * The visible field is not reset by the DRM core but only 50 * updated by drm_atomic_helper_check_plane_state(), set it 51 * manually. 52 */ 53 new_plane_state->visible = false; 54 return 0; 55 } 56 57 crtc_state = drm_atomic_get_crtc_state(state, 58 new_plane_state->crtc); 59 if (IS_ERR(crtc_state)) 60 return PTR_ERR(crtc_state); 61 62 ret = drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, 63 0, 64 INT_MAX, true, true); 65 if (ret < 0) 66 return ret; 67 68 /* 69 * The HW is only able to start drawing at subpixel boundary 70 * (the two first checks bellow). At the end of a row the HW 71 * can only jump integer number of subpixels forward to the 72 * beginning of the next row. So we can only show picture with 73 * integer subpixel width (the third check). However, after 74 * reaching the end of the drawn picture the drawing starts 75 * again at the absolute memory address where top left corner 76 * position of the drawn picture is (so there is no need to 77 * check for odd height). 78 */ 79 80 finfo = drm_format_info(new_plane_state->fb->format->format); 81 82 if ((new_plane_state->src_x >> 16) % finfo->hsub != 0) { 83 dev_dbg(ddev->dev, 84 "%s: x-position %u not divisible subpixel size %u\n", 85 __func__, (new_plane_state->src_x >> 16), finfo->hsub); 86 return -EINVAL; 87 } 88 89 if ((new_plane_state->src_y >> 16) % finfo->vsub != 0) { 90 dev_dbg(ddev->dev, 91 "%s: y-position %u not divisible subpixel size %u\n", 92 __func__, (new_plane_state->src_y >> 16), finfo->vsub); 93 return -EINVAL; 94 } 95 96 if ((new_plane_state->src_w >> 16) % finfo->hsub != 0) { 97 dev_dbg(ddev->dev, 98 "%s: src width %u not divisible by subpixel size %u\n", 99 __func__, (new_plane_state->src_w >> 16), 100 finfo->hsub); 101 return -EINVAL; 102 } 103 104 if (!new_plane_state->visible) 105 return 0; 106 107 hw_videoport = to_tidss_crtc(new_plane_state->crtc)->hw_videoport; 108 109 ret = dispc_plane_check(tidss->dispc, hw_plane, new_plane_state, 110 hw_videoport); 111 if (ret) 112 return ret; 113 114 return 0; 115 } 116 117 static void tidss_plane_atomic_update(struct drm_plane *plane, 118 struct drm_atomic_state *state) 119 { 120 struct drm_device *ddev = plane->dev; 121 struct tidss_device *tidss = to_tidss(ddev); 122 struct tidss_plane *tplane = to_tidss_plane(plane); 123 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state, 124 plane); 125 u32 hw_videoport; 126 127 dev_dbg(ddev->dev, "%s\n", __func__); 128 129 if (!new_state->visible) { 130 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false); 131 return; 132 } 133 134 hw_videoport = to_tidss_crtc(new_state->crtc)->hw_videoport; 135 136 dispc_plane_setup(tidss->dispc, tplane->hw_plane_id, new_state, hw_videoport); 137 } 138 139 static void tidss_plane_atomic_enable(struct drm_plane *plane, 140 struct drm_atomic_state *state) 141 { 142 struct drm_device *ddev = plane->dev; 143 struct tidss_device *tidss = to_tidss(ddev); 144 struct tidss_plane *tplane = to_tidss_plane(plane); 145 146 dev_dbg(ddev->dev, "%s\n", __func__); 147 148 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, true); 149 } 150 151 static void tidss_plane_atomic_disable(struct drm_plane *plane, 152 struct drm_atomic_state *state) 153 { 154 struct drm_device *ddev = plane->dev; 155 struct tidss_device *tidss = to_tidss(ddev); 156 struct tidss_plane *tplane = to_tidss_plane(plane); 157 158 dev_dbg(ddev->dev, "%s\n", __func__); 159 160 dispc_plane_enable(tidss->dispc, tplane->hw_plane_id, false); 161 } 162 163 static void drm_plane_destroy(struct drm_plane *plane) 164 { 165 struct tidss_plane *tplane = to_tidss_plane(plane); 166 167 drm_plane_cleanup(plane); 168 kfree(tplane); 169 } 170 171 static const struct drm_plane_helper_funcs tidss_plane_helper_funcs = { 172 .atomic_check = tidss_plane_atomic_check, 173 .atomic_update = tidss_plane_atomic_update, 174 .atomic_enable = tidss_plane_atomic_enable, 175 .atomic_disable = tidss_plane_atomic_disable, 176 }; 177 178 static const struct drm_plane_helper_funcs tidss_primary_plane_helper_funcs = { 179 .atomic_check = tidss_plane_atomic_check, 180 .atomic_update = tidss_plane_atomic_update, 181 .atomic_enable = tidss_plane_atomic_enable, 182 .atomic_disable = tidss_plane_atomic_disable, 183 .get_scanout_buffer = drm_fb_dma_get_scanout_buffer, 184 }; 185 186 static const struct drm_plane_funcs tidss_plane_funcs = { 187 .update_plane = drm_atomic_helper_update_plane, 188 .disable_plane = drm_atomic_helper_disable_plane, 189 .reset = drm_atomic_helper_plane_reset, 190 .destroy = drm_plane_destroy, 191 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 192 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 193 }; 194 195 struct tidss_plane *tidss_plane_create(struct tidss_device *tidss, 196 u32 hw_plane_id, u32 plane_type, 197 u32 crtc_mask, const u32 *formats, 198 u32 num_formats) 199 { 200 struct tidss_plane *tplane; 201 enum drm_plane_type type; 202 u32 possible_crtcs; 203 u32 num_planes = tidss->feat->num_planes; 204 u32 color_encodings = (BIT(DRM_COLOR_YCBCR_BT601) | 205 BIT(DRM_COLOR_YCBCR_BT709)); 206 u32 color_ranges = (BIT(DRM_COLOR_YCBCR_FULL_RANGE) | 207 BIT(DRM_COLOR_YCBCR_LIMITED_RANGE)); 208 u32 default_encoding = DRM_COLOR_YCBCR_BT601; 209 u32 default_range = DRM_COLOR_YCBCR_FULL_RANGE; 210 u32 blend_modes = (BIT(DRM_MODE_BLEND_PREMULTI) | 211 BIT(DRM_MODE_BLEND_COVERAGE)); 212 int ret; 213 214 tplane = kzalloc(sizeof(*tplane), GFP_KERNEL); 215 if (!tplane) 216 return ERR_PTR(-ENOMEM); 217 218 tplane->hw_plane_id = hw_plane_id; 219 220 possible_crtcs = crtc_mask; 221 type = plane_type; 222 223 ret = drm_universal_plane_init(&tidss->ddev, &tplane->plane, 224 possible_crtcs, 225 &tidss_plane_funcs, 226 formats, num_formats, 227 NULL, type, NULL); 228 if (ret < 0) 229 goto err; 230 231 if (type == DRM_PLANE_TYPE_PRIMARY) 232 drm_plane_helper_add(&tplane->plane, &tidss_primary_plane_helper_funcs); 233 else 234 drm_plane_helper_add(&tplane->plane, &tidss_plane_helper_funcs); 235 236 drm_plane_create_zpos_property(&tplane->plane, tidss->num_planes, 0, 237 num_planes - 1); 238 239 ret = drm_plane_create_color_properties(&tplane->plane, 240 color_encodings, 241 color_ranges, 242 default_encoding, 243 default_range); 244 if (ret) 245 goto err; 246 247 ret = drm_plane_create_alpha_property(&tplane->plane); 248 if (ret) 249 goto err; 250 251 ret = drm_plane_create_blend_mode_property(&tplane->plane, blend_modes); 252 if (ret) 253 goto err; 254 255 return tplane; 256 257 err: 258 kfree(tplane); 259 return ERR_PTR(ret); 260 } 261