xref: /linux/drivers/gpu/drm/tidss/tidss_irq.h (revision e7d759f31ca295d589f7420719c311870bb3166f)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/
4  * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
5  */
6 
7 #ifndef __TIDSS_IRQ_H__
8 #define __TIDSS_IRQ_H__
9 
10 #include <linux/types.h>
11 
12 #include "tidss_drv.h"
13 
14 /*
15  * The IRQ status from various DISPC IRQ registers are packed into a single
16  * value, where the bits are defined as follows:
17  *
18  * bit group |dev|wb |mrg0|mrg1|mrg2|mrg3|plane0-3| <unused> |
19  * bit use   |D  |fou|FEOL|FEOL|FEOL|FEOL|  UUUU  |          |
20  * bit number|0  |1-3|4-7 |8-11|  12-19  | 20-23  |  24-31   |
21  *
22  * device bits:	D = OCP error
23  * WB bits:	f = frame done wb, o = wb buffer overflow,
24  *		u = wb buffer uncomplete
25  * vp bits:	F = frame done, E = vsync even, O = vsync odd, L = sync lost
26  * plane bits:	U = fifo underflow
27  */
28 
29 #define DSS_IRQ_DEVICE_OCP_ERR			BIT(0)
30 
31 #define DSS_IRQ_DEVICE_FRAMEDONEWB		BIT(1)
32 #define DSS_IRQ_DEVICE_WBBUFFEROVERFLOW		BIT(2)
33 #define DSS_IRQ_DEVICE_WBUNCOMPLETEERROR	BIT(3)
34 #define DSS_IRQ_DEVICE_WB_MASK			GENMASK(3, 1)
35 
36 #define DSS_IRQ_VP_BIT_N(ch, bit)	(4 + 4 * (ch) + (bit))
37 #define DSS_IRQ_PLANE_BIT_N(plane, bit) \
38 	(DSS_IRQ_VP_BIT_N(TIDSS_MAX_PORTS, 0) + 1 * (plane) + (bit))
39 
40 #define DSS_IRQ_VP_BIT(ch, bit)	BIT(DSS_IRQ_VP_BIT_N((ch), (bit)))
41 #define DSS_IRQ_PLANE_BIT(plane, bit) \
42 	BIT(DSS_IRQ_PLANE_BIT_N((plane), (bit)))
43 
44 static inline dispc_irq_t DSS_IRQ_VP_MASK(u32 ch)
45 {
46 	return GENMASK(DSS_IRQ_VP_BIT_N((ch), 3), DSS_IRQ_VP_BIT_N((ch), 0));
47 }
48 
49 static inline dispc_irq_t DSS_IRQ_PLANE_MASK(u32 plane)
50 {
51 	return GENMASK(DSS_IRQ_PLANE_BIT_N((plane), 0),
52 		       DSS_IRQ_PLANE_BIT_N((plane), 0));
53 }
54 
55 #define DSS_IRQ_VP_FRAME_DONE(ch)	DSS_IRQ_VP_BIT((ch), 0)
56 #define DSS_IRQ_VP_VSYNC_EVEN(ch)	DSS_IRQ_VP_BIT((ch), 1)
57 #define DSS_IRQ_VP_VSYNC_ODD(ch)	DSS_IRQ_VP_BIT((ch), 2)
58 #define DSS_IRQ_VP_SYNC_LOST(ch)	DSS_IRQ_VP_BIT((ch), 3)
59 
60 #define DSS_IRQ_PLANE_FIFO_UNDERFLOW(plane)	DSS_IRQ_PLANE_BIT((plane), 0)
61 
62 struct drm_crtc;
63 struct drm_device;
64 
65 struct tidss_device;
66 
67 void tidss_irq_enable_vblank(struct drm_crtc *crtc);
68 void tidss_irq_disable_vblank(struct drm_crtc *crtc);
69 
70 int tidss_irq_install(struct drm_device *ddev, unsigned int irq);
71 void tidss_irq_uninstall(struct drm_device *ddev);
72 
73 void tidss_irq_resume(struct tidss_device *tidss);
74 
75 #endif
76