132a1795fSJyri Sarha /* SPDX-License-Identifier: GPL-2.0 */ 232a1795fSJyri Sarha /* 39410113fSAlexander A. Klimov * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 432a1795fSJyri Sarha * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 532a1795fSJyri Sarha */ 632a1795fSJyri Sarha 732a1795fSJyri Sarha #ifndef __TIDSS_DRV_H__ 832a1795fSJyri Sarha #define __TIDSS_DRV_H__ 932a1795fSJyri Sarha 1032a1795fSJyri Sarha #include <linux/spinlock.h> 1132a1795fSJyri Sarha 1232a1795fSJyri Sarha #define TIDSS_MAX_PORTS 4 1332a1795fSJyri Sarha #define TIDSS_MAX_PLANES 4 1432a1795fSJyri Sarha 1532a1795fSJyri Sarha typedef u32 dispc_irq_t; 1632a1795fSJyri Sarha 1732a1795fSJyri Sarha struct tidss_device { 1832a1795fSJyri Sarha struct drm_device ddev; /* DRM device for DSS */ 1932a1795fSJyri Sarha struct device *dev; /* Underlying DSS device */ 2032a1795fSJyri Sarha 2132a1795fSJyri Sarha const struct dispc_features *feat; 2232a1795fSJyri Sarha struct dispc_device *dispc; 2332a1795fSJyri Sarha 2432a1795fSJyri Sarha unsigned int num_crtcs; 2532a1795fSJyri Sarha struct drm_crtc *crtcs[TIDSS_MAX_PORTS]; 2632a1795fSJyri Sarha 2732a1795fSJyri Sarha unsigned int num_planes; 2832a1795fSJyri Sarha struct drm_plane *planes[TIDSS_MAX_PLANES]; 2932a1795fSJyri Sarha 30*5518572dSThomas Zimmermann unsigned int irq; 31*5518572dSThomas Zimmermann 3232a1795fSJyri Sarha spinlock_t wait_lock; /* protects the irq masks */ 3332a1795fSJyri Sarha dispc_irq_t irq_mask; /* enabled irqs in addition to wait_list */ 3432a1795fSJyri Sarha }; 3532a1795fSJyri Sarha 3602bb1317SDaniel Vetter #define to_tidss(__dev) container_of(__dev, struct tidss_device, ddev) 3702bb1317SDaniel Vetter 3832a1795fSJyri Sarha int tidss_runtime_get(struct tidss_device *tidss); 3932a1795fSJyri Sarha void tidss_runtime_put(struct tidss_device *tidss); 4032a1795fSJyri Sarha 4132a1795fSJyri Sarha #endif 42