1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <drm/drm_atomic.h> 8 #include <drm/drm_atomic_helper.h> 9 #include <drm/drm_crtc.h> 10 #include <drm/drm_gem_dma_helper.h> 11 #include <drm/drm_vblank.h> 12 13 #include "tidss_crtc.h" 14 #include "tidss_dispc.h" 15 #include "tidss_drv.h" 16 #include "tidss_irq.h" 17 #include "tidss_plane.h" 18 19 /* Page flip and frame done IRQs */ 20 21 static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc) 22 { 23 struct drm_device *ddev = tcrtc->crtc.dev; 24 struct tidss_device *tidss = to_tidss(ddev); 25 struct drm_pending_vblank_event *event; 26 unsigned long flags; 27 bool busy; 28 29 spin_lock_irqsave(&ddev->event_lock, flags); 30 31 /* 32 * New settings are taken into use at VFP, and GO bit is cleared at 33 * the same time. This happens before the vertical blank interrupt. 34 * So there is a small change that the driver sets GO bit after VFP, but 35 * before vblank, and we have to check for that case here. 36 */ 37 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport); 38 if (busy) { 39 spin_unlock_irqrestore(&ddev->event_lock, flags); 40 return; 41 } 42 43 event = tcrtc->event; 44 tcrtc->event = NULL; 45 46 if (!event) { 47 spin_unlock_irqrestore(&ddev->event_lock, flags); 48 return; 49 } 50 51 drm_crtc_send_vblank_event(&tcrtc->crtc, event); 52 53 spin_unlock_irqrestore(&ddev->event_lock, flags); 54 55 drm_crtc_vblank_put(&tcrtc->crtc); 56 } 57 58 void tidss_crtc_vblank_irq(struct drm_crtc *crtc) 59 { 60 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 61 62 drm_crtc_handle_vblank(crtc); 63 64 tidss_crtc_finish_page_flip(tcrtc); 65 } 66 67 void tidss_crtc_framedone_irq(struct drm_crtc *crtc) 68 { 69 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 70 71 complete(&tcrtc->framedone_completion); 72 } 73 74 void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus) 75 { 76 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 77 78 dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n", 79 tcrtc->hw_videoport, irqstatus); 80 } 81 82 /* drm_crtc_helper_funcs */ 83 84 static int tidss_crtc_atomic_check(struct drm_crtc *crtc, 85 struct drm_atomic_state *state) 86 { 87 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 88 crtc); 89 struct drm_device *ddev = crtc->dev; 90 struct tidss_device *tidss = to_tidss(ddev); 91 struct dispc_device *dispc = tidss->dispc; 92 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 93 u32 hw_videoport = tcrtc->hw_videoport; 94 struct drm_display_mode *mode; 95 enum drm_mode_status ok; 96 97 if (!crtc_state->enable) 98 return 0; 99 100 mode = &crtc_state->adjusted_mode; 101 102 ok = dispc_vp_mode_valid(dispc, hw_videoport, mode); 103 if (ok != MODE_OK) { 104 drm_dbg(ddev, "%s: bad mode: %ux%u pclk %u kHz\n", 105 __func__, mode->hdisplay, mode->vdisplay, mode->clock); 106 return -EINVAL; 107 } 108 109 if (drm_atomic_crtc_needs_modeset(crtc_state)) 110 drm_mode_set_crtcinfo(mode, 0); 111 112 return dispc_vp_bus_check(dispc, hw_videoport, crtc_state); 113 } 114 115 /* 116 * This needs all affected planes to be present in the atomic 117 * state. The untouched planes are added to the state in 118 * tidss_atomic_check(). 119 */ 120 static void tidss_crtc_position_planes(struct tidss_device *tidss, 121 struct drm_crtc *crtc, 122 struct drm_crtc_state *old_state, 123 bool newmodeset) 124 { 125 struct drm_atomic_state *ostate = old_state->state; 126 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 127 struct drm_crtc_state *cstate = crtc->state; 128 int layer; 129 130 if (!newmodeset && !cstate->zpos_changed && 131 !to_tidss_crtc_state(cstate)->plane_pos_changed) 132 return; 133 134 for (layer = 0; layer < tidss->feat->num_vids ; layer++) { 135 struct drm_plane_state *pstate; 136 struct drm_plane *plane; 137 bool layer_active = false; 138 int i; 139 140 for_each_new_plane_in_state(ostate, plane, pstate, i) { 141 if (pstate->crtc != crtc || !pstate->visible) 142 continue; 143 144 if (pstate->normalized_zpos == layer) { 145 layer_active = true; 146 break; 147 } 148 } 149 150 if (layer_active) { 151 struct tidss_plane *tplane = to_tidss_plane(plane); 152 153 dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id, 154 tcrtc->hw_videoport, 155 pstate->crtc_x, pstate->crtc_y, 156 layer); 157 } 158 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 159 layer_active); 160 } 161 } 162 163 static void tidss_crtc_atomic_flush(struct drm_crtc *crtc, 164 struct drm_atomic_state *state) 165 { 166 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 167 crtc); 168 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 169 struct drm_device *ddev = crtc->dev; 170 struct tidss_device *tidss = to_tidss(ddev); 171 unsigned long flags; 172 173 drm_dbg(ddev, "%s: %s is %sactive, %s modeset, event %p\n", 174 __func__, crtc->name, crtc->state->active ? "" : "not ", 175 drm_atomic_crtc_needs_modeset(crtc->state) ? "needs" : "doesn't need", 176 crtc->state->event); 177 178 /* 179 * Flush CRTC changes with go bit only if new modeset is not 180 * coming, so CRTC is enabled trough out the commit. 181 */ 182 if (drm_atomic_crtc_needs_modeset(crtc->state)) 183 return; 184 185 /* If the GO bit is stuck we better quit here. */ 186 if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport))) 187 return; 188 189 /* We should have event if CRTC is enabled through out this commit. */ 190 if (WARN_ON(!crtc->state->event)) 191 return; 192 193 /* Write vp properties to HW if needed. */ 194 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); 195 196 /* Update plane positions if needed. */ 197 tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); 198 199 WARN_ON(drm_crtc_vblank_get(crtc) != 0); 200 201 spin_lock_irqsave(&ddev->event_lock, flags); 202 dispc_vp_go(tidss->dispc, tcrtc->hw_videoport); 203 204 WARN_ON(tcrtc->event); 205 206 tcrtc->event = crtc->state->event; 207 crtc->state->event = NULL; 208 209 spin_unlock_irqrestore(&ddev->event_lock, flags); 210 } 211 212 static void tidss_crtc_atomic_enable(struct drm_crtc *crtc, 213 struct drm_atomic_state *state) 214 { 215 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, 216 crtc); 217 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 218 struct drm_device *ddev = crtc->dev; 219 struct tidss_device *tidss = to_tidss(ddev); 220 const struct drm_display_mode *mode = &crtc->state->adjusted_mode; 221 unsigned long flags; 222 int r; 223 224 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 225 226 tidss_runtime_get(tidss); 227 228 r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport, 229 mode->crtc_clock * 1000); 230 if (r != 0) 231 return; 232 233 r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport); 234 if (r != 0) 235 return; 236 237 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); 238 tidss_crtc_position_planes(tidss, crtc, old_state, true); 239 240 /* Turn vertical blanking interrupt reporting on. */ 241 drm_crtc_vblank_on(crtc); 242 243 dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state); 244 245 dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state); 246 247 spin_lock_irqsave(&ddev->event_lock, flags); 248 249 if (crtc->state->event) { 250 drm_crtc_send_vblank_event(crtc, crtc->state->event); 251 crtc->state->event = NULL; 252 } 253 254 spin_unlock_irqrestore(&ddev->event_lock, flags); 255 } 256 257 static void tidss_crtc_atomic_disable(struct drm_crtc *crtc, 258 struct drm_atomic_state *state) 259 { 260 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 261 struct drm_device *ddev = crtc->dev; 262 struct tidss_device *tidss = to_tidss(ddev); 263 unsigned long flags; 264 265 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 266 267 reinit_completion(&tcrtc->framedone_completion); 268 269 /* 270 * If a layer is left enabled when the videoport is disabled, and the 271 * vid pipeline that was used for the layer is taken into use on 272 * another videoport, the DSS will report sync lost issues. Disable all 273 * the layers here as a work-around. 274 */ 275 for (u32 layer = 0; layer < tidss->feat->num_vids; layer++) 276 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 277 false); 278 279 dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport); 280 281 if (!wait_for_completion_timeout(&tcrtc->framedone_completion, 282 msecs_to_jiffies(500))) 283 dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d", 284 tcrtc->hw_videoport); 285 286 dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport); 287 288 spin_lock_irqsave(&ddev->event_lock, flags); 289 if (crtc->state->event) { 290 drm_crtc_send_vblank_event(crtc, crtc->state->event); 291 crtc->state->event = NULL; 292 } 293 spin_unlock_irqrestore(&ddev->event_lock, flags); 294 295 drm_crtc_vblank_off(crtc); 296 297 dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport); 298 299 tidss_runtime_put(tidss); 300 } 301 302 static 303 enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc, 304 const struct drm_display_mode *mode) 305 { 306 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 307 struct drm_device *ddev = crtc->dev; 308 struct tidss_device *tidss = to_tidss(ddev); 309 310 return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode); 311 } 312 313 static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = { 314 .atomic_check = tidss_crtc_atomic_check, 315 .atomic_flush = tidss_crtc_atomic_flush, 316 .atomic_enable = tidss_crtc_atomic_enable, 317 .atomic_disable = tidss_crtc_atomic_disable, 318 319 .mode_valid = tidss_crtc_mode_valid, 320 }; 321 322 /* drm_crtc_funcs */ 323 324 static int tidss_crtc_enable_vblank(struct drm_crtc *crtc) 325 { 326 struct drm_device *ddev = crtc->dev; 327 struct tidss_device *tidss = to_tidss(ddev); 328 329 tidss_runtime_get(tidss); 330 331 tidss_irq_enable_vblank(crtc); 332 333 return 0; 334 } 335 336 static void tidss_crtc_disable_vblank(struct drm_crtc *crtc) 337 { 338 struct drm_device *ddev = crtc->dev; 339 struct tidss_device *tidss = to_tidss(ddev); 340 341 tidss_irq_disable_vblank(crtc); 342 343 tidss_runtime_put(tidss); 344 } 345 346 static void tidss_crtc_destroy_state(struct drm_crtc *crtc, 347 struct drm_crtc_state *state) 348 { 349 struct tidss_crtc_state *tstate = to_tidss_crtc_state(state); 350 351 __drm_atomic_helper_crtc_destroy_state(&tstate->base); 352 kfree(tstate); 353 } 354 355 static void tidss_crtc_reset(struct drm_crtc *crtc) 356 { 357 struct tidss_crtc_state *tstate; 358 359 if (crtc->state) 360 tidss_crtc_destroy_state(crtc, crtc->state); 361 362 tstate = kzalloc(sizeof(*tstate), GFP_KERNEL); 363 if (!tstate) { 364 crtc->state = NULL; 365 return; 366 } 367 368 __drm_atomic_helper_crtc_reset(crtc, &tstate->base); 369 } 370 371 static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc) 372 { 373 struct tidss_crtc_state *state, *current_state; 374 375 if (WARN_ON(!crtc->state)) 376 return NULL; 377 378 current_state = to_tidss_crtc_state(crtc->state); 379 380 state = kmalloc(sizeof(*state), GFP_KERNEL); 381 if (!state) 382 return NULL; 383 384 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); 385 386 state->plane_pos_changed = false; 387 388 state->bus_format = current_state->bus_format; 389 state->bus_flags = current_state->bus_flags; 390 391 return &state->base; 392 } 393 394 static void tidss_crtc_destroy(struct drm_crtc *crtc) 395 { 396 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 397 398 drm_crtc_cleanup(crtc); 399 kfree(tcrtc); 400 } 401 402 static const struct drm_crtc_funcs tidss_crtc_funcs = { 403 .reset = tidss_crtc_reset, 404 .destroy = tidss_crtc_destroy, 405 .set_config = drm_atomic_helper_set_config, 406 .page_flip = drm_atomic_helper_page_flip, 407 .atomic_duplicate_state = tidss_crtc_duplicate_state, 408 .atomic_destroy_state = tidss_crtc_destroy_state, 409 .enable_vblank = tidss_crtc_enable_vblank, 410 .disable_vblank = tidss_crtc_disable_vblank, 411 }; 412 413 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, 414 u32 hw_videoport, 415 struct drm_plane *primary) 416 { 417 struct tidss_crtc *tcrtc; 418 struct drm_crtc *crtc; 419 unsigned int gamma_lut_size = 0; 420 bool has_ctm = tidss->feat->vp_feat.color.has_ctm; 421 int ret; 422 423 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 424 if (!tcrtc) 425 return ERR_PTR(-ENOMEM); 426 427 tcrtc->hw_videoport = hw_videoport; 428 init_completion(&tcrtc->framedone_completion); 429 430 crtc = &tcrtc->crtc; 431 432 ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary, 433 NULL, &tidss_crtc_funcs, NULL); 434 if (ret < 0) { 435 kfree(tcrtc); 436 return ERR_PTR(ret); 437 } 438 439 drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs); 440 441 /* 442 * The dispc gamma functions adapt to what ever size we ask 443 * from it no matter what HW supports. X-server assumes 256 444 * element gamma tables so lets use that. 445 */ 446 if (tidss->feat->vp_feat.color.gamma_size) 447 gamma_lut_size = 256; 448 449 drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size); 450 if (gamma_lut_size) 451 drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); 452 453 return tcrtc; 454 } 455