1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <drm/drm_atomic.h> 8 #include <drm/drm_atomic_helper.h> 9 #include <drm/drm_crtc.h> 10 #include <drm/drm_gem_dma_helper.h> 11 #include <drm/drm_print.h> 12 #include <drm/drm_vblank.h> 13 14 #include "tidss_crtc.h" 15 #include "tidss_dispc.h" 16 #include "tidss_drv.h" 17 #include "tidss_irq.h" 18 #include "tidss_plane.h" 19 20 /* Page flip and frame done IRQs */ 21 22 static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc) 23 { 24 struct drm_device *ddev = tcrtc->crtc.dev; 25 struct tidss_device *tidss = to_tidss(ddev); 26 struct drm_pending_vblank_event *event; 27 unsigned long flags; 28 bool busy; 29 30 spin_lock_irqsave(&ddev->event_lock, flags); 31 32 /* 33 * New settings are taken into use at VFP, and GO bit is cleared at 34 * the same time. This happens before the vertical blank interrupt. 35 * So there is a small change that the driver sets GO bit after VFP, but 36 * before vblank, and we have to check for that case here. 37 */ 38 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport); 39 if (busy) { 40 spin_unlock_irqrestore(&ddev->event_lock, flags); 41 return; 42 } 43 44 event = tcrtc->event; 45 tcrtc->event = NULL; 46 47 if (!event) { 48 spin_unlock_irqrestore(&ddev->event_lock, flags); 49 return; 50 } 51 52 drm_crtc_send_vblank_event(&tcrtc->crtc, event); 53 54 spin_unlock_irqrestore(&ddev->event_lock, flags); 55 56 drm_crtc_vblank_put(&tcrtc->crtc); 57 } 58 59 void tidss_crtc_vblank_irq(struct drm_crtc *crtc) 60 { 61 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 62 63 drm_crtc_handle_vblank(crtc); 64 65 tidss_crtc_finish_page_flip(tcrtc); 66 } 67 68 void tidss_crtc_framedone_irq(struct drm_crtc *crtc) 69 { 70 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 71 72 complete(&tcrtc->framedone_completion); 73 } 74 75 void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus) 76 { 77 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 78 79 dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n", 80 tcrtc->hw_videoport, irqstatus); 81 } 82 83 /* drm_crtc_helper_funcs */ 84 85 static int tidss_crtc_atomic_check(struct drm_crtc *crtc, 86 struct drm_atomic_state *state) 87 { 88 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 89 crtc); 90 struct drm_device *ddev = crtc->dev; 91 struct tidss_device *tidss = to_tidss(ddev); 92 struct dispc_device *dispc = tidss->dispc; 93 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 94 u32 hw_videoport = tcrtc->hw_videoport; 95 struct drm_display_mode *mode; 96 enum drm_mode_status ok; 97 98 if (!crtc_state->enable) 99 return 0; 100 101 mode = &crtc_state->adjusted_mode; 102 103 ok = dispc_vp_mode_valid(dispc, hw_videoport, mode); 104 if (ok != MODE_OK) { 105 drm_dbg(ddev, "%s: bad mode: %ux%u pclk %u kHz\n", 106 __func__, mode->hdisplay, mode->vdisplay, mode->clock); 107 return -EINVAL; 108 } 109 110 if (drm_atomic_crtc_needs_modeset(crtc_state)) 111 drm_mode_set_crtcinfo(mode, 0); 112 113 return dispc_vp_bus_check(dispc, hw_videoport, crtc_state); 114 } 115 116 /* 117 * This needs all affected planes to be present in the atomic 118 * state. The untouched planes are added to the state in 119 * tidss_atomic_check(). 120 */ 121 static void tidss_crtc_position_planes(struct tidss_device *tidss, 122 struct drm_crtc *crtc, 123 struct drm_crtc_state *old_state, 124 bool newmodeset) 125 { 126 struct drm_atomic_state *ostate = old_state->state; 127 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 128 struct drm_crtc_state *cstate = crtc->state; 129 int layer; 130 131 if (!newmodeset && !cstate->zpos_changed && 132 !to_tidss_crtc_state(cstate)->plane_pos_changed) 133 return; 134 135 for (layer = 0; layer < tidss->feat->num_vids ; layer++) { 136 struct drm_plane_state *pstate; 137 struct drm_plane *plane; 138 bool layer_active = false; 139 int i; 140 141 for_each_new_plane_in_state(ostate, plane, pstate, i) { 142 if (pstate->crtc != crtc || !pstate->visible) 143 continue; 144 145 if (pstate->normalized_zpos == layer) { 146 layer_active = true; 147 break; 148 } 149 } 150 151 if (layer_active) { 152 struct tidss_plane *tplane = to_tidss_plane(plane); 153 154 dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id, 155 tcrtc->hw_videoport, 156 pstate->crtc_x, pstate->crtc_y, 157 layer); 158 } 159 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 160 layer_active); 161 } 162 } 163 164 static void tidss_crtc_atomic_flush(struct drm_crtc *crtc, 165 struct drm_atomic_state *state) 166 { 167 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 168 crtc); 169 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 170 struct drm_device *ddev = crtc->dev; 171 struct tidss_device *tidss = to_tidss(ddev); 172 unsigned long flags; 173 174 drm_dbg(ddev, "%s: %s is %sactive, %s modeset, event %p\n", 175 __func__, crtc->name, crtc->state->active ? "" : "not ", 176 drm_atomic_crtc_needs_modeset(crtc->state) ? "needs" : "doesn't need", 177 crtc->state->event); 178 179 /* 180 * Flush CRTC changes with go bit only if new modeset is not 181 * coming, so CRTC is enabled trough out the commit. 182 */ 183 if (drm_atomic_crtc_needs_modeset(crtc->state)) 184 return; 185 186 /* If the GO bit is stuck we better quit here. */ 187 if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport))) 188 return; 189 190 /* We should have event if CRTC is enabled through out this commit. */ 191 if (WARN_ON(!crtc->state->event)) 192 return; 193 194 /* Write vp properties to HW if needed. */ 195 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); 196 197 /* Update plane positions if needed. */ 198 tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); 199 200 WARN_ON(drm_crtc_vblank_get(crtc) != 0); 201 202 spin_lock_irqsave(&ddev->event_lock, flags); 203 dispc_vp_go(tidss->dispc, tcrtc->hw_videoport); 204 205 WARN_ON(tcrtc->event); 206 207 tcrtc->event = crtc->state->event; 208 crtc->state->event = NULL; 209 210 spin_unlock_irqrestore(&ddev->event_lock, flags); 211 } 212 213 static void tidss_crtc_atomic_enable(struct drm_crtc *crtc, 214 struct drm_atomic_state *state) 215 { 216 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, 217 crtc); 218 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 219 struct drm_device *ddev = crtc->dev; 220 struct tidss_device *tidss = to_tidss(ddev); 221 const struct drm_display_mode *mode = &crtc->state->adjusted_mode; 222 unsigned long flags; 223 int r; 224 225 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 226 227 tidss_runtime_get(tidss); 228 229 r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport, 230 mode->crtc_clock * 1000); 231 if (r != 0) 232 return; 233 234 r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport); 235 if (r != 0) 236 return; 237 238 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); 239 tidss_crtc_position_planes(tidss, crtc, old_state, true); 240 241 /* Turn vertical blanking interrupt reporting on. */ 242 drm_crtc_vblank_on(crtc); 243 244 dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state); 245 246 spin_lock_irqsave(&ddev->event_lock, flags); 247 248 dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport); 249 250 if (crtc->state->event) { 251 struct drm_vblank_crtc *vblank = drm_crtc_vblank_crtc(crtc); 252 253 vblank->time = ktime_get(); 254 255 drm_crtc_send_vblank_event(crtc, crtc->state->event); 256 crtc->state->event = NULL; 257 } 258 259 spin_unlock_irqrestore(&ddev->event_lock, flags); 260 } 261 262 static void tidss_crtc_atomic_disable(struct drm_crtc *crtc, 263 struct drm_atomic_state *state) 264 { 265 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 266 struct drm_device *ddev = crtc->dev; 267 struct tidss_device *tidss = to_tidss(ddev); 268 unsigned long flags; 269 270 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 271 272 reinit_completion(&tcrtc->framedone_completion); 273 274 /* 275 * If a layer is left enabled when the videoport is disabled, and the 276 * vid pipeline that was used for the layer is taken into use on 277 * another videoport, the DSS will report sync lost issues. Disable all 278 * the layers here as a work-around. 279 */ 280 for (u32 layer = 0; layer < tidss->feat->num_vids; layer++) 281 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 282 false); 283 284 dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport); 285 286 if (!wait_for_completion_timeout(&tcrtc->framedone_completion, 287 msecs_to_jiffies(500))) 288 dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d", 289 tcrtc->hw_videoport); 290 291 dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport); 292 293 spin_lock_irqsave(&ddev->event_lock, flags); 294 if (crtc->state->event) { 295 drm_crtc_send_vblank_event(crtc, crtc->state->event); 296 crtc->state->event = NULL; 297 } 298 spin_unlock_irqrestore(&ddev->event_lock, flags); 299 300 drm_crtc_vblank_off(crtc); 301 302 dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport); 303 304 tidss_runtime_put(tidss); 305 } 306 307 static 308 enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc, 309 const struct drm_display_mode *mode) 310 { 311 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 312 struct drm_device *ddev = crtc->dev; 313 struct tidss_device *tidss = to_tidss(ddev); 314 315 return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode); 316 } 317 318 static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = { 319 .atomic_check = tidss_crtc_atomic_check, 320 .atomic_flush = tidss_crtc_atomic_flush, 321 .atomic_enable = tidss_crtc_atomic_enable, 322 .atomic_disable = tidss_crtc_atomic_disable, 323 324 .mode_valid = tidss_crtc_mode_valid, 325 }; 326 327 /* drm_crtc_funcs */ 328 329 static int tidss_crtc_enable_vblank(struct drm_crtc *crtc) 330 { 331 struct drm_device *ddev = crtc->dev; 332 struct tidss_device *tidss = to_tidss(ddev); 333 334 tidss_runtime_get(tidss); 335 336 tidss_irq_enable_vblank(crtc); 337 338 return 0; 339 } 340 341 static void tidss_crtc_disable_vblank(struct drm_crtc *crtc) 342 { 343 struct drm_device *ddev = crtc->dev; 344 struct tidss_device *tidss = to_tidss(ddev); 345 346 tidss_irq_disable_vblank(crtc); 347 348 tidss_runtime_put(tidss); 349 } 350 351 static void tidss_crtc_destroy_state(struct drm_crtc *crtc, 352 struct drm_crtc_state *state) 353 { 354 struct tidss_crtc_state *tstate = to_tidss_crtc_state(state); 355 356 __drm_atomic_helper_crtc_destroy_state(&tstate->base); 357 kfree(tstate); 358 } 359 360 static void tidss_crtc_reset(struct drm_crtc *crtc) 361 { 362 struct tidss_crtc_state *tstate; 363 364 if (crtc->state) 365 tidss_crtc_destroy_state(crtc, crtc->state); 366 367 tstate = kzalloc(sizeof(*tstate), GFP_KERNEL); 368 if (!tstate) { 369 crtc->state = NULL; 370 return; 371 } 372 373 __drm_atomic_helper_crtc_reset(crtc, &tstate->base); 374 } 375 376 static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc) 377 { 378 struct tidss_crtc_state *state, *current_state; 379 380 if (WARN_ON(!crtc->state)) 381 return NULL; 382 383 current_state = to_tidss_crtc_state(crtc->state); 384 385 state = kmalloc(sizeof(*state), GFP_KERNEL); 386 if (!state) 387 return NULL; 388 389 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); 390 391 state->plane_pos_changed = false; 392 393 state->bus_format = current_state->bus_format; 394 state->bus_flags = current_state->bus_flags; 395 396 return &state->base; 397 } 398 399 static void tidss_crtc_destroy(struct drm_crtc *crtc) 400 { 401 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 402 403 drm_crtc_cleanup(crtc); 404 kfree(tcrtc); 405 } 406 407 static const struct drm_crtc_funcs tidss_crtc_funcs = { 408 .reset = tidss_crtc_reset, 409 .destroy = tidss_crtc_destroy, 410 .set_config = drm_atomic_helper_set_config, 411 .page_flip = drm_atomic_helper_page_flip, 412 .atomic_duplicate_state = tidss_crtc_duplicate_state, 413 .atomic_destroy_state = tidss_crtc_destroy_state, 414 .enable_vblank = tidss_crtc_enable_vblank, 415 .disable_vblank = tidss_crtc_disable_vblank, 416 }; 417 418 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, 419 u32 hw_videoport, 420 struct drm_plane *primary) 421 { 422 struct tidss_crtc *tcrtc; 423 struct drm_crtc *crtc; 424 unsigned int gamma_lut_size = 0; 425 bool has_ctm = tidss->feat->vp_feat.color.has_ctm; 426 int ret; 427 428 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 429 if (!tcrtc) 430 return ERR_PTR(-ENOMEM); 431 432 tcrtc->hw_videoport = hw_videoport; 433 init_completion(&tcrtc->framedone_completion); 434 435 crtc = &tcrtc->crtc; 436 437 ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary, 438 NULL, &tidss_crtc_funcs, NULL); 439 if (ret < 0) { 440 kfree(tcrtc); 441 return ERR_PTR(ret); 442 } 443 444 drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs); 445 446 /* 447 * The dispc gamma functions adapt to what ever size we ask 448 * from it no matter what HW supports. X-server assumes 256 449 * element gamma tables so lets use that. 450 */ 451 if (tidss->feat->vp_feat.color.gamma_size) 452 gamma_lut_size = 256; 453 454 drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size); 455 if (gamma_lut_size) 456 drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); 457 458 return tcrtc; 459 } 460