1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <drm/drm_atomic.h> 8 #include <drm/drm_atomic_helper.h> 9 #include <drm/drm_crtc.h> 10 #include <drm/drm_gem_dma_helper.h> 11 #include <drm/drm_vblank.h> 12 13 #include "tidss_crtc.h" 14 #include "tidss_dispc.h" 15 #include "tidss_drv.h" 16 #include "tidss_irq.h" 17 #include "tidss_plane.h" 18 19 /* Page flip and frame done IRQs */ 20 21 static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc) 22 { 23 struct drm_device *ddev = tcrtc->crtc.dev; 24 struct tidss_device *tidss = to_tidss(ddev); 25 struct drm_pending_vblank_event *event; 26 unsigned long flags; 27 bool busy; 28 29 spin_lock_irqsave(&ddev->event_lock, flags); 30 31 /* 32 * New settings are taken into use at VFP, and GO bit is cleared at 33 * the same time. This happens before the vertical blank interrupt. 34 * So there is a small change that the driver sets GO bit after VFP, but 35 * before vblank, and we have to check for that case here. 36 */ 37 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport); 38 if (busy) { 39 spin_unlock_irqrestore(&ddev->event_lock, flags); 40 return; 41 } 42 43 event = tcrtc->event; 44 tcrtc->event = NULL; 45 46 if (!event) { 47 spin_unlock_irqrestore(&ddev->event_lock, flags); 48 return; 49 } 50 51 drm_crtc_send_vblank_event(&tcrtc->crtc, event); 52 53 spin_unlock_irqrestore(&ddev->event_lock, flags); 54 55 drm_crtc_vblank_put(&tcrtc->crtc); 56 } 57 58 void tidss_crtc_vblank_irq(struct drm_crtc *crtc) 59 { 60 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 61 62 drm_crtc_handle_vblank(crtc); 63 64 tidss_crtc_finish_page_flip(tcrtc); 65 } 66 67 void tidss_crtc_framedone_irq(struct drm_crtc *crtc) 68 { 69 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 70 71 complete(&tcrtc->framedone_completion); 72 } 73 74 void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus) 75 { 76 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 77 78 dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n", 79 tcrtc->hw_videoport, irqstatus); 80 } 81 82 /* drm_crtc_helper_funcs */ 83 84 static int tidss_crtc_atomic_check(struct drm_crtc *crtc, 85 struct drm_atomic_state *state) 86 { 87 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 88 crtc); 89 struct drm_device *ddev = crtc->dev; 90 struct tidss_device *tidss = to_tidss(ddev); 91 struct dispc_device *dispc = tidss->dispc; 92 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 93 u32 hw_videoport = tcrtc->hw_videoport; 94 struct drm_display_mode *mode; 95 enum drm_mode_status ok; 96 97 dev_dbg(ddev->dev, "%s\n", __func__); 98 99 if (!crtc_state->enable) 100 return 0; 101 102 mode = &crtc_state->adjusted_mode; 103 104 ok = dispc_vp_mode_valid(dispc, hw_videoport, mode); 105 if (ok != MODE_OK) { 106 dev_dbg(ddev->dev, "%s: bad mode: %ux%u pclk %u kHz\n", 107 __func__, mode->hdisplay, mode->vdisplay, mode->clock); 108 return -EINVAL; 109 } 110 111 if (drm_atomic_crtc_needs_modeset(crtc_state)) 112 drm_mode_set_crtcinfo(mode, 0); 113 114 return dispc_vp_bus_check(dispc, hw_videoport, crtc_state); 115 } 116 117 /* 118 * This needs all affected planes to be present in the atomic 119 * state. The untouched planes are added to the state in 120 * tidss_atomic_check(). 121 */ 122 static void tidss_crtc_position_planes(struct tidss_device *tidss, 123 struct drm_crtc *crtc, 124 struct drm_crtc_state *old_state, 125 bool newmodeset) 126 { 127 struct drm_atomic_state *ostate = old_state->state; 128 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 129 struct drm_crtc_state *cstate = crtc->state; 130 int layer; 131 132 if (!newmodeset && !cstate->zpos_changed && 133 !to_tidss_crtc_state(cstate)->plane_pos_changed) 134 return; 135 136 for (layer = 0; layer < tidss->feat->num_vids ; layer++) { 137 struct drm_plane_state *pstate; 138 struct drm_plane *plane; 139 bool layer_active = false; 140 int i; 141 142 for_each_new_plane_in_state(ostate, plane, pstate, i) { 143 if (pstate->crtc != crtc || !pstate->visible) 144 continue; 145 146 if (pstate->normalized_zpos == layer) { 147 layer_active = true; 148 break; 149 } 150 } 151 152 if (layer_active) { 153 struct tidss_plane *tplane = to_tidss_plane(plane); 154 155 dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id, 156 tcrtc->hw_videoport, 157 pstate->crtc_x, pstate->crtc_y, 158 layer); 159 } 160 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 161 layer_active); 162 } 163 } 164 165 static void tidss_crtc_atomic_flush(struct drm_crtc *crtc, 166 struct drm_atomic_state *state) 167 { 168 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 169 crtc); 170 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 171 struct drm_device *ddev = crtc->dev; 172 struct tidss_device *tidss = to_tidss(ddev); 173 unsigned long flags; 174 175 dev_dbg(ddev->dev, "%s: %s is %sactive, %s modeset, event %p\n", 176 __func__, crtc->name, crtc->state->active ? "" : "not ", 177 drm_atomic_crtc_needs_modeset(crtc->state) ? "needs" : "doesn't need", 178 crtc->state->event); 179 180 /* 181 * Flush CRTC changes with go bit only if new modeset is not 182 * coming, so CRTC is enabled trough out the commit. 183 */ 184 if (drm_atomic_crtc_needs_modeset(crtc->state)) 185 return; 186 187 /* If the GO bit is stuck we better quit here. */ 188 if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport))) 189 return; 190 191 /* We should have event if CRTC is enabled through out this commit. */ 192 if (WARN_ON(!crtc->state->event)) 193 return; 194 195 /* Write vp properties to HW if needed. */ 196 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); 197 198 /* Update plane positions if needed. */ 199 tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); 200 201 WARN_ON(drm_crtc_vblank_get(crtc) != 0); 202 203 spin_lock_irqsave(&ddev->event_lock, flags); 204 dispc_vp_go(tidss->dispc, tcrtc->hw_videoport); 205 206 WARN_ON(tcrtc->event); 207 208 tcrtc->event = crtc->state->event; 209 crtc->state->event = NULL; 210 211 spin_unlock_irqrestore(&ddev->event_lock, flags); 212 } 213 214 static void tidss_crtc_atomic_enable(struct drm_crtc *crtc, 215 struct drm_atomic_state *state) 216 { 217 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, 218 crtc); 219 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 220 struct drm_device *ddev = crtc->dev; 221 struct tidss_device *tidss = to_tidss(ddev); 222 const struct drm_display_mode *mode = &crtc->state->adjusted_mode; 223 unsigned long flags; 224 int r; 225 226 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 227 228 tidss_runtime_get(tidss); 229 230 r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport, 231 mode->crtc_clock * 1000); 232 if (r != 0) 233 return; 234 235 r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport); 236 if (r != 0) 237 return; 238 239 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); 240 tidss_crtc_position_planes(tidss, crtc, old_state, true); 241 242 /* Turn vertical blanking interrupt reporting on. */ 243 drm_crtc_vblank_on(crtc); 244 245 dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state); 246 247 dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state); 248 249 spin_lock_irqsave(&ddev->event_lock, flags); 250 251 if (crtc->state->event) { 252 drm_crtc_send_vblank_event(crtc, crtc->state->event); 253 crtc->state->event = NULL; 254 } 255 256 spin_unlock_irqrestore(&ddev->event_lock, flags); 257 } 258 259 static void tidss_crtc_atomic_disable(struct drm_crtc *crtc, 260 struct drm_atomic_state *state) 261 { 262 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 263 struct drm_device *ddev = crtc->dev; 264 struct tidss_device *tidss = to_tidss(ddev); 265 unsigned long flags; 266 267 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 268 269 reinit_completion(&tcrtc->framedone_completion); 270 271 /* 272 * If a layer is left enabled when the videoport is disabled, and the 273 * vid pipeline that was used for the layer is taken into use on 274 * another videoport, the DSS will report sync lost issues. Disable all 275 * the layers here as a work-around. 276 */ 277 for (u32 layer = 0; layer < tidss->feat->num_vids; layer++) 278 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 279 false); 280 281 dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport); 282 283 if (!wait_for_completion_timeout(&tcrtc->framedone_completion, 284 msecs_to_jiffies(500))) 285 dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d", 286 tcrtc->hw_videoport); 287 288 dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport); 289 290 spin_lock_irqsave(&ddev->event_lock, flags); 291 if (crtc->state->event) { 292 drm_crtc_send_vblank_event(crtc, crtc->state->event); 293 crtc->state->event = NULL; 294 } 295 spin_unlock_irqrestore(&ddev->event_lock, flags); 296 297 drm_crtc_vblank_off(crtc); 298 299 dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport); 300 301 tidss_runtime_put(tidss); 302 } 303 304 static 305 enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc, 306 const struct drm_display_mode *mode) 307 { 308 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 309 struct drm_device *ddev = crtc->dev; 310 struct tidss_device *tidss = to_tidss(ddev); 311 312 return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode); 313 } 314 315 static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = { 316 .atomic_check = tidss_crtc_atomic_check, 317 .atomic_flush = tidss_crtc_atomic_flush, 318 .atomic_enable = tidss_crtc_atomic_enable, 319 .atomic_disable = tidss_crtc_atomic_disable, 320 321 .mode_valid = tidss_crtc_mode_valid, 322 }; 323 324 /* drm_crtc_funcs */ 325 326 static int tidss_crtc_enable_vblank(struct drm_crtc *crtc) 327 { 328 struct drm_device *ddev = crtc->dev; 329 struct tidss_device *tidss = to_tidss(ddev); 330 331 dev_dbg(ddev->dev, "%s\n", __func__); 332 333 tidss_runtime_get(tidss); 334 335 tidss_irq_enable_vblank(crtc); 336 337 return 0; 338 } 339 340 static void tidss_crtc_disable_vblank(struct drm_crtc *crtc) 341 { 342 struct drm_device *ddev = crtc->dev; 343 struct tidss_device *tidss = to_tidss(ddev); 344 345 dev_dbg(ddev->dev, "%s\n", __func__); 346 347 tidss_irq_disable_vblank(crtc); 348 349 tidss_runtime_put(tidss); 350 } 351 352 static void tidss_crtc_reset(struct drm_crtc *crtc) 353 { 354 struct tidss_crtc_state *tcrtc; 355 356 if (crtc->state) 357 __drm_atomic_helper_crtc_destroy_state(crtc->state); 358 359 kfree(crtc->state); 360 361 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 362 if (!tcrtc) { 363 crtc->state = NULL; 364 return; 365 } 366 367 __drm_atomic_helper_crtc_reset(crtc, &tcrtc->base); 368 } 369 370 static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc) 371 { 372 struct tidss_crtc_state *state, *current_state; 373 374 if (WARN_ON(!crtc->state)) 375 return NULL; 376 377 current_state = to_tidss_crtc_state(crtc->state); 378 379 state = kmalloc(sizeof(*state), GFP_KERNEL); 380 if (!state) 381 return NULL; 382 383 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); 384 385 state->plane_pos_changed = false; 386 387 state->bus_format = current_state->bus_format; 388 state->bus_flags = current_state->bus_flags; 389 390 return &state->base; 391 } 392 393 static void tidss_crtc_destroy(struct drm_crtc *crtc) 394 { 395 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 396 397 drm_crtc_cleanup(crtc); 398 kfree(tcrtc); 399 } 400 401 static const struct drm_crtc_funcs tidss_crtc_funcs = { 402 .reset = tidss_crtc_reset, 403 .destroy = tidss_crtc_destroy, 404 .set_config = drm_atomic_helper_set_config, 405 .page_flip = drm_atomic_helper_page_flip, 406 .atomic_duplicate_state = tidss_crtc_duplicate_state, 407 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 408 .enable_vblank = tidss_crtc_enable_vblank, 409 .disable_vblank = tidss_crtc_disable_vblank, 410 }; 411 412 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, 413 u32 hw_videoport, 414 struct drm_plane *primary) 415 { 416 struct tidss_crtc *tcrtc; 417 struct drm_crtc *crtc; 418 unsigned int gamma_lut_size = 0; 419 bool has_ctm = tidss->feat->vp_feat.color.has_ctm; 420 int ret; 421 422 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 423 if (!tcrtc) 424 return ERR_PTR(-ENOMEM); 425 426 tcrtc->hw_videoport = hw_videoport; 427 init_completion(&tcrtc->framedone_completion); 428 429 crtc = &tcrtc->crtc; 430 431 ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary, 432 NULL, &tidss_crtc_funcs, NULL); 433 if (ret < 0) { 434 kfree(tcrtc); 435 return ERR_PTR(ret); 436 } 437 438 drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs); 439 440 /* 441 * The dispc gamma functions adapt to what ever size we ask 442 * from it no matter what HW supports. X-server assumes 256 443 * element gamma tables so lets use that. 444 */ 445 if (tidss->feat->vp_feat.color.gamma_size) 446 gamma_lut_size = 256; 447 448 drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size); 449 if (gamma_lut_size) 450 drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); 451 452 return tcrtc; 453 } 454