1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 4 * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> 5 */ 6 7 #include <drm/drm_atomic.h> 8 #include <drm/drm_atomic_helper.h> 9 #include <drm/drm_crtc.h> 10 #include <drm/drm_gem_dma_helper.h> 11 #include <drm/drm_vblank.h> 12 13 #include "tidss_crtc.h" 14 #include "tidss_dispc.h" 15 #include "tidss_drv.h" 16 #include "tidss_irq.h" 17 #include "tidss_plane.h" 18 19 /* Page flip and frame done IRQs */ 20 21 static void tidss_crtc_finish_page_flip(struct tidss_crtc *tcrtc) 22 { 23 struct drm_device *ddev = tcrtc->crtc.dev; 24 struct tidss_device *tidss = to_tidss(ddev); 25 struct drm_pending_vblank_event *event; 26 unsigned long flags; 27 bool busy; 28 29 spin_lock_irqsave(&ddev->event_lock, flags); 30 31 /* 32 * New settings are taken into use at VFP, and GO bit is cleared at 33 * the same time. This happens before the vertical blank interrupt. 34 * So there is a small change that the driver sets GO bit after VFP, but 35 * before vblank, and we have to check for that case here. 36 */ 37 busy = dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport); 38 if (busy) { 39 spin_unlock_irqrestore(&ddev->event_lock, flags); 40 return; 41 } 42 43 event = tcrtc->event; 44 tcrtc->event = NULL; 45 46 if (!event) { 47 spin_unlock_irqrestore(&ddev->event_lock, flags); 48 return; 49 } 50 51 drm_crtc_send_vblank_event(&tcrtc->crtc, event); 52 53 spin_unlock_irqrestore(&ddev->event_lock, flags); 54 55 drm_crtc_vblank_put(&tcrtc->crtc); 56 } 57 58 void tidss_crtc_vblank_irq(struct drm_crtc *crtc) 59 { 60 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 61 62 drm_crtc_handle_vblank(crtc); 63 64 tidss_crtc_finish_page_flip(tcrtc); 65 } 66 67 void tidss_crtc_framedone_irq(struct drm_crtc *crtc) 68 { 69 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 70 71 complete(&tcrtc->framedone_completion); 72 } 73 74 void tidss_crtc_error_irq(struct drm_crtc *crtc, u64 irqstatus) 75 { 76 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 77 78 dev_err_ratelimited(crtc->dev->dev, "CRTC%u SYNC LOST: (irq %llx)\n", 79 tcrtc->hw_videoport, irqstatus); 80 } 81 82 /* drm_crtc_helper_funcs */ 83 84 static int tidss_crtc_atomic_check(struct drm_crtc *crtc, 85 struct drm_atomic_state *state) 86 { 87 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, 88 crtc); 89 struct drm_device *ddev = crtc->dev; 90 struct tidss_device *tidss = to_tidss(ddev); 91 struct dispc_device *dispc = tidss->dispc; 92 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 93 u32 hw_videoport = tcrtc->hw_videoport; 94 const struct drm_display_mode *mode; 95 enum drm_mode_status ok; 96 97 dev_dbg(ddev->dev, "%s\n", __func__); 98 99 if (!crtc_state->enable) 100 return 0; 101 102 mode = &crtc_state->adjusted_mode; 103 104 ok = dispc_vp_mode_valid(dispc, hw_videoport, mode); 105 if (ok != MODE_OK) { 106 dev_dbg(ddev->dev, "%s: bad mode: %ux%u pclk %u kHz\n", 107 __func__, mode->hdisplay, mode->vdisplay, mode->clock); 108 return -EINVAL; 109 } 110 111 return dispc_vp_bus_check(dispc, hw_videoport, crtc_state); 112 } 113 114 /* 115 * This needs all affected planes to be present in the atomic 116 * state. The untouched planes are added to the state in 117 * tidss_atomic_check(). 118 */ 119 static void tidss_crtc_position_planes(struct tidss_device *tidss, 120 struct drm_crtc *crtc, 121 struct drm_crtc_state *old_state, 122 bool newmodeset) 123 { 124 struct drm_atomic_state *ostate = old_state->state; 125 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 126 struct drm_crtc_state *cstate = crtc->state; 127 int layer; 128 129 if (!newmodeset && !cstate->zpos_changed && 130 !to_tidss_crtc_state(cstate)->plane_pos_changed) 131 return; 132 133 for (layer = 0; layer < tidss->feat->num_planes; layer++) { 134 struct drm_plane_state *pstate; 135 struct drm_plane *plane; 136 bool layer_active = false; 137 int i; 138 139 for_each_new_plane_in_state(ostate, plane, pstate, i) { 140 if (pstate->crtc != crtc || !pstate->visible) 141 continue; 142 143 if (pstate->normalized_zpos == layer) { 144 layer_active = true; 145 break; 146 } 147 } 148 149 if (layer_active) { 150 struct tidss_plane *tplane = to_tidss_plane(plane); 151 152 dispc_ovr_set_plane(tidss->dispc, tplane->hw_plane_id, 153 tcrtc->hw_videoport, 154 pstate->crtc_x, pstate->crtc_y, 155 layer); 156 } 157 dispc_ovr_enable_layer(tidss->dispc, tcrtc->hw_videoport, layer, 158 layer_active); 159 } 160 } 161 162 static void tidss_crtc_atomic_flush(struct drm_crtc *crtc, 163 struct drm_atomic_state *state) 164 { 165 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, 166 crtc); 167 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 168 struct drm_device *ddev = crtc->dev; 169 struct tidss_device *tidss = to_tidss(ddev); 170 unsigned long flags; 171 172 dev_dbg(ddev->dev, "%s: %s is %sactive, %s modeset, event %p\n", 173 __func__, crtc->name, crtc->state->active ? "" : "not ", 174 drm_atomic_crtc_needs_modeset(crtc->state) ? "needs" : "doesn't need", 175 crtc->state->event); 176 177 /* 178 * Flush CRTC changes with go bit only if new modeset is not 179 * coming, so CRTC is enabled trough out the commit. 180 */ 181 if (drm_atomic_crtc_needs_modeset(crtc->state)) 182 return; 183 184 /* If the GO bit is stuck we better quit here. */ 185 if (WARN_ON(dispc_vp_go_busy(tidss->dispc, tcrtc->hw_videoport))) 186 return; 187 188 /* We should have event if CRTC is enabled through out this commit. */ 189 if (WARN_ON(!crtc->state->event)) 190 return; 191 192 /* Write vp properties to HW if needed. */ 193 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, false); 194 195 /* Update plane positions if needed. */ 196 tidss_crtc_position_planes(tidss, crtc, old_crtc_state, false); 197 198 WARN_ON(drm_crtc_vblank_get(crtc) != 0); 199 200 spin_lock_irqsave(&ddev->event_lock, flags); 201 dispc_vp_go(tidss->dispc, tcrtc->hw_videoport); 202 203 WARN_ON(tcrtc->event); 204 205 tcrtc->event = crtc->state->event; 206 crtc->state->event = NULL; 207 208 spin_unlock_irqrestore(&ddev->event_lock, flags); 209 } 210 211 static void tidss_crtc_atomic_enable(struct drm_crtc *crtc, 212 struct drm_atomic_state *state) 213 { 214 struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, 215 crtc); 216 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 217 struct drm_device *ddev = crtc->dev; 218 struct tidss_device *tidss = to_tidss(ddev); 219 const struct drm_display_mode *mode = &crtc->state->adjusted_mode; 220 unsigned long flags; 221 int r; 222 223 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 224 225 tidss_runtime_get(tidss); 226 227 r = dispc_vp_set_clk_rate(tidss->dispc, tcrtc->hw_videoport, 228 mode->clock * 1000); 229 if (r != 0) 230 return; 231 232 r = dispc_vp_enable_clk(tidss->dispc, tcrtc->hw_videoport); 233 if (r != 0) 234 return; 235 236 dispc_vp_setup(tidss->dispc, tcrtc->hw_videoport, crtc->state, true); 237 tidss_crtc_position_planes(tidss, crtc, old_state, true); 238 239 /* Turn vertical blanking interrupt reporting on. */ 240 drm_crtc_vblank_on(crtc); 241 242 dispc_vp_prepare(tidss->dispc, tcrtc->hw_videoport, crtc->state); 243 244 dispc_vp_enable(tidss->dispc, tcrtc->hw_videoport, crtc->state); 245 246 spin_lock_irqsave(&ddev->event_lock, flags); 247 248 if (crtc->state->event) { 249 drm_crtc_send_vblank_event(crtc, crtc->state->event); 250 crtc->state->event = NULL; 251 } 252 253 spin_unlock_irqrestore(&ddev->event_lock, flags); 254 } 255 256 static void tidss_crtc_atomic_disable(struct drm_crtc *crtc, 257 struct drm_atomic_state *state) 258 { 259 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 260 struct drm_device *ddev = crtc->dev; 261 struct tidss_device *tidss = to_tidss(ddev); 262 unsigned long flags; 263 264 dev_dbg(ddev->dev, "%s, event %p\n", __func__, crtc->state->event); 265 266 reinit_completion(&tcrtc->framedone_completion); 267 268 dispc_vp_disable(tidss->dispc, tcrtc->hw_videoport); 269 270 if (!wait_for_completion_timeout(&tcrtc->framedone_completion, 271 msecs_to_jiffies(500))) 272 dev_err(tidss->dev, "Timeout waiting for framedone on crtc %d", 273 tcrtc->hw_videoport); 274 275 dispc_vp_unprepare(tidss->dispc, tcrtc->hw_videoport); 276 277 spin_lock_irqsave(&ddev->event_lock, flags); 278 if (crtc->state->event) { 279 drm_crtc_send_vblank_event(crtc, crtc->state->event); 280 crtc->state->event = NULL; 281 } 282 spin_unlock_irqrestore(&ddev->event_lock, flags); 283 284 drm_crtc_vblank_off(crtc); 285 286 dispc_vp_disable_clk(tidss->dispc, tcrtc->hw_videoport); 287 288 tidss_runtime_put(tidss); 289 } 290 291 static 292 enum drm_mode_status tidss_crtc_mode_valid(struct drm_crtc *crtc, 293 const struct drm_display_mode *mode) 294 { 295 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 296 struct drm_device *ddev = crtc->dev; 297 struct tidss_device *tidss = to_tidss(ddev); 298 299 return dispc_vp_mode_valid(tidss->dispc, tcrtc->hw_videoport, mode); 300 } 301 302 static const struct drm_crtc_helper_funcs tidss_crtc_helper_funcs = { 303 .atomic_check = tidss_crtc_atomic_check, 304 .atomic_flush = tidss_crtc_atomic_flush, 305 .atomic_enable = tidss_crtc_atomic_enable, 306 .atomic_disable = tidss_crtc_atomic_disable, 307 308 .mode_valid = tidss_crtc_mode_valid, 309 }; 310 311 /* drm_crtc_funcs */ 312 313 static int tidss_crtc_enable_vblank(struct drm_crtc *crtc) 314 { 315 struct drm_device *ddev = crtc->dev; 316 struct tidss_device *tidss = to_tidss(ddev); 317 318 dev_dbg(ddev->dev, "%s\n", __func__); 319 320 tidss_runtime_get(tidss); 321 322 tidss_irq_enable_vblank(crtc); 323 324 return 0; 325 } 326 327 static void tidss_crtc_disable_vblank(struct drm_crtc *crtc) 328 { 329 struct drm_device *ddev = crtc->dev; 330 struct tidss_device *tidss = to_tidss(ddev); 331 332 dev_dbg(ddev->dev, "%s\n", __func__); 333 334 tidss_irq_disable_vblank(crtc); 335 336 tidss_runtime_put(tidss); 337 } 338 339 static void tidss_crtc_reset(struct drm_crtc *crtc) 340 { 341 struct tidss_crtc_state *tcrtc; 342 343 if (crtc->state) 344 __drm_atomic_helper_crtc_destroy_state(crtc->state); 345 346 kfree(crtc->state); 347 348 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 349 if (!tcrtc) { 350 crtc->state = NULL; 351 return; 352 } 353 354 __drm_atomic_helper_crtc_reset(crtc, &tcrtc->base); 355 } 356 357 static struct drm_crtc_state *tidss_crtc_duplicate_state(struct drm_crtc *crtc) 358 { 359 struct tidss_crtc_state *state, *current_state; 360 361 if (WARN_ON(!crtc->state)) 362 return NULL; 363 364 current_state = to_tidss_crtc_state(crtc->state); 365 366 state = kmalloc(sizeof(*state), GFP_KERNEL); 367 if (!state) 368 return NULL; 369 370 __drm_atomic_helper_crtc_duplicate_state(crtc, &state->base); 371 372 state->plane_pos_changed = false; 373 374 state->bus_format = current_state->bus_format; 375 state->bus_flags = current_state->bus_flags; 376 377 return &state->base; 378 } 379 380 static void tidss_crtc_destroy(struct drm_crtc *crtc) 381 { 382 struct tidss_crtc *tcrtc = to_tidss_crtc(crtc); 383 384 drm_crtc_cleanup(crtc); 385 kfree(tcrtc); 386 } 387 388 static const struct drm_crtc_funcs tidss_crtc_funcs = { 389 .reset = tidss_crtc_reset, 390 .destroy = tidss_crtc_destroy, 391 .set_config = drm_atomic_helper_set_config, 392 .page_flip = drm_atomic_helper_page_flip, 393 .atomic_duplicate_state = tidss_crtc_duplicate_state, 394 .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state, 395 .enable_vblank = tidss_crtc_enable_vblank, 396 .disable_vblank = tidss_crtc_disable_vblank, 397 }; 398 399 struct tidss_crtc *tidss_crtc_create(struct tidss_device *tidss, 400 u32 hw_videoport, 401 struct drm_plane *primary) 402 { 403 struct tidss_crtc *tcrtc; 404 struct drm_crtc *crtc; 405 unsigned int gamma_lut_size = 0; 406 bool has_ctm = tidss->feat->vp_feat.color.has_ctm; 407 int ret; 408 409 tcrtc = kzalloc(sizeof(*tcrtc), GFP_KERNEL); 410 if (!tcrtc) 411 return ERR_PTR(-ENOMEM); 412 413 tcrtc->hw_videoport = hw_videoport; 414 init_completion(&tcrtc->framedone_completion); 415 416 crtc = &tcrtc->crtc; 417 418 ret = drm_crtc_init_with_planes(&tidss->ddev, crtc, primary, 419 NULL, &tidss_crtc_funcs, NULL); 420 if (ret < 0) { 421 kfree(tcrtc); 422 return ERR_PTR(ret); 423 } 424 425 drm_crtc_helper_add(crtc, &tidss_crtc_helper_funcs); 426 427 /* 428 * The dispc gamma functions adapt to what ever size we ask 429 * from it no matter what HW supports. X-server assumes 256 430 * element gamma tables so lets use that. 431 */ 432 if (tidss->feat->vp_feat.color.gamma_size) 433 gamma_lut_size = 256; 434 435 drm_crtc_enable_color_mgmt(crtc, 0, has_ctm, gamma_lut_size); 436 if (gamma_lut_size) 437 drm_mode_crtc_set_gamma_size(crtc, gamma_lut_size); 438 439 return tcrtc; 440 } 441