xref: /linux/drivers/gpu/drm/tegra/vic.h (revision f3779cb190a5a12d2e26fd5af724fb1384a9144f)
10ae797a8SArto Merilainen /*
20ae797a8SArto Merilainen  * Copyright (c) 2015, NVIDIA Corporation.
30ae797a8SArto Merilainen  *
40ae797a8SArto Merilainen  * This program is free software; you can redistribute it and/or modify
50ae797a8SArto Merilainen  * it under the terms of the GNU General Public License version 2 as
60ae797a8SArto Merilainen  * published by the Free Software Foundation.
70ae797a8SArto Merilainen  */
80ae797a8SArto Merilainen 
90ae797a8SArto Merilainen #ifndef TEGRA_VIC_H
100ae797a8SArto Merilainen #define TEGRA_VIC_H
110ae797a8SArto Merilainen 
120ae797a8SArto Merilainen /* VIC methods */
130ae797a8SArto Merilainen 
140ae797a8SArto Merilainen #define VIC_SET_APPLICATION_ID			0x00000200
150ae797a8SArto Merilainen #define VIC_SET_FCE_UCODE_SIZE			0x0000071C
160ae797a8SArto Merilainen #define VIC_SET_FCE_UCODE_OFFSET		0x0000072C
170ae797a8SArto Merilainen 
180ae797a8SArto Merilainen /* VIC registers */
190ae797a8SArto Merilainen 
20*f3779cb1SThierry Reding #define VIC_THI_STREAMID0	0x00000030
21*f3779cb1SThierry Reding #define VIC_THI_STREAMID1	0x00000034
22*f3779cb1SThierry Reding 
230ae797a8SArto Merilainen #define NV_PVIC_MISC_PRI_VIC_CG			0x000016d0
240ae797a8SArto Merilainen #define CG_IDLE_CG_DLY_CNT(val)			((val & 0x3f) << 0)
250ae797a8SArto Merilainen #define CG_IDLE_CG_EN				(1 << 6)
260ae797a8SArto Merilainen #define CG_WAKEUP_DLY_CNT(val)			((val & 0xf) << 16)
270ae797a8SArto Merilainen 
28*f3779cb1SThierry Reding #define VIC_TFBIF_TRANSCFG	0x00002044
29*f3779cb1SThierry Reding #define  TRANSCFG_ATT(i, v)	(((v) & 0x3) << (i * 4))
30*f3779cb1SThierry Reding #define  TRANSCFG_SID_HW	0
31*f3779cb1SThierry Reding #define  TRANSCFG_SID_PHY	1
32*f3779cb1SThierry Reding #define  TRANSCFG_SID_FALCON	2
33*f3779cb1SThierry Reding 
340ae797a8SArto Merilainen /* Firmware offsets */
350ae797a8SArto Merilainen 
360ae797a8SArto Merilainen #define VIC_UCODE_FCE_HEADER_OFFSET		(6*4)
370ae797a8SArto Merilainen #define VIC_UCODE_FCE_DATA_OFFSET		(7*4)
380ae797a8SArto Merilainen #define FCE_UCODE_SIZE_OFFSET			(2*4)
390ae797a8SArto Merilainen 
400ae797a8SArto Merilainen #endif /* TEGRA_VIC_H */
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