xref: /linux/drivers/gpu/drm/tegra/falcon.h (revision e5d3a64e650c721f9e9b1f76e5df8c62f16b734d)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015, NVIDIA Corporation.
4  */
5 
6 #ifndef _FALCON_H_
7 #define _FALCON_H_
8 
9 #include <linux/types.h>
10 
11 #define FALCON_UCLASS_METHOD_OFFSET		0x00000040
12 
13 #define FALCON_UCLASS_METHOD_DATA		0x00000044
14 
15 #define FALCON_IRQMSET				0x00001010
16 #define FALCON_IRQMSET_WDTMR			(1 << 1)
17 #define FALCON_IRQMSET_HALT			(1 << 4)
18 #define FALCON_IRQMSET_EXTERR			(1 << 5)
19 #define FALCON_IRQMSET_SWGEN0			(1 << 6)
20 #define FALCON_IRQMSET_SWGEN1			(1 << 7)
21 #define FALCON_IRQMSET_EXT(v)			(((v) & 0xff) << 8)
22 
23 #define FALCON_IRQDEST				0x0000101c
24 #define FALCON_IRQDEST_HALT			(1 << 4)
25 #define FALCON_IRQDEST_EXTERR			(1 << 5)
26 #define FALCON_IRQDEST_SWGEN0			(1 << 6)
27 #define FALCON_IRQDEST_SWGEN1			(1 << 7)
28 #define FALCON_IRQDEST_EXT(v)			(((v) & 0xff) << 8)
29 
30 #define FALCON_ITFEN				0x00001048
31 #define FALCON_ITFEN_CTXEN			(1 << 0)
32 #define FALCON_ITFEN_MTHDEN			(1 << 1)
33 
34 #define FALCON_IDLESTATE			0x0000104c
35 
36 #define FALCON_CPUCTL				0x00001100
37 #define FALCON_CPUCTL_STARTCPU			(1 << 1)
38 
39 #define FALCON_BOOTVEC				0x00001104
40 
41 #define FALCON_DMACTL				0x0000110c
42 #define FALCON_DMACTL_DMEM_SCRUBBING		(1 << 1)
43 #define FALCON_DMACTL_IMEM_SCRUBBING		(1 << 2)
44 
45 #define FALCON_DMATRFBASE			0x00001110
46 
47 #define FALCON_DMATRFMOFFS			0x00001114
48 
49 #define FALCON_DMATRFCMD			0x00001118
50 #define FALCON_DMATRFCMD_IDLE			(1 << 1)
51 #define FALCON_DMATRFCMD_IMEM			(1 << 4)
52 #define FALCON_DMATRFCMD_SIZE_256B		(6 << 8)
53 #define FALCON_DMATRFCMD_DMACTX(v)		(((v) & 0x7) << 12)
54 
55 #define FALCON_DMATRFFBOFFS			0x0000111c
56 
57 struct falcon_fw_bin_header_v1 {
58 	u32 magic;		/* 0x10de */
59 	u32 version;		/* version of bin format (1) */
60 	u32 size;		/* entire image size including this header */
61 	u32 os_header_offset;
62 	u32 os_data_offset;
63 	u32 os_size;
64 };
65 
66 struct falcon_fw_os_app_v1 {
67 	u32 offset;
68 	u32 size;
69 };
70 
71 struct falcon_fw_os_header_v1 {
72 	u32 code_offset;
73 	u32 code_size;
74 	u32 data_offset;
75 	u32 data_size;
76 };
77 
78 struct falcon_firmware_section {
79 	unsigned long offset;
80 	size_t size;
81 };
82 
83 struct falcon_firmware {
84 	/* Firmware after it is read but not loaded */
85 	const struct firmware *firmware;
86 
87 	/* Raw firmware data */
88 	dma_addr_t iova;
89 	dma_addr_t phys;
90 	void *virt;
91 	size_t size;
92 
93 	/* Parsed firmware information */
94 	struct falcon_firmware_section bin_data;
95 	struct falcon_firmware_section data;
96 	struct falcon_firmware_section code;
97 };
98 
99 struct falcon {
100 	/* Set by falcon client */
101 	struct device *dev;
102 	void __iomem *regs;
103 
104 	struct falcon_firmware firmware;
105 };
106 
107 int falcon_init(struct falcon *falcon);
108 void falcon_exit(struct falcon *falcon);
109 int falcon_read_firmware(struct falcon *falcon, const char *firmware_name);
110 int falcon_load_firmware(struct falcon *falcon);
111 int falcon_boot(struct falcon *falcon);
112 void falcon_execute_method(struct falcon *falcon, u32 method, u32 data);
113 int falcon_wait_idle(struct falcon *falcon);
114 
115 #endif /* _FALCON_H_ */
116