1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, NVIDIA Corporation. 4 */ 5 6 #include <linux/platform_device.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/firmware.h> 9 #include <linux/pci_ids.h> 10 #include <linux/iopoll.h> 11 12 #include "falcon.h" 13 #include "drm.h" 14 15 enum falcon_memory { 16 FALCON_MEMORY_IMEM, 17 FALCON_MEMORY_DATA, 18 }; 19 20 static void falcon_writel(struct falcon *falcon, u32 value, u32 offset) 21 { 22 writel(value, falcon->regs + offset); 23 } 24 25 int falcon_wait_idle(struct falcon *falcon) 26 { 27 u32 value; 28 29 return readl_poll_timeout(falcon->regs + FALCON_IDLESTATE, value, 30 (value == 0), 10, 100000); 31 } 32 33 static int falcon_dma_wait_not_full(struct falcon *falcon) 34 { 35 u32 value; 36 37 return readl_poll_timeout(falcon->regs + FALCON_DMATRFCMD, value, 38 !(value & FALCON_DMATRFCMD_FULL), 10, 100000); 39 } 40 41 static int falcon_dma_wait_idle(struct falcon *falcon) 42 { 43 u32 value; 44 45 return readl_poll_timeout(falcon->regs + FALCON_DMATRFCMD, value, 46 (value & FALCON_DMATRFCMD_IDLE), 10, 100000); 47 } 48 49 static int falcon_copy_chunk(struct falcon *falcon, 50 phys_addr_t base, 51 unsigned long offset, 52 enum falcon_memory target) 53 { 54 u32 cmd = FALCON_DMATRFCMD_SIZE_256B; 55 int err; 56 57 if (target == FALCON_MEMORY_IMEM) 58 cmd |= FALCON_DMATRFCMD_IMEM; 59 60 /* 61 * Use second DMA context (i.e. the one for firmware). Strictly 62 * speaking, at this point both DMA contexts point to the firmware 63 * stream ID, but this register's value will be reused by the firmware 64 * for later DMA transactions, so we need to use the correct value. 65 */ 66 cmd |= FALCON_DMATRFCMD_DMACTX(1); 67 68 err = falcon_dma_wait_not_full(falcon); 69 if (err < 0) 70 return err; 71 72 falcon_writel(falcon, offset, FALCON_DMATRFMOFFS); 73 falcon_writel(falcon, base, FALCON_DMATRFFBOFFS); 74 falcon_writel(falcon, cmd, FALCON_DMATRFCMD); 75 76 return 0; 77 } 78 79 static void falcon_copy_firmware_image(struct falcon *falcon, 80 const struct firmware *firmware) 81 { 82 u32 *virt = falcon->firmware.virt; 83 size_t i; 84 85 /* copy the whole thing taking into account endianness */ 86 for (i = 0; i < firmware->size / sizeof(u32); i++) 87 virt[i] = le32_to_cpu(((__le32 *)firmware->data)[i]); 88 } 89 90 static int falcon_parse_firmware_image(struct falcon *falcon) 91 { 92 struct falcon_fw_bin_header_v1 *bin = (void *)falcon->firmware.virt; 93 struct falcon_fw_os_header_v1 *os; 94 95 /* endian problems would show up right here */ 96 if (bin->magic != PCI_VENDOR_ID_NVIDIA && bin->magic != 0x10fe) { 97 dev_err(falcon->dev, "incorrect firmware magic\n"); 98 return -EINVAL; 99 } 100 101 /* currently only version 1 is supported */ 102 if (bin->version != 1) { 103 dev_err(falcon->dev, "unsupported firmware version\n"); 104 return -EINVAL; 105 } 106 107 /* check that the firmware size is consistent */ 108 if (bin->size > falcon->firmware.size) { 109 dev_err(falcon->dev, "firmware image size inconsistency\n"); 110 return -EINVAL; 111 } 112 113 os = falcon->firmware.virt + bin->os_header_offset; 114 115 falcon->firmware.bin_data.size = bin->os_size; 116 falcon->firmware.bin_data.offset = bin->os_data_offset; 117 falcon->firmware.code.offset = os->code_offset; 118 falcon->firmware.code.size = os->code_size; 119 falcon->firmware.data.offset = os->data_offset; 120 falcon->firmware.data.size = os->data_size; 121 122 return 0; 123 } 124 125 int falcon_read_firmware(struct falcon *falcon, const char *name) 126 { 127 int err; 128 129 /* request_firmware prints error if it fails */ 130 err = request_firmware(&falcon->firmware.firmware, name, falcon->dev); 131 if (err < 0) 132 return err; 133 134 falcon->firmware.size = falcon->firmware.firmware->size; 135 136 return 0; 137 } 138 139 int falcon_load_firmware(struct falcon *falcon) 140 { 141 const struct firmware *firmware = falcon->firmware.firmware; 142 int err; 143 144 /* copy firmware image into local area. this also ensures endianness */ 145 falcon_copy_firmware_image(falcon, firmware); 146 147 /* parse the image data */ 148 err = falcon_parse_firmware_image(falcon); 149 if (err < 0) { 150 dev_err(falcon->dev, "failed to parse firmware image\n"); 151 return err; 152 } 153 154 release_firmware(firmware); 155 falcon->firmware.firmware = NULL; 156 157 return 0; 158 } 159 160 int falcon_init(struct falcon *falcon) 161 { 162 falcon->firmware.virt = NULL; 163 164 return 0; 165 } 166 167 void falcon_exit(struct falcon *falcon) 168 { 169 if (falcon->firmware.firmware) 170 release_firmware(falcon->firmware.firmware); 171 } 172 173 int falcon_boot(struct falcon *falcon) 174 { 175 unsigned long offset; 176 u32 value; 177 int err; 178 179 if (!falcon->firmware.virt) 180 return -EINVAL; 181 182 err = readl_poll_timeout(falcon->regs + FALCON_DMACTL, value, 183 (value & (FALCON_DMACTL_IMEM_SCRUBBING | 184 FALCON_DMACTL_DMEM_SCRUBBING)) == 0, 185 10, 10000); 186 if (err < 0) 187 return err; 188 189 falcon_writel(falcon, 0, FALCON_DMACTL); 190 191 /* setup the address of the binary data so Falcon can access it later */ 192 falcon_writel(falcon, (falcon->firmware.iova + 193 falcon->firmware.bin_data.offset) >> 8, 194 FALCON_DMATRFBASE); 195 196 /* copy the data segment into Falcon internal memory */ 197 for (offset = 0; offset < falcon->firmware.data.size; offset += 256) 198 falcon_copy_chunk(falcon, 199 falcon->firmware.data.offset + offset, 200 offset, FALCON_MEMORY_DATA); 201 202 /* copy the code segment into Falcon internal memory */ 203 for (offset = 0; offset < falcon->firmware.code.size; offset += 256) 204 falcon_copy_chunk(falcon, falcon->firmware.code.offset + offset, 205 offset, FALCON_MEMORY_IMEM); 206 207 /* wait for DMA to complete */ 208 err = falcon_dma_wait_idle(falcon); 209 if (err < 0) 210 return err; 211 212 /* setup falcon interrupts */ 213 falcon_writel(falcon, FALCON_IRQMSET_EXT(0xff) | 214 FALCON_IRQMSET_SWGEN1 | 215 FALCON_IRQMSET_SWGEN0 | 216 FALCON_IRQMSET_EXTERR | 217 FALCON_IRQMSET_HALT | 218 FALCON_IRQMSET_WDTMR, 219 FALCON_IRQMSET); 220 falcon_writel(falcon, FALCON_IRQDEST_EXT(0xff) | 221 FALCON_IRQDEST_SWGEN1 | 222 FALCON_IRQDEST_SWGEN0 | 223 FALCON_IRQDEST_EXTERR | 224 FALCON_IRQDEST_HALT, 225 FALCON_IRQDEST); 226 227 /* enable interface */ 228 falcon_writel(falcon, FALCON_ITFEN_MTHDEN | 229 FALCON_ITFEN_CTXEN, 230 FALCON_ITFEN); 231 232 /* boot falcon */ 233 falcon_writel(falcon, 0x00000000, FALCON_BOOTVEC); 234 falcon_writel(falcon, FALCON_CPUCTL_STARTCPU, FALCON_CPUCTL); 235 236 err = falcon_wait_idle(falcon); 237 if (err < 0) { 238 dev_err(falcon->dev, "Falcon boot failed due to timeout\n"); 239 return err; 240 } 241 242 return 0; 243 } 244 245 void falcon_execute_method(struct falcon *falcon, u32 method, u32 data) 246 { 247 falcon_writel(falcon, method >> 2, FALCON_UCLASS_METHOD_OFFSET); 248 falcon_writel(falcon, data, FALCON_UCLASS_METHOD_DATA); 249 } 250