1 // SPDX-License-Identifier: GPL-2.0-only 2 3 #include <linux/aperture.h> 4 #include <linux/of_address.h> 5 #include <linux/pci.h> 6 #include <linux/platform_device.h> 7 8 #include <drm/clients/drm_client_setup.h> 9 #include <drm/drm_atomic.h> 10 #include <drm/drm_atomic_state_helper.h> 11 #include <drm/drm_connector.h> 12 #include <drm/drm_damage_helper.h> 13 #include <drm/drm_device.h> 14 #include <drm/drm_drv.h> 15 #include <drm/drm_edid.h> 16 #include <drm/drm_fbdev_shmem.h> 17 #include <drm/drm_format_helper.h> 18 #include <drm/drm_framebuffer.h> 19 #include <drm/drm_gem_atomic_helper.h> 20 #include <drm/drm_gem_framebuffer_helper.h> 21 #include <drm/drm_gem_shmem_helper.h> 22 #include <drm/drm_managed.h> 23 #include <drm/drm_modeset_helper_vtables.h> 24 #include <drm/drm_probe_helper.h> 25 26 #include "drm_sysfb_helper.h" 27 28 #define DRIVER_NAME "ofdrm" 29 #define DRIVER_DESC "DRM driver for OF platform devices" 30 #define DRIVER_MAJOR 1 31 #define DRIVER_MINOR 0 32 33 #define PCI_VENDOR_ID_ATI_R520 0x7100 34 #define PCI_VENDOR_ID_ATI_R600 0x9400 35 36 #define OFDRM_GAMMA_LUT_SIZE 256 37 38 /* Definitions used by the Avivo palette */ 39 #define AVIVO_DC_LUT_RW_SELECT 0x6480 40 #define AVIVO_DC_LUT_RW_MODE 0x6484 41 #define AVIVO_DC_LUT_RW_INDEX 0x6488 42 #define AVIVO_DC_LUT_SEQ_COLOR 0x648c 43 #define AVIVO_DC_LUT_PWL_DATA 0x6490 44 #define AVIVO_DC_LUT_30_COLOR 0x6494 45 #define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498 46 #define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c 47 #define AVIVO_DC_LUT_AUTOFILL 0x64a0 48 #define AVIVO_DC_LUTA_CONTROL 0x64c0 49 #define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4 50 #define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8 51 #define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc 52 #define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0 53 #define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4 54 #define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8 55 #define AVIVO_DC_LUTB_CONTROL 0x6cc0 56 #define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4 57 #define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8 58 #define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc 59 #define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0 60 #define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4 61 #define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8 62 63 enum ofdrm_model { 64 OFDRM_MODEL_UNKNOWN, 65 OFDRM_MODEL_MACH64, /* ATI Mach64 */ 66 OFDRM_MODEL_RAGE128, /* ATI Rage128 */ 67 OFDRM_MODEL_RAGE_M3A, /* ATI Rage Mobility M3 Head A */ 68 OFDRM_MODEL_RAGE_M3B, /* ATI Rage Mobility M3 Head B */ 69 OFDRM_MODEL_RADEON, /* ATI Radeon */ 70 OFDRM_MODEL_GXT2000, /* IBM GXT2000 */ 71 OFDRM_MODEL_AVIVO, /* ATI R5xx */ 72 OFDRM_MODEL_QEMU, /* QEMU VGA */ 73 }; 74 75 /* 76 * Helpers for display nodes 77 */ 78 79 static int display_get_validated_int(struct drm_device *dev, const char *name, uint32_t value) 80 { 81 if (value > INT_MAX) { 82 drm_err(dev, "invalid framebuffer %s of %u\n", name, value); 83 return -EINVAL; 84 } 85 return (int)value; 86 } 87 88 static int display_get_validated_int0(struct drm_device *dev, const char *name, uint32_t value) 89 { 90 if (!value) { 91 drm_err(dev, "invalid framebuffer %s of %u\n", name, value); 92 return -EINVAL; 93 } 94 return display_get_validated_int(dev, name, value); 95 } 96 97 static const struct drm_format_info *display_get_validated_format(struct drm_device *dev, 98 u32 depth, bool big_endian) 99 { 100 const struct drm_format_info *info; 101 u32 format; 102 103 switch (depth) { 104 case 8: 105 format = drm_mode_legacy_fb_format(8, 8); 106 break; 107 case 15: 108 case 16: 109 format = drm_mode_legacy_fb_format(16, depth); 110 break; 111 case 32: 112 format = drm_mode_legacy_fb_format(32, 24); 113 break; 114 default: 115 drm_err(dev, "unsupported framebuffer depth %u\n", depth); 116 return ERR_PTR(-EINVAL); 117 } 118 119 /* 120 * DRM formats assume little-endian byte order. Update the format 121 * if the scanout buffer uses big-endian ordering. 122 */ 123 if (big_endian) { 124 switch (format) { 125 case DRM_FORMAT_XRGB8888: 126 format = DRM_FORMAT_BGRX8888; 127 break; 128 case DRM_FORMAT_ARGB8888: 129 format = DRM_FORMAT_BGRA8888; 130 break; 131 case DRM_FORMAT_RGB565: 132 format = DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN; 133 break; 134 case DRM_FORMAT_XRGB1555: 135 format = DRM_FORMAT_XRGB1555 | DRM_FORMAT_BIG_ENDIAN; 136 break; 137 default: 138 break; 139 } 140 } 141 142 info = drm_format_info(format); 143 if (!info) { 144 drm_err(dev, "cannot find framebuffer format for depth %u\n", depth); 145 return ERR_PTR(-EINVAL); 146 } 147 148 return info; 149 } 150 151 static int display_read_u32_of(struct drm_device *dev, struct device_node *of_node, 152 const char *name, u32 *value) 153 { 154 int ret = of_property_read_u32(of_node, name, value); 155 156 if (ret) 157 drm_err(dev, "cannot parse framebuffer %s: error %d\n", name, ret); 158 return ret; 159 } 160 161 static bool display_get_big_endian_of(struct drm_device *dev, struct device_node *of_node) 162 { 163 bool big_endian; 164 165 #ifdef __BIG_ENDIAN 166 big_endian = !of_property_read_bool(of_node, "little-endian"); 167 #else 168 big_endian = of_property_read_bool(of_node, "big-endian"); 169 #endif 170 171 return big_endian; 172 } 173 174 static int display_get_width_of(struct drm_device *dev, struct device_node *of_node) 175 { 176 u32 width; 177 int ret = display_read_u32_of(dev, of_node, "width", &width); 178 179 if (ret) 180 return ret; 181 return display_get_validated_int0(dev, "width", width); 182 } 183 184 static int display_get_height_of(struct drm_device *dev, struct device_node *of_node) 185 { 186 u32 height; 187 int ret = display_read_u32_of(dev, of_node, "height", &height); 188 189 if (ret) 190 return ret; 191 return display_get_validated_int0(dev, "height", height); 192 } 193 194 static int display_get_depth_of(struct drm_device *dev, struct device_node *of_node) 195 { 196 u32 depth; 197 int ret = display_read_u32_of(dev, of_node, "depth", &depth); 198 199 if (ret) 200 return ret; 201 return display_get_validated_int0(dev, "depth", depth); 202 } 203 204 static int display_get_linebytes_of(struct drm_device *dev, struct device_node *of_node) 205 { 206 u32 linebytes; 207 int ret = display_read_u32_of(dev, of_node, "linebytes", &linebytes); 208 209 if (ret) 210 return ret; 211 return display_get_validated_int(dev, "linebytes", linebytes); 212 } 213 214 static u64 display_get_address_of(struct drm_device *dev, struct device_node *of_node) 215 { 216 u32 address; 217 int ret; 218 219 /* 220 * Not all devices provide an address property, it's not 221 * a bug if this fails. The driver will try to find the 222 * framebuffer base address from the device's memory regions. 223 */ 224 ret = of_property_read_u32(of_node, "address", &address); 225 if (ret) 226 return OF_BAD_ADDR; 227 228 return address; 229 } 230 231 static const u8 *display_get_edid_of(struct drm_device *dev, struct device_node *of_node, 232 u8 buf[EDID_LENGTH]) 233 { 234 int ret = of_property_read_u8_array(of_node, "EDID", buf, EDID_LENGTH); 235 236 if (ret) 237 return NULL; 238 return buf; 239 } 240 241 static bool is_avivo(u32 vendor, u32 device) 242 { 243 /* This will match most R5xx */ 244 return (vendor == PCI_VENDOR_ID_ATI) && 245 ((device >= PCI_VENDOR_ID_ATI_R520 && device < 0x7800) || 246 (PCI_VENDOR_ID_ATI_R600 >= 0x9400)); 247 } 248 249 static enum ofdrm_model display_get_model_of(struct drm_device *dev, struct device_node *of_node) 250 { 251 enum ofdrm_model model = OFDRM_MODEL_UNKNOWN; 252 253 if (of_node_name_prefix(of_node, "ATY,Rage128")) { 254 model = OFDRM_MODEL_RAGE128; 255 } else if (of_node_name_prefix(of_node, "ATY,RageM3pA") || 256 of_node_name_prefix(of_node, "ATY,RageM3p12A")) { 257 model = OFDRM_MODEL_RAGE_M3A; 258 } else if (of_node_name_prefix(of_node, "ATY,RageM3pB")) { 259 model = OFDRM_MODEL_RAGE_M3B; 260 } else if (of_node_name_prefix(of_node, "ATY,Rage6")) { 261 model = OFDRM_MODEL_RADEON; 262 } else if (of_node_name_prefix(of_node, "ATY,")) { 263 return OFDRM_MODEL_MACH64; 264 } else if (of_device_is_compatible(of_node, "pci1014,b7") || 265 of_device_is_compatible(of_node, "pci1014,21c")) { 266 model = OFDRM_MODEL_GXT2000; 267 } else if (of_node_name_prefix(of_node, "vga,Display-")) { 268 struct device_node *of_parent; 269 const __be32 *vendor_p, *device_p; 270 271 /* Look for AVIVO initialized by SLOF */ 272 of_parent = of_get_parent(of_node); 273 vendor_p = of_get_property(of_parent, "vendor-id", NULL); 274 device_p = of_get_property(of_parent, "device-id", NULL); 275 if (vendor_p && device_p) { 276 u32 vendor = be32_to_cpup(vendor_p); 277 u32 device = be32_to_cpup(device_p); 278 279 if (is_avivo(vendor, device)) 280 model = OFDRM_MODEL_AVIVO; 281 } 282 of_node_put(of_parent); 283 } else if (of_device_is_compatible(of_node, "qemu,std-vga")) { 284 model = OFDRM_MODEL_QEMU; 285 } 286 287 return model; 288 } 289 290 /* 291 * Open Firmware display device 292 */ 293 294 struct ofdrm_device; 295 296 struct ofdrm_device_funcs { 297 void __iomem *(*cmap_ioremap)(struct ofdrm_device *odev, 298 struct device_node *of_node, 299 u64 fb_bas); 300 void (*cmap_write)(struct ofdrm_device *odev, unsigned char index, 301 unsigned char r, unsigned char g, unsigned char b); 302 }; 303 304 struct ofdrm_device { 305 struct drm_sysfb_device sysfb; 306 307 const struct ofdrm_device_funcs *funcs; 308 309 /* colormap */ 310 void __iomem *cmap_base; 311 312 u8 edid[EDID_LENGTH]; 313 314 /* modesetting */ 315 u32 formats[DRM_SYSFB_PLANE_NFORMATS(1)]; 316 struct drm_plane primary_plane; 317 struct drm_crtc crtc; 318 struct drm_encoder encoder; 319 struct drm_connector connector; 320 }; 321 322 static struct ofdrm_device *ofdrm_device_of_dev(struct drm_device *dev) 323 { 324 return container_of(to_drm_sysfb_device(dev), struct ofdrm_device, sysfb); 325 } 326 327 /* 328 * Hardware 329 */ 330 331 #if defined(CONFIG_PCI) 332 static struct pci_dev *display_get_pci_dev_of(struct drm_device *dev, struct device_node *of_node) 333 { 334 const __be32 *vendor_p, *device_p; 335 u32 vendor, device; 336 struct pci_dev *pcidev; 337 338 vendor_p = of_get_property(of_node, "vendor-id", NULL); 339 if (!vendor_p) 340 return ERR_PTR(-ENODEV); 341 vendor = be32_to_cpup(vendor_p); 342 343 device_p = of_get_property(of_node, "device-id", NULL); 344 if (!device_p) 345 return ERR_PTR(-ENODEV); 346 device = be32_to_cpup(device_p); 347 348 pcidev = pci_get_device(vendor, device, NULL); 349 if (!pcidev) 350 return ERR_PTR(-ENODEV); 351 352 return pcidev; 353 } 354 355 static void ofdrm_pci_release(void *data) 356 { 357 struct pci_dev *pcidev = data; 358 359 pci_disable_device(pcidev); 360 } 361 362 static int ofdrm_device_init_pci(struct ofdrm_device *odev) 363 { 364 struct drm_device *dev = &odev->sysfb.dev; 365 struct platform_device *pdev = to_platform_device(dev->dev); 366 struct device_node *of_node = pdev->dev.of_node; 367 struct pci_dev *pcidev; 368 int ret; 369 370 /* 371 * Never use pcim_ or other managed helpers on the returned PCI 372 * device. Otherwise, probing the native driver will fail for 373 * resource conflicts. PCI-device management has to be tied to 374 * the lifetime of the platform device until the native driver 375 * takes over. 376 */ 377 pcidev = display_get_pci_dev_of(dev, of_node); 378 if (IS_ERR(pcidev)) 379 return 0; /* no PCI device found; ignore the error */ 380 381 ret = pci_enable_device(pcidev); 382 if (ret) { 383 drm_err(dev, "pci_enable_device(%s) failed: %d\n", 384 dev_name(&pcidev->dev), ret); 385 return ret; 386 } 387 ret = devm_add_action_or_reset(&pdev->dev, ofdrm_pci_release, pcidev); 388 if (ret) 389 return ret; 390 391 return 0; 392 } 393 #else 394 static int ofdrm_device_init_pci(struct ofdrm_device *odev) 395 { 396 return 0; 397 } 398 #endif 399 400 /* 401 * OF display settings 402 */ 403 404 static struct resource *ofdrm_find_fb_resource(struct ofdrm_device *odev, 405 struct resource *fb_res) 406 { 407 struct platform_device *pdev = to_platform_device(odev->sysfb.dev.dev); 408 struct resource *res, *max_res = NULL; 409 u32 i; 410 411 for (i = 0; pdev->num_resources; ++i) { 412 res = platform_get_resource(pdev, IORESOURCE_MEM, i); 413 if (!res) 414 break; /* all resources processed */ 415 if (resource_size(res) < resource_size(fb_res)) 416 continue; /* resource too small */ 417 if (fb_res->start && resource_contains(res, fb_res)) 418 return res; /* resource contains framebuffer */ 419 if (!max_res || resource_size(res) > resource_size(max_res)) 420 max_res = res; /* store largest resource as fallback */ 421 } 422 423 return max_res; 424 } 425 426 /* 427 * Colormap / Palette 428 */ 429 430 static void __iomem *get_cmap_address_of(struct ofdrm_device *odev, struct device_node *of_node, 431 int bar_no, unsigned long offset, unsigned long size) 432 { 433 struct drm_device *dev = &odev->sysfb.dev; 434 const __be32 *addr_p; 435 u64 max_size, address; 436 unsigned int flags; 437 void __iomem *mem; 438 439 addr_p = of_get_pci_address(of_node, bar_no, &max_size, &flags); 440 if (!addr_p) 441 addr_p = of_get_address(of_node, bar_no, &max_size, &flags); 442 if (!addr_p) 443 return IOMEM_ERR_PTR(-ENODEV); 444 445 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) 446 return IOMEM_ERR_PTR(-ENODEV); 447 448 if ((offset + size) >= max_size) 449 return IOMEM_ERR_PTR(-ENODEV); 450 451 address = of_translate_address(of_node, addr_p); 452 if (address == OF_BAD_ADDR) 453 return IOMEM_ERR_PTR(-ENODEV); 454 455 mem = devm_ioremap(dev->dev, address + offset, size); 456 if (!mem) 457 return IOMEM_ERR_PTR(-ENOMEM); 458 459 return mem; 460 } 461 462 static void __iomem *ofdrm_mach64_cmap_ioremap(struct ofdrm_device *odev, 463 struct device_node *of_node, 464 u64 fb_base) 465 { 466 struct drm_device *dev = &odev->sysfb.dev; 467 u64 address; 468 void __iomem *cmap_base; 469 470 address = fb_base & 0xff000000ul; 471 address += 0x7ff000; 472 473 cmap_base = devm_ioremap(dev->dev, address, 0x1000); 474 if (!cmap_base) 475 return IOMEM_ERR_PTR(-ENOMEM); 476 477 return cmap_base; 478 } 479 480 static void ofdrm_mach64_cmap_write(struct ofdrm_device *odev, unsigned char index, 481 unsigned char r, unsigned char g, unsigned char b) 482 { 483 void __iomem *addr = odev->cmap_base + 0xcc0; 484 void __iomem *data = odev->cmap_base + 0xcc0 + 1; 485 486 writeb(index, addr); 487 writeb(r, data); 488 writeb(g, data); 489 writeb(b, data); 490 } 491 492 static void __iomem *ofdrm_rage128_cmap_ioremap(struct ofdrm_device *odev, 493 struct device_node *of_node, 494 u64 fb_base) 495 { 496 return get_cmap_address_of(odev, of_node, 2, 0, 0x1fff); 497 } 498 499 static void ofdrm_rage128_cmap_write(struct ofdrm_device *odev, unsigned char index, 500 unsigned char r, unsigned char g, unsigned char b) 501 { 502 void __iomem *addr = odev->cmap_base + 0xb0; 503 void __iomem *data = odev->cmap_base + 0xb4; 504 u32 color = (r << 16) | (g << 8) | b; 505 506 writeb(index, addr); 507 writel(color, data); 508 } 509 510 static void __iomem *ofdrm_rage_m3a_cmap_ioremap(struct ofdrm_device *odev, 511 struct device_node *of_node, 512 u64 fb_base) 513 { 514 return get_cmap_address_of(odev, of_node, 2, 0, 0x1fff); 515 } 516 517 static void ofdrm_rage_m3a_cmap_write(struct ofdrm_device *odev, unsigned char index, 518 unsigned char r, unsigned char g, unsigned char b) 519 { 520 void __iomem *dac_ctl = odev->cmap_base + 0x58; 521 void __iomem *addr = odev->cmap_base + 0xb0; 522 void __iomem *data = odev->cmap_base + 0xb4; 523 u32 color = (r << 16) | (g << 8) | b; 524 u32 val; 525 526 /* Clear PALETTE_ACCESS_CNTL in DAC_CNTL */ 527 val = readl(dac_ctl); 528 val &= ~0x20; 529 writel(val, dac_ctl); 530 531 /* Set color at palette index */ 532 writeb(index, addr); 533 writel(color, data); 534 } 535 536 static void __iomem *ofdrm_rage_m3b_cmap_ioremap(struct ofdrm_device *odev, 537 struct device_node *of_node, 538 u64 fb_base) 539 { 540 return get_cmap_address_of(odev, of_node, 2, 0, 0x1fff); 541 } 542 543 static void ofdrm_rage_m3b_cmap_write(struct ofdrm_device *odev, unsigned char index, 544 unsigned char r, unsigned char g, unsigned char b) 545 { 546 void __iomem *dac_ctl = odev->cmap_base + 0x58; 547 void __iomem *addr = odev->cmap_base + 0xb0; 548 void __iomem *data = odev->cmap_base + 0xb4; 549 u32 color = (r << 16) | (g << 8) | b; 550 u32 val; 551 552 /* Set PALETTE_ACCESS_CNTL in DAC_CNTL */ 553 val = readl(dac_ctl); 554 val |= 0x20; 555 writel(val, dac_ctl); 556 557 /* Set color at palette index */ 558 writeb(index, addr); 559 writel(color, data); 560 } 561 562 static void __iomem *ofdrm_radeon_cmap_ioremap(struct ofdrm_device *odev, 563 struct device_node *of_node, 564 u64 fb_base) 565 { 566 return get_cmap_address_of(odev, of_node, 1, 0, 0x1fff); 567 } 568 569 static void __iomem *ofdrm_gxt2000_cmap_ioremap(struct ofdrm_device *odev, 570 struct device_node *of_node, 571 u64 fb_base) 572 { 573 return get_cmap_address_of(odev, of_node, 0, 0x6000, 0x1000); 574 } 575 576 static void ofdrm_gxt2000_cmap_write(struct ofdrm_device *odev, unsigned char index, 577 unsigned char r, unsigned char g, unsigned char b) 578 { 579 void __iomem *data = ((unsigned int __iomem *)odev->cmap_base) + index; 580 u32 color = (r << 16) | (g << 8) | b; 581 582 writel(color, data); 583 } 584 585 static void __iomem *ofdrm_avivo_cmap_ioremap(struct ofdrm_device *odev, 586 struct device_node *of_node, 587 u64 fb_base) 588 { 589 struct device_node *of_parent; 590 void __iomem *cmap_base; 591 592 of_parent = of_get_parent(of_node); 593 cmap_base = get_cmap_address_of(odev, of_parent, 0, 0, 0x10000); 594 of_node_put(of_parent); 595 596 return cmap_base; 597 } 598 599 static void ofdrm_avivo_cmap_write(struct ofdrm_device *odev, unsigned char index, 600 unsigned char r, unsigned char g, unsigned char b) 601 { 602 void __iomem *lutsel = odev->cmap_base + AVIVO_DC_LUT_RW_SELECT; 603 void __iomem *addr = odev->cmap_base + AVIVO_DC_LUT_RW_INDEX; 604 void __iomem *data = odev->cmap_base + AVIVO_DC_LUT_30_COLOR; 605 u32 color = (r << 22) | (g << 12) | (b << 2); 606 607 /* Write to both LUTs for now */ 608 609 writel(1, lutsel); 610 writeb(index, addr); 611 writel(color, data); 612 613 writel(0, lutsel); 614 writeb(index, addr); 615 writel(color, data); 616 } 617 618 static void __iomem *ofdrm_qemu_cmap_ioremap(struct ofdrm_device *odev, 619 struct device_node *of_node, 620 u64 fb_base) 621 { 622 static const __be32 io_of_addr[3] = { 623 cpu_to_be32(0x01000000), 624 cpu_to_be32(0x00), 625 cpu_to_be32(0x00), 626 }; 627 628 struct drm_device *dev = &odev->sysfb.dev; 629 u64 address; 630 void __iomem *cmap_base; 631 632 address = of_translate_address(of_node, io_of_addr); 633 if (address == OF_BAD_ADDR) 634 return IOMEM_ERR_PTR(-ENODEV); 635 636 cmap_base = devm_ioremap(dev->dev, address + 0x3c8, 2); 637 if (!cmap_base) 638 return IOMEM_ERR_PTR(-ENOMEM); 639 640 return cmap_base; 641 } 642 643 static void ofdrm_qemu_cmap_write(struct ofdrm_device *odev, unsigned char index, 644 unsigned char r, unsigned char g, unsigned char b) 645 { 646 void __iomem *addr = odev->cmap_base; 647 void __iomem *data = odev->cmap_base + 1; 648 649 writeb(index, addr); 650 writeb(r, data); 651 writeb(g, data); 652 writeb(b, data); 653 } 654 655 static void ofdrm_device_set_gamma_linear(struct ofdrm_device *odev, 656 const struct drm_format_info *format) 657 { 658 struct drm_device *dev = &odev->sysfb.dev; 659 int i; 660 661 switch (format->format) { 662 case DRM_FORMAT_RGB565: 663 case DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN: 664 /* Use better interpolation, to take 32 values from 0 to 255 */ 665 for (i = 0; i < OFDRM_GAMMA_LUT_SIZE / 8; i++) { 666 unsigned char r = i * 8 + i / 4; 667 unsigned char g = i * 4 + i / 16; 668 unsigned char b = i * 8 + i / 4; 669 670 odev->funcs->cmap_write(odev, i, r, g, b); 671 } 672 /* Green has one more bit, so add padding with 0 for red and blue. */ 673 for (i = OFDRM_GAMMA_LUT_SIZE / 8; i < OFDRM_GAMMA_LUT_SIZE / 4; i++) { 674 unsigned char r = 0; 675 unsigned char g = i * 4 + i / 16; 676 unsigned char b = 0; 677 678 odev->funcs->cmap_write(odev, i, r, g, b); 679 } 680 break; 681 case DRM_FORMAT_XRGB8888: 682 case DRM_FORMAT_BGRX8888: 683 for (i = 0; i < OFDRM_GAMMA_LUT_SIZE; i++) 684 odev->funcs->cmap_write(odev, i, i, i, i); 685 break; 686 default: 687 drm_warn_once(dev, "Unsupported format %p4cc for gamma correction\n", 688 &format->format); 689 break; 690 } 691 } 692 693 static void ofdrm_device_set_gamma(struct ofdrm_device *odev, 694 const struct drm_format_info *format, 695 struct drm_color_lut *lut) 696 { 697 struct drm_device *dev = &odev->sysfb.dev; 698 int i; 699 700 switch (format->format) { 701 case DRM_FORMAT_RGB565: 702 case DRM_FORMAT_RGB565 | DRM_FORMAT_BIG_ENDIAN: 703 /* Use better interpolation, to take 32 values from lut[0] to lut[255] */ 704 for (i = 0; i < OFDRM_GAMMA_LUT_SIZE / 8; i++) { 705 unsigned char r = lut[i * 8 + i / 4].red >> 8; 706 unsigned char g = lut[i * 4 + i / 16].green >> 8; 707 unsigned char b = lut[i * 8 + i / 4].blue >> 8; 708 709 odev->funcs->cmap_write(odev, i, r, g, b); 710 } 711 /* Green has one more bit, so add padding with 0 for red and blue. */ 712 for (i = OFDRM_GAMMA_LUT_SIZE / 8; i < OFDRM_GAMMA_LUT_SIZE / 4; i++) { 713 unsigned char r = 0; 714 unsigned char g = lut[i * 4 + i / 16].green >> 8; 715 unsigned char b = 0; 716 717 odev->funcs->cmap_write(odev, i, r, g, b); 718 } 719 break; 720 case DRM_FORMAT_XRGB8888: 721 case DRM_FORMAT_BGRX8888: 722 for (i = 0; i < OFDRM_GAMMA_LUT_SIZE; i++) { 723 unsigned char r = lut[i].red >> 8; 724 unsigned char g = lut[i].green >> 8; 725 unsigned char b = lut[i].blue >> 8; 726 727 odev->funcs->cmap_write(odev, i, r, g, b); 728 } 729 break; 730 default: 731 drm_warn_once(dev, "Unsupported format %p4cc for gamma correction\n", 732 &format->format); 733 break; 734 } 735 } 736 737 /* 738 * Modesetting 739 */ 740 741 static const u64 ofdrm_primary_plane_format_modifiers[] = { 742 DRM_SYSFB_PLANE_FORMAT_MODIFIERS, 743 }; 744 745 static const struct drm_plane_helper_funcs ofdrm_primary_plane_helper_funcs = { 746 DRM_SYSFB_PLANE_HELPER_FUNCS, 747 }; 748 749 static const struct drm_plane_funcs ofdrm_primary_plane_funcs = { 750 DRM_SYSFB_PLANE_FUNCS, 751 .destroy = drm_plane_cleanup, 752 }; 753 754 static void ofdrm_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state) 755 { 756 struct ofdrm_device *odev = ofdrm_device_of_dev(crtc->dev); 757 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); 758 struct drm_sysfb_crtc_state *sysfb_crtc_state = to_drm_sysfb_crtc_state(crtc_state); 759 760 if (crtc_state->enable && crtc_state->color_mgmt_changed) { 761 const struct drm_format_info *format = sysfb_crtc_state->format; 762 763 if (crtc_state->gamma_lut) 764 ofdrm_device_set_gamma(odev, format, crtc_state->gamma_lut->data); 765 else 766 ofdrm_device_set_gamma_linear(odev, format); 767 } 768 } 769 770 static const struct drm_crtc_helper_funcs ofdrm_crtc_helper_funcs = { 771 DRM_SYSFB_CRTC_HELPER_FUNCS, 772 .atomic_flush = ofdrm_crtc_helper_atomic_flush, 773 }; 774 775 static const struct drm_crtc_funcs ofdrm_crtc_funcs = { 776 DRM_SYSFB_CRTC_FUNCS, 777 .destroy = drm_crtc_cleanup, 778 }; 779 780 static const struct drm_encoder_funcs ofdrm_encoder_funcs = { 781 .destroy = drm_encoder_cleanup, 782 }; 783 784 static const struct drm_connector_helper_funcs ofdrm_connector_helper_funcs = { 785 DRM_SYSFB_CONNECTOR_HELPER_FUNCS, 786 }; 787 788 static const struct drm_connector_funcs ofdrm_connector_funcs = { 789 DRM_SYSFB_CONNECTOR_FUNCS, 790 .destroy = drm_connector_cleanup, 791 }; 792 793 static const struct drm_mode_config_funcs ofdrm_mode_config_funcs = { 794 DRM_SYSFB_MODE_CONFIG_FUNCS, 795 }; 796 797 /* 798 * Init / Cleanup 799 */ 800 801 static const struct ofdrm_device_funcs ofdrm_unknown_device_funcs = { 802 }; 803 804 static const struct ofdrm_device_funcs ofdrm_mach64_device_funcs = { 805 .cmap_ioremap = ofdrm_mach64_cmap_ioremap, 806 .cmap_write = ofdrm_mach64_cmap_write, 807 }; 808 809 static const struct ofdrm_device_funcs ofdrm_rage128_device_funcs = { 810 .cmap_ioremap = ofdrm_rage128_cmap_ioremap, 811 .cmap_write = ofdrm_rage128_cmap_write, 812 }; 813 814 static const struct ofdrm_device_funcs ofdrm_rage_m3a_device_funcs = { 815 .cmap_ioremap = ofdrm_rage_m3a_cmap_ioremap, 816 .cmap_write = ofdrm_rage_m3a_cmap_write, 817 }; 818 819 static const struct ofdrm_device_funcs ofdrm_rage_m3b_device_funcs = { 820 .cmap_ioremap = ofdrm_rage_m3b_cmap_ioremap, 821 .cmap_write = ofdrm_rage_m3b_cmap_write, 822 }; 823 824 static const struct ofdrm_device_funcs ofdrm_radeon_device_funcs = { 825 .cmap_ioremap = ofdrm_radeon_cmap_ioremap, 826 .cmap_write = ofdrm_rage128_cmap_write, /* same as Rage128 */ 827 }; 828 829 static const struct ofdrm_device_funcs ofdrm_gxt2000_device_funcs = { 830 .cmap_ioremap = ofdrm_gxt2000_cmap_ioremap, 831 .cmap_write = ofdrm_gxt2000_cmap_write, 832 }; 833 834 static const struct ofdrm_device_funcs ofdrm_avivo_device_funcs = { 835 .cmap_ioremap = ofdrm_avivo_cmap_ioremap, 836 .cmap_write = ofdrm_avivo_cmap_write, 837 }; 838 839 static const struct ofdrm_device_funcs ofdrm_qemu_device_funcs = { 840 .cmap_ioremap = ofdrm_qemu_cmap_ioremap, 841 .cmap_write = ofdrm_qemu_cmap_write, 842 }; 843 844 static struct ofdrm_device *ofdrm_device_create(struct drm_driver *drv, 845 struct platform_device *pdev) 846 { 847 struct device_node *of_node = pdev->dev.of_node; 848 struct ofdrm_device *odev; 849 struct drm_sysfb_device *sysfb; 850 struct drm_device *dev; 851 enum ofdrm_model model; 852 bool big_endian; 853 int width, height, depth, linebytes; 854 const struct drm_format_info *format; 855 u64 address; 856 const u8 *edid; 857 resource_size_t fb_size, fb_base, fb_pgbase, fb_pgsize; 858 struct resource *res, *mem; 859 void __iomem *screen_base; 860 struct drm_plane *primary_plane; 861 struct drm_crtc *crtc; 862 struct drm_encoder *encoder; 863 struct drm_connector *connector; 864 unsigned long max_width, max_height; 865 size_t nformats; 866 int ret; 867 868 odev = devm_drm_dev_alloc(&pdev->dev, drv, struct ofdrm_device, sysfb.dev); 869 if (IS_ERR(odev)) 870 return ERR_CAST(odev); 871 sysfb = &odev->sysfb; 872 dev = &sysfb->dev; 873 platform_set_drvdata(pdev, dev); 874 875 ret = ofdrm_device_init_pci(odev); 876 if (ret) 877 return ERR_PTR(ret); 878 879 /* 880 * OF display-node settings 881 */ 882 883 model = display_get_model_of(dev, of_node); 884 drm_dbg(dev, "detected model %d\n", model); 885 886 switch (model) { 887 case OFDRM_MODEL_UNKNOWN: 888 odev->funcs = &ofdrm_unknown_device_funcs; 889 break; 890 case OFDRM_MODEL_MACH64: 891 odev->funcs = &ofdrm_mach64_device_funcs; 892 break; 893 case OFDRM_MODEL_RAGE128: 894 odev->funcs = &ofdrm_rage128_device_funcs; 895 break; 896 case OFDRM_MODEL_RAGE_M3A: 897 odev->funcs = &ofdrm_rage_m3a_device_funcs; 898 break; 899 case OFDRM_MODEL_RAGE_M3B: 900 odev->funcs = &ofdrm_rage_m3b_device_funcs; 901 break; 902 case OFDRM_MODEL_RADEON: 903 odev->funcs = &ofdrm_radeon_device_funcs; 904 break; 905 case OFDRM_MODEL_GXT2000: 906 odev->funcs = &ofdrm_gxt2000_device_funcs; 907 break; 908 case OFDRM_MODEL_AVIVO: 909 odev->funcs = &ofdrm_avivo_device_funcs; 910 break; 911 case OFDRM_MODEL_QEMU: 912 odev->funcs = &ofdrm_qemu_device_funcs; 913 break; 914 } 915 916 big_endian = display_get_big_endian_of(dev, of_node); 917 918 width = display_get_width_of(dev, of_node); 919 if (width < 0) 920 return ERR_PTR(width); 921 height = display_get_height_of(dev, of_node); 922 if (height < 0) 923 return ERR_PTR(height); 924 depth = display_get_depth_of(dev, of_node); 925 if (depth < 0) 926 return ERR_PTR(depth); 927 linebytes = display_get_linebytes_of(dev, of_node); 928 if (linebytes < 0) 929 return ERR_PTR(linebytes); 930 931 format = display_get_validated_format(dev, depth, big_endian); 932 if (IS_ERR(format)) 933 return ERR_CAST(format); 934 if (!linebytes) { 935 linebytes = drm_format_info_min_pitch(format, 0, width); 936 if (drm_WARN_ON(dev, !linebytes)) 937 return ERR_PTR(-EINVAL); 938 } 939 940 fb_size = linebytes * height; 941 942 /* 943 * Try to figure out the address of the framebuffer. Unfortunately, Open 944 * Firmware doesn't provide a standard way to do so. All we can do is a 945 * dodgy heuristic that happens to work in practice. 946 * 947 * On most machines, the "address" property contains what we need, though 948 * not on Matrox cards found in IBM machines. What appears to give good 949 * results is to go through the PCI ranges and pick one that encloses the 950 * "address" property. If none match, we pick the largest. 951 */ 952 address = display_get_address_of(dev, of_node); 953 if (address != OF_BAD_ADDR) { 954 struct resource fb_res = DEFINE_RES_MEM(address, fb_size); 955 956 res = ofdrm_find_fb_resource(odev, &fb_res); 957 if (!res) 958 return ERR_PTR(-EINVAL); 959 if (resource_contains(res, &fb_res)) 960 fb_base = address; 961 else 962 fb_base = res->start; 963 } else { 964 struct resource fb_res = DEFINE_RES_MEM(0u, fb_size); 965 966 res = ofdrm_find_fb_resource(odev, &fb_res); 967 if (!res) 968 return ERR_PTR(-EINVAL); 969 fb_base = res->start; 970 } 971 972 /* 973 * I/O resources 974 */ 975 976 fb_pgbase = round_down(fb_base, PAGE_SIZE); 977 fb_pgsize = fb_base - fb_pgbase + round_up(fb_size, PAGE_SIZE); 978 979 ret = devm_aperture_acquire_for_platform_device(pdev, fb_pgbase, fb_pgsize); 980 if (ret) { 981 drm_err(dev, "could not acquire memory range %pr: error %d\n", &res, ret); 982 return ERR_PTR(ret); 983 } 984 985 mem = devm_request_mem_region(&pdev->dev, fb_pgbase, fb_pgsize, drv->name); 986 if (!mem) { 987 drm_warn(dev, "could not acquire memory region %pr\n", &res); 988 return ERR_PTR(-ENOMEM); 989 } 990 991 screen_base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); 992 if (!screen_base) 993 return ERR_PTR(-ENOMEM); 994 995 if (odev->funcs->cmap_ioremap) { 996 void __iomem *cmap_base = odev->funcs->cmap_ioremap(odev, of_node, fb_base); 997 998 if (IS_ERR(cmap_base)) { 999 /* Don't fail; continue without colormap */ 1000 drm_warn(dev, "could not find colormap: error %ld\n", PTR_ERR(cmap_base)); 1001 } else { 1002 odev->cmap_base = cmap_base; 1003 } 1004 } 1005 1006 /* EDID is optional */ 1007 edid = display_get_edid_of(dev, of_node, odev->edid); 1008 1009 /* 1010 * Firmware framebuffer 1011 */ 1012 1013 iosys_map_set_vaddr_iomem(&sysfb->fb_addr, screen_base); 1014 sysfb->fb_mode = drm_sysfb_mode(width, height, 0, 0); 1015 sysfb->fb_format = format; 1016 sysfb->fb_pitch = linebytes; 1017 if (odev->cmap_base) 1018 sysfb->fb_gamma_lut_size = OFDRM_GAMMA_LUT_SIZE; 1019 sysfb->edid = edid; 1020 1021 drm_dbg(dev, "display mode={" DRM_MODE_FMT "}\n", DRM_MODE_ARG(&sysfb->fb_mode)); 1022 drm_dbg(dev, "framebuffer format=%p4cc, size=%dx%d, linebytes=%d byte\n", 1023 &format->format, width, height, linebytes); 1024 1025 /* 1026 * Mode-setting pipeline 1027 */ 1028 1029 ret = drmm_mode_config_init(dev); 1030 if (ret) 1031 return ERR_PTR(ret); 1032 1033 max_width = max_t(unsigned long, width, DRM_SHADOW_PLANE_MAX_WIDTH); 1034 max_height = max_t(unsigned long, height, DRM_SHADOW_PLANE_MAX_HEIGHT); 1035 1036 dev->mode_config.min_width = width; 1037 dev->mode_config.max_width = max_width; 1038 dev->mode_config.min_height = height; 1039 dev->mode_config.max_height = max_height; 1040 dev->mode_config.funcs = &ofdrm_mode_config_funcs; 1041 dev->mode_config.preferred_depth = format->depth; 1042 dev->mode_config.quirk_addfb_prefer_host_byte_order = true; 1043 1044 /* Primary plane */ 1045 1046 nformats = drm_fb_build_fourcc_list(dev, &format->format, 1, 1047 odev->formats, ARRAY_SIZE(odev->formats)); 1048 1049 primary_plane = &odev->primary_plane; 1050 ret = drm_universal_plane_init(dev, primary_plane, 0, &ofdrm_primary_plane_funcs, 1051 odev->formats, nformats, 1052 ofdrm_primary_plane_format_modifiers, 1053 DRM_PLANE_TYPE_PRIMARY, NULL); 1054 if (ret) 1055 return ERR_PTR(ret); 1056 drm_plane_helper_add(primary_plane, &ofdrm_primary_plane_helper_funcs); 1057 drm_plane_enable_fb_damage_clips(primary_plane); 1058 1059 /* CRTC */ 1060 1061 crtc = &odev->crtc; 1062 ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL, 1063 &ofdrm_crtc_funcs, NULL); 1064 if (ret) 1065 return ERR_PTR(ret); 1066 drm_crtc_helper_add(crtc, &ofdrm_crtc_helper_funcs); 1067 1068 if (sysfb->fb_gamma_lut_size) { 1069 ret = drm_mode_crtc_set_gamma_size(crtc, sysfb->fb_gamma_lut_size); 1070 if (!ret) 1071 drm_crtc_enable_color_mgmt(crtc, 0, false, sysfb->fb_gamma_lut_size); 1072 } 1073 1074 /* Encoder */ 1075 1076 encoder = &odev->encoder; 1077 ret = drm_encoder_init(dev, encoder, &ofdrm_encoder_funcs, DRM_MODE_ENCODER_NONE, NULL); 1078 if (ret) 1079 return ERR_PTR(ret); 1080 encoder->possible_crtcs = drm_crtc_mask(crtc); 1081 1082 /* Connector */ 1083 1084 connector = &odev->connector; 1085 ret = drm_connector_init(dev, connector, &ofdrm_connector_funcs, 1086 DRM_MODE_CONNECTOR_Unknown); 1087 if (ret) 1088 return ERR_PTR(ret); 1089 drm_connector_helper_add(connector, &ofdrm_connector_helper_funcs); 1090 drm_connector_set_panel_orientation_with_quirk(connector, 1091 DRM_MODE_PANEL_ORIENTATION_UNKNOWN, 1092 width, height); 1093 if (edid) 1094 drm_connector_attach_edid_property(connector); 1095 1096 ret = drm_connector_attach_encoder(connector, encoder); 1097 if (ret) 1098 return ERR_PTR(ret); 1099 1100 drm_mode_config_reset(dev); 1101 1102 return odev; 1103 } 1104 1105 /* 1106 * DRM driver 1107 */ 1108 1109 DEFINE_DRM_GEM_FOPS(ofdrm_fops); 1110 1111 static struct drm_driver ofdrm_driver = { 1112 DRM_GEM_SHMEM_DRIVER_OPS, 1113 DRM_FBDEV_SHMEM_DRIVER_OPS, 1114 .name = DRIVER_NAME, 1115 .desc = DRIVER_DESC, 1116 .major = DRIVER_MAJOR, 1117 .minor = DRIVER_MINOR, 1118 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, 1119 .fops = &ofdrm_fops, 1120 }; 1121 1122 /* 1123 * Platform driver 1124 */ 1125 1126 static int ofdrm_probe(struct platform_device *pdev) 1127 { 1128 struct ofdrm_device *odev; 1129 struct drm_sysfb_device *sysfb; 1130 struct drm_device *dev; 1131 int ret; 1132 1133 odev = ofdrm_device_create(&ofdrm_driver, pdev); 1134 if (IS_ERR(odev)) 1135 return PTR_ERR(odev); 1136 sysfb = &odev->sysfb; 1137 dev = &sysfb->dev; 1138 1139 ret = drm_dev_register(dev, 0); 1140 if (ret) 1141 return ret; 1142 1143 drm_client_setup(dev, sysfb->fb_format); 1144 1145 return 0; 1146 } 1147 1148 static void ofdrm_remove(struct platform_device *pdev) 1149 { 1150 struct drm_device *dev = platform_get_drvdata(pdev); 1151 1152 drm_dev_unplug(dev); 1153 } 1154 1155 static const struct of_device_id ofdrm_of_match_display[] = { 1156 { .compatible = "display", }, 1157 { }, 1158 }; 1159 MODULE_DEVICE_TABLE(of, ofdrm_of_match_display); 1160 1161 static struct platform_driver ofdrm_platform_driver = { 1162 .driver = { 1163 .name = "of-display", 1164 .of_match_table = ofdrm_of_match_display, 1165 }, 1166 .probe = ofdrm_probe, 1167 .remove = ofdrm_remove, 1168 }; 1169 1170 module_platform_driver(ofdrm_platform_driver); 1171 1172 MODULE_DESCRIPTION(DRIVER_DESC); 1173 MODULE_LICENSE("GPL"); 1174