xref: /linux/drivers/gpu/drm/sun4i/sun8i_mixer.h (revision 5b1f8367f3ea1a74414a4dce3ccb2e76fdd84385)
1 /*
2  * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License as
6  * published by the Free Software Foundation; either version 2 of
7  * the License, or (at your option) any later version.
8  */
9 
10 #ifndef _SUN8I_MIXER_H_
11 #define _SUN8I_MIXER_H_
12 
13 #include <linux/clk.h>
14 #include <linux/regmap.h>
15 #include <linux/reset.h>
16 
17 #include "sunxi_engine.h"
18 
19 #define SUN8I_MIXER_SIZE(w, h)			(((h) - 1) << 16 | ((w) - 1))
20 #define SUN8I_MIXER_COORD(x, y)			((y) << 16 | (x))
21 
22 #define SUN8I_MIXER_GLOBAL_CTL			0x0
23 #define SUN8I_MIXER_GLOBAL_STATUS		0x4
24 #define SUN8I_MIXER_GLOBAL_DBUFF		0x8
25 #define SUN8I_MIXER_GLOBAL_SIZE			0xc
26 
27 #define SUN8I_MIXER_GLOBAL_CTL_RT_EN		BIT(0)
28 
29 #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE		BIT(0)
30 
31 #define SUN8I_MIXER_BLEND_PIPE_CTL		0x1000
32 #define SUN8I_MIXER_BLEND_ATTR_FCOLOR(x)	(0x1004 + 0x10 * (x) + 0x0)
33 #define SUN8I_MIXER_BLEND_ATTR_INSIZE(x)	(0x1004 + 0x10 * (x) + 0x4)
34 #define SUN8I_MIXER_BLEND_ATTR_COORD(x)		(0x1004 + 0x10 * (x) + 0x8)
35 #define SUN8I_MIXER_BLEND_ROUTE			0x1080
36 #define SUN8I_MIXER_BLEND_PREMULTIPLY		0x1084
37 #define SUN8I_MIXER_BLEND_BKCOLOR		0x1088
38 #define SUN8I_MIXER_BLEND_OUTSIZE		0x108c
39 #define SUN8I_MIXER_BLEND_MODE(x)		(0x1090 + 0x04 * (x))
40 #define SUN8I_MIXER_BLEND_CK_CTL		0x10b0
41 #define SUN8I_MIXER_BLEND_CK_CFG		0x10b4
42 #define SUN8I_MIXER_BLEND_CK_MAX(x)		(0x10c0 + 0x04 * (x))
43 #define SUN8I_MIXER_BLEND_CK_MIN(x)		(0x10e0 + 0x04 * (x))
44 #define SUN8I_MIXER_BLEND_OUTCTL		0x10fc
45 
46 #define SUN8I_MIXER_BLEND_PIPE_CTL_EN(pipe)	BIT(8 + pipe)
47 #define SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(pipe)	BIT(pipe)
48 /* colors are always in AARRGGBB format */
49 #define SUN8I_MIXER_BLEND_COLOR_BLACK		0xff000000
50 /* The following numbers are some still unknown magic numbers */
51 #define SUN8I_MIXER_BLEND_MODE_DEF		0x03010301
52 
53 #define SUN8I_MIXER_BLEND_OUTCTL_INTERLACED	BIT(1)
54 
55 #define SUN8I_MIXER_FBFMT_ARGB8888	0
56 #define SUN8I_MIXER_FBFMT_ABGR8888	1
57 #define SUN8I_MIXER_FBFMT_RGBA8888	2
58 #define SUN8I_MIXER_FBFMT_BGRA8888	3
59 #define SUN8I_MIXER_FBFMT_XRGB8888	4
60 #define SUN8I_MIXER_FBFMT_XBGR8888	5
61 #define SUN8I_MIXER_FBFMT_RGBX8888	6
62 #define SUN8I_MIXER_FBFMT_BGRX8888	7
63 #define SUN8I_MIXER_FBFMT_RGB888	8
64 #define SUN8I_MIXER_FBFMT_BGR888	9
65 #define SUN8I_MIXER_FBFMT_RGB565	10
66 #define SUN8I_MIXER_FBFMT_BGR565	11
67 #define SUN8I_MIXER_FBFMT_ARGB4444	12
68 #define SUN8I_MIXER_FBFMT_ABGR4444	13
69 #define SUN8I_MIXER_FBFMT_RGBA4444	14
70 #define SUN8I_MIXER_FBFMT_BGRA4444	15
71 #define SUN8I_MIXER_FBFMT_ARGB1555	16
72 #define SUN8I_MIXER_FBFMT_ABGR1555	17
73 #define SUN8I_MIXER_FBFMT_RGBA5551	18
74 #define SUN8I_MIXER_FBFMT_BGRA5551	19
75 
76 /*
77  * These sub-engines are still unknown now, the EN registers are here only to
78  * be used to disable these sub-engines.
79  */
80 #define SUN8I_MIXER_VSU_EN			0x20000
81 #define SUN8I_MIXER_GSU1_EN			0x30000
82 #define SUN8I_MIXER_GSU2_EN			0x40000
83 #define SUN8I_MIXER_GSU3_EN			0x50000
84 #define SUN8I_MIXER_FCE_EN			0xa0000
85 #define SUN8I_MIXER_BWS_EN			0xa2000
86 #define SUN8I_MIXER_LTI_EN			0xa4000
87 #define SUN8I_MIXER_PEAK_EN			0xa6000
88 #define SUN8I_MIXER_ASE_EN			0xa8000
89 #define SUN8I_MIXER_FCC_EN			0xaa000
90 #define SUN8I_MIXER_DCSC_EN			0xb0000
91 
92 struct de2_fmt_info {
93 	u32 drm_fmt;
94 	u32 de2_fmt;
95 };
96 
97 /**
98  * struct sun8i_mixer_cfg - mixer HW configuration
99  * @vi_num: number of VI channels
100  * @ui_num: number of UI channels
101  * @scaler_mask: bitmask which tells which channel supports scaling
102  *	First, scaler supports for VI channels is defined and after that, scaler
103  *	support for UI channels. For example, if mixer has 2 VI channels without
104  *	scaler and 2 UI channels with scaler, bitmask would be 0xC.
105  */
106 struct sun8i_mixer_cfg {
107 	int		vi_num;
108 	int		ui_num;
109 	int		scaler_mask;
110 };
111 
112 struct sun8i_mixer {
113 	struct sunxi_engine		engine;
114 
115 	const struct sun8i_mixer_cfg	*cfg;
116 
117 	struct reset_control		*reset;
118 
119 	struct clk			*bus_clk;
120 	struct clk			*mod_clk;
121 };
122 
123 static inline struct sun8i_mixer *
124 engine_to_sun8i_mixer(struct sunxi_engine *engine)
125 {
126 	return container_of(engine, struct sun8i_mixer, engine);
127 }
128 
129 const struct de2_fmt_info *sun8i_mixer_format_info(u32 format);
130 #endif /* _SUN8I_MIXER_H_ */
131