xref: /linux/drivers/gpu/drm/sun4i/sun8i_csc.h (revision dec1c62e91ba268ab2a6e339d4d7a59287d5eba1)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Copyright (C) Jernej Skrabec <jernej.skrabec@siol.net>
4  */
5 
6 #ifndef _SUN8I_CSC_H_
7 #define _SUN8I_CSC_H_
8 
9 #include <drm/drm_color_mgmt.h>
10 
11 struct sun8i_mixer;
12 
13 /* VI channel CSC units offsets */
14 #define CCSC00_OFFSET 0xAA050
15 #define CCSC01_OFFSET 0xFA050
16 #define CCSC01_D1_OFFSET 0xFA000
17 #define CCSC10_OFFSET 0xA0000
18 #define CCSC11_OFFSET 0xF0000
19 
20 #define SUN8I_CSC_CTRL(base)		((base) + 0x0)
21 #define SUN8I_CSC_COEFF(base, i)	((base) + 0x10 + 4 * (i))
22 
23 #define SUN8I_CSC_CTRL_EN		BIT(0)
24 
25 enum sun8i_csc_mode {
26 	SUN8I_CSC_MODE_OFF,
27 	SUN8I_CSC_MODE_YUV2RGB,
28 	SUN8I_CSC_MODE_YVU2RGB,
29 };
30 
31 void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer,
32 				     enum sun8i_csc_mode mode,
33 				     enum drm_color_encoding encoding,
34 				     enum drm_color_range range);
35 void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable);
36 
37 #endif
38