1 /* 2 * Copyright (C) STMicroelectronics SA 2014 3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. 4 * License terms: GNU General Public License (GPL), version 2 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/component.h> 9 #include <linux/hdmi.h> 10 #include <linux/module.h> 11 #include <linux/of_gpio.h> 12 #include <linux/platform_device.h> 13 #include <linux/reset.h> 14 15 #include <drm/drmP.h> 16 #include <drm/drm_crtc_helper.h> 17 #include <drm/drm_edid.h> 18 19 #include "sti_hdmi.h" 20 #include "sti_hdmi_tx3g4c28phy.h" 21 #include "sti_hdmi_tx3g0c55phy.h" 22 #include "sti_vtg.h" 23 24 #define HDMI_CFG 0x0000 25 #define HDMI_INT_EN 0x0004 26 #define HDMI_INT_STA 0x0008 27 #define HDMI_INT_CLR 0x000C 28 #define HDMI_STA 0x0010 29 #define HDMI_ACTIVE_VID_XMIN 0x0100 30 #define HDMI_ACTIVE_VID_XMAX 0x0104 31 #define HDMI_ACTIVE_VID_YMIN 0x0108 32 #define HDMI_ACTIVE_VID_YMAX 0x010C 33 #define HDMI_DFLT_CHL0_DAT 0x0110 34 #define HDMI_DFLT_CHL1_DAT 0x0114 35 #define HDMI_DFLT_CHL2_DAT 0x0118 36 #define HDMI_SW_DI_1_HEAD_WORD 0x0210 37 #define HDMI_SW_DI_1_PKT_WORD0 0x0214 38 #define HDMI_SW_DI_1_PKT_WORD1 0x0218 39 #define HDMI_SW_DI_1_PKT_WORD2 0x021C 40 #define HDMI_SW_DI_1_PKT_WORD3 0x0220 41 #define HDMI_SW_DI_1_PKT_WORD4 0x0224 42 #define HDMI_SW_DI_1_PKT_WORD5 0x0228 43 #define HDMI_SW_DI_1_PKT_WORD6 0x022C 44 #define HDMI_SW_DI_CFG 0x0230 45 46 #define HDMI_IFRAME_SLOT_AVI 1 47 48 #define XCAT(prefix, x, suffix) prefix ## x ## suffix 49 #define HDMI_SW_DI_N_HEAD_WORD(x) XCAT(HDMI_SW_DI_, x, _HEAD_WORD) 50 #define HDMI_SW_DI_N_PKT_WORD0(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD0) 51 #define HDMI_SW_DI_N_PKT_WORD1(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD1) 52 #define HDMI_SW_DI_N_PKT_WORD2(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD2) 53 #define HDMI_SW_DI_N_PKT_WORD3(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD3) 54 #define HDMI_SW_DI_N_PKT_WORD4(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD4) 55 #define HDMI_SW_DI_N_PKT_WORD5(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD5) 56 #define HDMI_SW_DI_N_PKT_WORD6(x) XCAT(HDMI_SW_DI_, x, _PKT_WORD6) 57 58 #define HDMI_IFRAME_DISABLED 0x0 59 #define HDMI_IFRAME_SINGLE_SHOT 0x1 60 #define HDMI_IFRAME_FIELD 0x2 61 #define HDMI_IFRAME_FRAME 0x3 62 #define HDMI_IFRAME_MASK 0x3 63 #define HDMI_IFRAME_CFG_DI_N(x, n) ((x) << ((n-1)*4)) /* n from 1 to 6 */ 64 65 #define HDMI_CFG_DEVICE_EN BIT(0) 66 #define HDMI_CFG_HDMI_NOT_DVI BIT(1) 67 #define HDMI_CFG_HDCP_EN BIT(2) 68 #define HDMI_CFG_ESS_NOT_OESS BIT(3) 69 #define HDMI_CFG_H_SYNC_POL_NEG BIT(4) 70 #define HDMI_CFG_SINK_TERM_DET_EN BIT(5) 71 #define HDMI_CFG_V_SYNC_POL_NEG BIT(6) 72 #define HDMI_CFG_422_EN BIT(8) 73 #define HDMI_CFG_FIFO_OVERRUN_CLR BIT(12) 74 #define HDMI_CFG_FIFO_UNDERRUN_CLR BIT(13) 75 #define HDMI_CFG_SW_RST_EN BIT(31) 76 77 #define HDMI_INT_GLOBAL BIT(0) 78 #define HDMI_INT_SW_RST BIT(1) 79 #define HDMI_INT_PIX_CAP BIT(3) 80 #define HDMI_INT_HOT_PLUG BIT(4) 81 #define HDMI_INT_DLL_LCK BIT(5) 82 #define HDMI_INT_NEW_FRAME BIT(6) 83 #define HDMI_INT_GENCTRL_PKT BIT(7) 84 #define HDMI_INT_SINK_TERM_PRESENT BIT(11) 85 86 #define HDMI_DEFAULT_INT (HDMI_INT_SINK_TERM_PRESENT \ 87 | HDMI_INT_DLL_LCK \ 88 | HDMI_INT_HOT_PLUG \ 89 | HDMI_INT_GLOBAL) 90 91 #define HDMI_WORKING_INT (HDMI_INT_SINK_TERM_PRESENT \ 92 | HDMI_INT_GENCTRL_PKT \ 93 | HDMI_INT_NEW_FRAME \ 94 | HDMI_INT_DLL_LCK \ 95 | HDMI_INT_HOT_PLUG \ 96 | HDMI_INT_PIX_CAP \ 97 | HDMI_INT_SW_RST \ 98 | HDMI_INT_GLOBAL) 99 100 #define HDMI_STA_SW_RST BIT(1) 101 102 struct sti_hdmi_connector { 103 struct drm_connector drm_connector; 104 struct drm_encoder *encoder; 105 struct sti_hdmi *hdmi; 106 }; 107 108 #define to_sti_hdmi_connector(x) \ 109 container_of(x, struct sti_hdmi_connector, drm_connector) 110 111 u32 hdmi_read(struct sti_hdmi *hdmi, int offset) 112 { 113 return readl(hdmi->regs + offset); 114 } 115 116 void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset) 117 { 118 writel(val, hdmi->regs + offset); 119 } 120 121 /** 122 * HDMI interrupt handler threaded 123 * 124 * @irq: irq number 125 * @arg: connector structure 126 */ 127 static irqreturn_t hdmi_irq_thread(int irq, void *arg) 128 { 129 struct sti_hdmi *hdmi = arg; 130 131 /* Hot plug/unplug IRQ */ 132 if (hdmi->irq_status & HDMI_INT_HOT_PLUG) { 133 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; 134 if (hdmi->drm_dev) 135 drm_helper_hpd_irq_event(hdmi->drm_dev); 136 } 137 138 /* Sw reset and PLL lock are exclusive so we can use the same 139 * event to signal them 140 */ 141 if (hdmi->irq_status & (HDMI_INT_SW_RST | HDMI_INT_DLL_LCK)) { 142 hdmi->event_received = true; 143 wake_up_interruptible(&hdmi->wait_event); 144 } 145 146 return IRQ_HANDLED; 147 } 148 149 /** 150 * HDMI interrupt handler 151 * 152 * @irq: irq number 153 * @arg: connector structure 154 */ 155 static irqreturn_t hdmi_irq(int irq, void *arg) 156 { 157 struct sti_hdmi *hdmi = arg; 158 159 /* read interrupt status */ 160 hdmi->irq_status = hdmi_read(hdmi, HDMI_INT_STA); 161 162 /* clear interrupt status */ 163 hdmi_write(hdmi, hdmi->irq_status, HDMI_INT_CLR); 164 165 /* force sync bus write */ 166 hdmi_read(hdmi, HDMI_INT_STA); 167 168 return IRQ_WAKE_THREAD; 169 } 170 171 /** 172 * Set hdmi active area depending on the drm display mode selected 173 * 174 * @hdmi: pointer on the hdmi internal structure 175 */ 176 static void hdmi_active_area(struct sti_hdmi *hdmi) 177 { 178 u32 xmin, xmax; 179 u32 ymin, ymax; 180 181 xmin = sti_vtg_get_pixel_number(hdmi->mode, 0); 182 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay - 1); 183 ymin = sti_vtg_get_line_number(hdmi->mode, 0); 184 ymax = sti_vtg_get_line_number(hdmi->mode, hdmi->mode.vdisplay - 1); 185 186 hdmi_write(hdmi, xmin, HDMI_ACTIVE_VID_XMIN); 187 hdmi_write(hdmi, xmax, HDMI_ACTIVE_VID_XMAX); 188 hdmi_write(hdmi, ymin, HDMI_ACTIVE_VID_YMIN); 189 hdmi_write(hdmi, ymax, HDMI_ACTIVE_VID_YMAX); 190 } 191 192 /** 193 * Overall hdmi configuration 194 * 195 * @hdmi: pointer on the hdmi internal structure 196 */ 197 static void hdmi_config(struct sti_hdmi *hdmi) 198 { 199 u32 conf; 200 201 DRM_DEBUG_DRIVER("\n"); 202 203 /* Clear overrun and underrun fifo */ 204 conf = HDMI_CFG_FIFO_OVERRUN_CLR | HDMI_CFG_FIFO_UNDERRUN_CLR; 205 206 /* Enable HDMI mode not DVI */ 207 conf |= HDMI_CFG_HDMI_NOT_DVI | HDMI_CFG_ESS_NOT_OESS; 208 209 /* Enable sink term detection */ 210 conf |= HDMI_CFG_SINK_TERM_DET_EN; 211 212 /* Set Hsync polarity */ 213 if (hdmi->mode.flags & DRM_MODE_FLAG_NHSYNC) { 214 DRM_DEBUG_DRIVER("H Sync Negative\n"); 215 conf |= HDMI_CFG_H_SYNC_POL_NEG; 216 } 217 218 /* Set Vsync polarity */ 219 if (hdmi->mode.flags & DRM_MODE_FLAG_NVSYNC) { 220 DRM_DEBUG_DRIVER("V Sync Negative\n"); 221 conf |= HDMI_CFG_V_SYNC_POL_NEG; 222 } 223 224 /* Enable HDMI */ 225 conf |= HDMI_CFG_DEVICE_EN; 226 227 hdmi_write(hdmi, conf, HDMI_CFG); 228 } 229 230 /** 231 * Prepare and configure the AVI infoframe 232 * 233 * AVI infoframe are transmitted at least once per two video field and 234 * contains information about HDMI transmission mode such as color space, 235 * colorimetry, ... 236 * 237 * @hdmi: pointer on the hdmi internal structure 238 * 239 * Return negative value if error occurs 240 */ 241 static int hdmi_avi_infoframe_config(struct sti_hdmi *hdmi) 242 { 243 struct drm_display_mode *mode = &hdmi->mode; 244 struct hdmi_avi_infoframe infoframe; 245 u8 buffer[HDMI_INFOFRAME_SIZE(AVI)]; 246 u8 *frame = buffer + HDMI_INFOFRAME_HEADER_SIZE; 247 u32 val; 248 int ret; 249 250 DRM_DEBUG_DRIVER("\n"); 251 252 ret = drm_hdmi_avi_infoframe_from_display_mode(&infoframe, mode); 253 if (ret < 0) { 254 DRM_ERROR("failed to setup AVI infoframe: %d\n", ret); 255 return ret; 256 } 257 258 /* fixed infoframe configuration not linked to the mode */ 259 infoframe.colorspace = HDMI_COLORSPACE_RGB; 260 infoframe.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; 261 infoframe.colorimetry = HDMI_COLORIMETRY_NONE; 262 263 ret = hdmi_avi_infoframe_pack(&infoframe, buffer, sizeof(buffer)); 264 if (ret < 0) { 265 DRM_ERROR("failed to pack AVI infoframe: %d\n", ret); 266 return ret; 267 } 268 269 /* Disable transmission slot for AVI infoframe */ 270 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 271 val &= ~HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_MASK, HDMI_IFRAME_SLOT_AVI); 272 hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 273 274 /* Infoframe header */ 275 val = buffer[0]; 276 val |= buffer[1] << 8; 277 val |= buffer[2] << 16; 278 hdmi_write(hdmi, val, HDMI_SW_DI_N_HEAD_WORD(HDMI_IFRAME_SLOT_AVI)); 279 280 /* Infoframe packet bytes */ 281 val = buffer[3]; 282 val |= *(frame++) << 8; 283 val |= *(frame++) << 16; 284 val |= *(frame++) << 24; 285 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD0(HDMI_IFRAME_SLOT_AVI)); 286 287 val = *(frame++); 288 val |= *(frame++) << 8; 289 val |= *(frame++) << 16; 290 val |= *(frame++) << 24; 291 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD1(HDMI_IFRAME_SLOT_AVI)); 292 293 val = *(frame++); 294 val |= *(frame++) << 8; 295 val |= *(frame++) << 16; 296 val |= *(frame++) << 24; 297 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD2(HDMI_IFRAME_SLOT_AVI)); 298 299 val = *(frame++); 300 val |= *(frame) << 8; 301 hdmi_write(hdmi, val, HDMI_SW_DI_N_PKT_WORD3(HDMI_IFRAME_SLOT_AVI)); 302 303 /* Enable transmission slot for AVI infoframe 304 * According to the hdmi specification, AVI infoframe should be 305 * transmitted at least once per two video fields 306 */ 307 val = hdmi_read(hdmi, HDMI_SW_DI_CFG); 308 val |= HDMI_IFRAME_CFG_DI_N(HDMI_IFRAME_FIELD, HDMI_IFRAME_SLOT_AVI); 309 hdmi_write(hdmi, val, HDMI_SW_DI_CFG); 310 311 return 0; 312 } 313 314 /** 315 * Software reset of the hdmi subsystem 316 * 317 * @hdmi: pointer on the hdmi internal structure 318 * 319 */ 320 #define HDMI_TIMEOUT_SWRESET 100 /*milliseconds */ 321 static void hdmi_swreset(struct sti_hdmi *hdmi) 322 { 323 u32 val; 324 325 DRM_DEBUG_DRIVER("\n"); 326 327 /* Enable hdmi_audio clock only during hdmi reset */ 328 if (clk_prepare_enable(hdmi->clk_audio)) 329 DRM_INFO("Failed to prepare/enable hdmi_audio clk\n"); 330 331 /* Sw reset */ 332 hdmi->event_received = false; 333 334 val = hdmi_read(hdmi, HDMI_CFG); 335 val |= HDMI_CFG_SW_RST_EN; 336 hdmi_write(hdmi, val, HDMI_CFG); 337 338 /* Wait reset completed */ 339 wait_event_interruptible_timeout(hdmi->wait_event, 340 hdmi->event_received == true, 341 msecs_to_jiffies 342 (HDMI_TIMEOUT_SWRESET)); 343 344 /* 345 * HDMI_STA_SW_RST bit is set to '1' when SW_RST bit in HDMI_CFG is 346 * set to '1' and clk_audio is running. 347 */ 348 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_SW_RST) == 0) 349 DRM_DEBUG_DRIVER("Warning: HDMI sw reset timeout occurs\n"); 350 351 val = hdmi_read(hdmi, HDMI_CFG); 352 val &= ~HDMI_CFG_SW_RST_EN; 353 hdmi_write(hdmi, val, HDMI_CFG); 354 355 /* Disable hdmi_audio clock. Not used anymore for drm purpose */ 356 clk_disable_unprepare(hdmi->clk_audio); 357 } 358 359 static void sti_hdmi_disable(struct drm_bridge *bridge) 360 { 361 struct sti_hdmi *hdmi = bridge->driver_private; 362 363 u32 val = hdmi_read(hdmi, HDMI_CFG); 364 365 if (!hdmi->enabled) 366 return; 367 368 DRM_DEBUG_DRIVER("\n"); 369 370 /* Disable HDMI */ 371 val &= ~HDMI_CFG_DEVICE_EN; 372 hdmi_write(hdmi, val, HDMI_CFG); 373 374 hdmi_write(hdmi, 0xffffffff, HDMI_INT_CLR); 375 376 /* Stop the phy */ 377 hdmi->phy_ops->stop(hdmi); 378 379 /* Set the default channel data to be a dark red */ 380 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL0_DAT); 381 hdmi_write(hdmi, 0x0000, HDMI_DFLT_CHL1_DAT); 382 hdmi_write(hdmi, 0x0060, HDMI_DFLT_CHL2_DAT); 383 384 /* Disable/unprepare hdmi clock */ 385 clk_disable_unprepare(hdmi->clk_phy); 386 clk_disable_unprepare(hdmi->clk_tmds); 387 clk_disable_unprepare(hdmi->clk_pix); 388 389 hdmi->enabled = false; 390 } 391 392 static void sti_hdmi_pre_enable(struct drm_bridge *bridge) 393 { 394 struct sti_hdmi *hdmi = bridge->driver_private; 395 396 DRM_DEBUG_DRIVER("\n"); 397 398 if (hdmi->enabled) 399 return; 400 401 /* Prepare/enable clocks */ 402 if (clk_prepare_enable(hdmi->clk_pix)) 403 DRM_ERROR("Failed to prepare/enable hdmi_pix clk\n"); 404 if (clk_prepare_enable(hdmi->clk_tmds)) 405 DRM_ERROR("Failed to prepare/enable hdmi_tmds clk\n"); 406 if (clk_prepare_enable(hdmi->clk_phy)) 407 DRM_ERROR("Failed to prepare/enable hdmi_rejec_pll clk\n"); 408 409 hdmi->enabled = true; 410 411 /* Program hdmi serializer and start phy */ 412 if (!hdmi->phy_ops->start(hdmi)) { 413 DRM_ERROR("Unable to start hdmi phy\n"); 414 return; 415 } 416 417 /* Program hdmi active area */ 418 hdmi_active_area(hdmi); 419 420 /* Enable working interrupts */ 421 hdmi_write(hdmi, HDMI_WORKING_INT, HDMI_INT_EN); 422 423 /* Program hdmi config */ 424 hdmi_config(hdmi); 425 426 /* Program AVI infoframe */ 427 if (hdmi_avi_infoframe_config(hdmi)) 428 DRM_ERROR("Unable to configure AVI infoframe\n"); 429 430 /* Sw reset */ 431 hdmi_swreset(hdmi); 432 } 433 434 static void sti_hdmi_set_mode(struct drm_bridge *bridge, 435 struct drm_display_mode *mode, 436 struct drm_display_mode *adjusted_mode) 437 { 438 struct sti_hdmi *hdmi = bridge->driver_private; 439 int ret; 440 441 DRM_DEBUG_DRIVER("\n"); 442 443 /* Copy the drm display mode in the connector local structure */ 444 memcpy(&hdmi->mode, mode, sizeof(struct drm_display_mode)); 445 446 /* Update clock framerate according to the selected mode */ 447 ret = clk_set_rate(hdmi->clk_pix, mode->clock * 1000); 448 if (ret < 0) { 449 DRM_ERROR("Cannot set rate (%dHz) for hdmi_pix clk\n", 450 mode->clock * 1000); 451 return; 452 } 453 ret = clk_set_rate(hdmi->clk_phy, mode->clock * 1000); 454 if (ret < 0) { 455 DRM_ERROR("Cannot set rate (%dHz) for hdmi_rejection_pll clk\n", 456 mode->clock * 1000); 457 return; 458 } 459 } 460 461 static void sti_hdmi_bridge_nope(struct drm_bridge *bridge) 462 { 463 /* do nothing */ 464 } 465 466 static void sti_hdmi_brigde_destroy(struct drm_bridge *bridge) 467 { 468 drm_bridge_cleanup(bridge); 469 kfree(bridge); 470 } 471 472 static const struct drm_bridge_funcs sti_hdmi_bridge_funcs = { 473 .pre_enable = sti_hdmi_pre_enable, 474 .enable = sti_hdmi_bridge_nope, 475 .disable = sti_hdmi_disable, 476 .post_disable = sti_hdmi_bridge_nope, 477 .mode_set = sti_hdmi_set_mode, 478 .destroy = sti_hdmi_brigde_destroy, 479 }; 480 481 static int sti_hdmi_connector_get_modes(struct drm_connector *connector) 482 { 483 struct sti_hdmi_connector *hdmi_connector 484 = to_sti_hdmi_connector(connector); 485 struct sti_hdmi *hdmi = hdmi_connector->hdmi; 486 struct edid *edid; 487 int count; 488 489 DRM_DEBUG_DRIVER("\n"); 490 491 edid = drm_get_edid(connector, hdmi->ddc_adapt); 492 if (!edid) 493 goto fail; 494 495 count = drm_add_edid_modes(connector, edid); 496 drm_mode_connector_update_edid_property(connector, edid); 497 498 kfree(edid); 499 return count; 500 501 fail: 502 DRM_ERROR("Can not read HDMI EDID\n"); 503 return 0; 504 } 505 506 #define CLK_TOLERANCE_HZ 50 507 508 static int sti_hdmi_connector_mode_valid(struct drm_connector *connector, 509 struct drm_display_mode *mode) 510 { 511 int target = mode->clock * 1000; 512 int target_min = target - CLK_TOLERANCE_HZ; 513 int target_max = target + CLK_TOLERANCE_HZ; 514 int result; 515 struct sti_hdmi_connector *hdmi_connector 516 = to_sti_hdmi_connector(connector); 517 struct sti_hdmi *hdmi = hdmi_connector->hdmi; 518 519 520 result = clk_round_rate(hdmi->clk_pix, target); 521 522 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n", 523 target, result); 524 525 if ((result < target_min) || (result > target_max)) { 526 DRM_DEBUG_DRIVER("hdmi pixclk=%d not supported\n", target); 527 return MODE_BAD; 528 } 529 530 return MODE_OK; 531 } 532 533 struct drm_encoder *sti_hdmi_best_encoder(struct drm_connector *connector) 534 { 535 struct sti_hdmi_connector *hdmi_connector 536 = to_sti_hdmi_connector(connector); 537 538 /* Best encoder is the one associated during connector creation */ 539 return hdmi_connector->encoder; 540 } 541 542 static struct drm_connector_helper_funcs sti_hdmi_connector_helper_funcs = { 543 .get_modes = sti_hdmi_connector_get_modes, 544 .mode_valid = sti_hdmi_connector_mode_valid, 545 .best_encoder = sti_hdmi_best_encoder, 546 }; 547 548 /* get detection status of display device */ 549 static enum drm_connector_status 550 sti_hdmi_connector_detect(struct drm_connector *connector, bool force) 551 { 552 struct sti_hdmi_connector *hdmi_connector 553 = to_sti_hdmi_connector(connector); 554 struct sti_hdmi *hdmi = hdmi_connector->hdmi; 555 556 DRM_DEBUG_DRIVER("\n"); 557 558 if (hdmi->hpd) { 559 DRM_DEBUG_DRIVER("hdmi cable connected\n"); 560 return connector_status_connected; 561 } 562 563 DRM_DEBUG_DRIVER("hdmi cable disconnected\n"); 564 return connector_status_disconnected; 565 } 566 567 static void sti_hdmi_connector_destroy(struct drm_connector *connector) 568 { 569 struct sti_hdmi_connector *hdmi_connector 570 = to_sti_hdmi_connector(connector); 571 572 drm_connector_unregister(connector); 573 drm_connector_cleanup(connector); 574 kfree(hdmi_connector); 575 } 576 577 static struct drm_connector_funcs sti_hdmi_connector_funcs = { 578 .dpms = drm_helper_connector_dpms, 579 .fill_modes = drm_helper_probe_single_connector_modes, 580 .detect = sti_hdmi_connector_detect, 581 .destroy = sti_hdmi_connector_destroy, 582 }; 583 584 static struct drm_encoder *sti_hdmi_find_encoder(struct drm_device *dev) 585 { 586 struct drm_encoder *encoder; 587 588 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 589 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS) 590 return encoder; 591 } 592 593 return NULL; 594 } 595 596 static int sti_hdmi_bind(struct device *dev, struct device *master, void *data) 597 { 598 struct sti_hdmi *hdmi = dev_get_drvdata(dev); 599 struct drm_device *drm_dev = data; 600 struct drm_encoder *encoder; 601 struct sti_hdmi_connector *connector; 602 struct drm_connector *drm_connector; 603 struct drm_bridge *bridge; 604 struct device_node *ddc; 605 int err; 606 607 ddc = of_parse_phandle(dev->of_node, "ddc", 0); 608 if (ddc) { 609 hdmi->ddc_adapt = of_find_i2c_adapter_by_node(ddc); 610 if (!hdmi->ddc_adapt) { 611 err = -EPROBE_DEFER; 612 of_node_put(ddc); 613 return err; 614 } 615 616 of_node_put(ddc); 617 } 618 619 /* Set the drm device handle */ 620 hdmi->drm_dev = drm_dev; 621 622 encoder = sti_hdmi_find_encoder(drm_dev); 623 if (!encoder) 624 goto err_adapt; 625 626 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL); 627 if (!connector) 628 goto err_adapt; 629 630 631 connector->hdmi = hdmi; 632 633 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL); 634 if (!bridge) 635 goto err_adapt; 636 637 bridge->driver_private = hdmi; 638 drm_bridge_init(drm_dev, bridge, &sti_hdmi_bridge_funcs); 639 640 encoder->bridge = bridge; 641 connector->encoder = encoder; 642 643 drm_connector = (struct drm_connector *)connector; 644 645 drm_connector->polled = DRM_CONNECTOR_POLL_HPD; 646 647 drm_connector_init(drm_dev, drm_connector, 648 &sti_hdmi_connector_funcs, DRM_MODE_CONNECTOR_HDMIA); 649 drm_connector_helper_add(drm_connector, 650 &sti_hdmi_connector_helper_funcs); 651 652 err = drm_connector_register(drm_connector); 653 if (err) 654 goto err_connector; 655 656 err = drm_mode_connector_attach_encoder(drm_connector, encoder); 657 if (err) { 658 DRM_ERROR("Failed to attach a connector to a encoder\n"); 659 goto err_sysfs; 660 } 661 662 /* Enable default interrupts */ 663 hdmi_write(hdmi, HDMI_DEFAULT_INT, HDMI_INT_EN); 664 665 return 0; 666 667 err_sysfs: 668 drm_connector_unregister(drm_connector); 669 err_connector: 670 drm_bridge_cleanup(bridge); 671 drm_connector_cleanup(drm_connector); 672 err_adapt: 673 put_device(&hdmi->ddc_adapt->dev); 674 return -EINVAL; 675 } 676 677 static void sti_hdmi_unbind(struct device *dev, 678 struct device *master, void *data) 679 { 680 /* do nothing */ 681 } 682 683 static const struct component_ops sti_hdmi_ops = { 684 .bind = sti_hdmi_bind, 685 .unbind = sti_hdmi_unbind, 686 }; 687 688 static const struct of_device_id hdmi_of_match[] = { 689 { 690 .compatible = "st,stih416-hdmi", 691 .data = &tx3g0c55phy_ops, 692 }, { 693 .compatible = "st,stih407-hdmi", 694 .data = &tx3g4c28phy_ops, 695 }, { 696 /* end node */ 697 } 698 }; 699 MODULE_DEVICE_TABLE(of, hdmi_of_match); 700 701 static int sti_hdmi_probe(struct platform_device *pdev) 702 { 703 struct device *dev = &pdev->dev; 704 struct sti_hdmi *hdmi; 705 struct device_node *np = dev->of_node; 706 struct resource *res; 707 int ret; 708 709 DRM_INFO("%s\n", __func__); 710 711 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); 712 if (!hdmi) 713 return -ENOMEM; 714 715 hdmi->dev = pdev->dev; 716 717 /* Get resources */ 718 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hdmi-reg"); 719 if (!res) { 720 DRM_ERROR("Invalid hdmi resource\n"); 721 return -ENOMEM; 722 } 723 hdmi->regs = devm_ioremap_nocache(dev, res->start, resource_size(res)); 724 if (!hdmi->regs) 725 return -ENOMEM; 726 727 if (of_device_is_compatible(np, "st,stih416-hdmi")) { 728 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 729 "syscfg"); 730 if (!res) { 731 DRM_ERROR("Invalid syscfg resource\n"); 732 return -ENOMEM; 733 } 734 hdmi->syscfg = devm_ioremap_nocache(dev, res->start, 735 resource_size(res)); 736 if (!hdmi->syscfg) 737 return -ENOMEM; 738 739 } 740 741 hdmi->phy_ops = (struct hdmi_phy_ops *) 742 of_match_node(hdmi_of_match, np)->data; 743 744 /* Get clock resources */ 745 hdmi->clk_pix = devm_clk_get(dev, "pix"); 746 if (IS_ERR(hdmi->clk_pix)) { 747 DRM_ERROR("Cannot get hdmi_pix clock\n"); 748 return PTR_ERR(hdmi->clk_pix); 749 } 750 751 hdmi->clk_tmds = devm_clk_get(dev, "tmds"); 752 if (IS_ERR(hdmi->clk_tmds)) { 753 DRM_ERROR("Cannot get hdmi_tmds clock\n"); 754 return PTR_ERR(hdmi->clk_tmds); 755 } 756 757 hdmi->clk_phy = devm_clk_get(dev, "phy"); 758 if (IS_ERR(hdmi->clk_phy)) { 759 DRM_ERROR("Cannot get hdmi_phy clock\n"); 760 return PTR_ERR(hdmi->clk_phy); 761 } 762 763 hdmi->clk_audio = devm_clk_get(dev, "audio"); 764 if (IS_ERR(hdmi->clk_audio)) { 765 DRM_ERROR("Cannot get hdmi_audio clock\n"); 766 return PTR_ERR(hdmi->clk_audio); 767 } 768 769 hdmi->hpd = readl(hdmi->regs + HDMI_STA) & HDMI_STA_HOT_PLUG; 770 771 init_waitqueue_head(&hdmi->wait_event); 772 773 hdmi->irq = platform_get_irq_byname(pdev, "irq"); 774 775 ret = devm_request_threaded_irq(dev, hdmi->irq, hdmi_irq, 776 hdmi_irq_thread, IRQF_ONESHOT, dev_name(dev), hdmi); 777 if (ret) { 778 DRM_ERROR("Failed to register HDMI interrupt\n"); 779 return ret; 780 } 781 782 hdmi->reset = devm_reset_control_get(dev, "hdmi"); 783 /* Take hdmi out of reset */ 784 if (!IS_ERR(hdmi->reset)) 785 reset_control_deassert(hdmi->reset); 786 787 platform_set_drvdata(pdev, hdmi); 788 789 return component_add(&pdev->dev, &sti_hdmi_ops); 790 } 791 792 static int sti_hdmi_remove(struct platform_device *pdev) 793 { 794 struct sti_hdmi *hdmi = dev_get_drvdata(&pdev->dev); 795 796 if (hdmi->ddc_adapt) 797 put_device(&hdmi->ddc_adapt->dev); 798 799 component_del(&pdev->dev, &sti_hdmi_ops); 800 return 0; 801 } 802 803 struct platform_driver sti_hdmi_driver = { 804 .driver = { 805 .name = "sti-hdmi", 806 .owner = THIS_MODULE, 807 .of_match_table = hdmi_of_match, 808 }, 809 .probe = sti_hdmi_probe, 810 .remove = sti_hdmi_remove, 811 }; 812 813 module_platform_driver(sti_hdmi_driver); 814 815 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 816 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 817 MODULE_LICENSE("GPL"); 818