1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) STMicroelectronics SA 2014 4 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/component.h> 9 #include <linux/debugfs.h> 10 #include <linux/module.h> 11 #include <linux/of_gpio.h> 12 #include <linux/platform_device.h> 13 14 #include <drm/drm_atomic_helper.h> 15 #include <drm/drm_device.h> 16 #include <drm/drm_panel.h> 17 #include <drm/drm_print.h> 18 #include <drm/drm_probe_helper.h> 19 20 #include "sti_awg_utils.h" 21 #include "sti_drv.h" 22 #include "sti_mixer.h" 23 24 /* DVO registers */ 25 #define DVO_AWG_DIGSYNC_CTRL 0x0000 26 #define DVO_DOF_CFG 0x0004 27 #define DVO_LUT_PROG_LOW 0x0008 28 #define DVO_LUT_PROG_MID 0x000C 29 #define DVO_LUT_PROG_HIGH 0x0010 30 #define DVO_DIGSYNC_INSTR_I 0x0100 31 32 #define DVO_AWG_CTRL_EN BIT(0) 33 #define DVO_AWG_FRAME_BASED_SYNC BIT(2) 34 35 #define DVO_DOF_EN_LOWBYTE BIT(0) 36 #define DVO_DOF_EN_MIDBYTE BIT(1) 37 #define DVO_DOF_EN_HIGHBYTE BIT(2) 38 #define DVO_DOF_EN BIT(6) 39 #define DVO_DOF_MOD_COUNT_SHIFT 8 40 41 #define DVO_LUT_ZERO 0 42 #define DVO_LUT_Y_G 1 43 #define DVO_LUT_Y_G_DEL 2 44 #define DVO_LUT_CB_B 3 45 #define DVO_LUT_CB_B_DEL 4 46 #define DVO_LUT_CR_R 5 47 #define DVO_LUT_CR_R_DEL 6 48 #define DVO_LUT_HOLD 7 49 50 struct dvo_config { 51 u32 flags; 52 u32 lowbyte; 53 u32 midbyte; 54 u32 highbyte; 55 int (*awg_fwgen_fct)( 56 struct awg_code_generation_params *fw_gen_params, 57 struct awg_timing *timing); 58 }; 59 60 static struct dvo_config rgb_24bit_de_cfg = { 61 .flags = (0L << DVO_DOF_MOD_COUNT_SHIFT), 62 .lowbyte = DVO_LUT_CR_R, 63 .midbyte = DVO_LUT_Y_G, 64 .highbyte = DVO_LUT_CB_B, 65 .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode, 66 }; 67 68 /** 69 * STI digital video output structure 70 * 71 * @dev: driver device 72 * @drm_dev: pointer to drm device 73 * @mode: current display mode selected 74 * @regs: dvo registers 75 * @clk_pix: pixel clock for dvo 76 * @clk: clock for dvo 77 * @clk_main_parent: dvo parent clock if main path used 78 * @clk_aux_parent: dvo parent clock if aux path used 79 * @panel_node: panel node reference from device tree 80 * @panel: reference to the panel connected to the dvo 81 * @enabled: true if dvo is enabled else false 82 * @encoder: drm_encoder it is bound 83 */ 84 struct sti_dvo { 85 struct device dev; 86 struct drm_device *drm_dev; 87 struct drm_display_mode mode; 88 void __iomem *regs; 89 struct clk *clk_pix; 90 struct clk *clk; 91 struct clk *clk_main_parent; 92 struct clk *clk_aux_parent; 93 struct device_node *panel_node; 94 struct drm_panel *panel; 95 struct dvo_config *config; 96 bool enabled; 97 struct drm_encoder *encoder; 98 struct drm_bridge *bridge; 99 }; 100 101 struct sti_dvo_connector { 102 struct drm_connector drm_connector; 103 struct drm_encoder *encoder; 104 struct sti_dvo *dvo; 105 }; 106 107 #define to_sti_dvo_connector(x) \ 108 container_of(x, struct sti_dvo_connector, drm_connector) 109 110 #define BLANKING_LEVEL 16 111 static int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code) 112 { 113 struct drm_display_mode *mode = &dvo->mode; 114 struct dvo_config *config = dvo->config; 115 struct awg_code_generation_params fw_gen_params; 116 struct awg_timing timing; 117 118 fw_gen_params.ram_code = ram_code; 119 fw_gen_params.instruction_offset = 0; 120 121 timing.total_lines = mode->vtotal; 122 timing.active_lines = mode->vdisplay; 123 timing.blanking_lines = mode->vsync_start - mode->vdisplay; 124 timing.trailing_lines = mode->vtotal - mode->vsync_start; 125 timing.total_pixels = mode->htotal; 126 timing.active_pixels = mode->hdisplay; 127 timing.blanking_pixels = mode->hsync_start - mode->hdisplay; 128 timing.trailing_pixels = mode->htotal - mode->hsync_start; 129 timing.blanking_level = BLANKING_LEVEL; 130 131 if (config->awg_fwgen_fct(&fw_gen_params, &timing)) { 132 DRM_ERROR("AWG firmware not properly generated\n"); 133 return -EINVAL; 134 } 135 136 *ram_size = fw_gen_params.instruction_offset; 137 138 return 0; 139 } 140 141 /* Configure AWG, writing instructions 142 * 143 * @dvo: pointer to DVO structure 144 * @awg_ram_code: pointer to AWG instructions table 145 * @nb: nb of AWG instructions 146 */ 147 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb) 148 { 149 int i; 150 151 DRM_DEBUG_DRIVER("\n"); 152 153 for (i = 0; i < nb; i++) 154 writel(awg_ram_code[i], 155 dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); 156 for (i = nb; i < AWG_MAX_INST; i++) 157 writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); 158 159 writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 160 } 161 162 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \ 163 readl(dvo->regs + reg)) 164 165 static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg) 166 { 167 unsigned int i; 168 169 seq_puts(s, "\n\n"); 170 seq_puts(s, " DVO AWG microcode:"); 171 for (i = 0; i < AWG_MAX_INST; i++) { 172 if (i % 8 == 0) 173 seq_printf(s, "\n %04X:", i); 174 seq_printf(s, " %04X", readl(reg + i * 4)); 175 } 176 } 177 178 static int dvo_dbg_show(struct seq_file *s, void *data) 179 { 180 struct drm_info_node *node = s->private; 181 struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data; 182 183 seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs); 184 DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL); 185 DBGFS_DUMP(DVO_DOF_CFG); 186 DBGFS_DUMP(DVO_LUT_PROG_LOW); 187 DBGFS_DUMP(DVO_LUT_PROG_MID); 188 DBGFS_DUMP(DVO_LUT_PROG_HIGH); 189 dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I); 190 seq_putc(s, '\n'); 191 return 0; 192 } 193 194 static struct drm_info_list dvo_debugfs_files[] = { 195 { "dvo", dvo_dbg_show, 0, NULL }, 196 }; 197 198 static int dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor) 199 { 200 unsigned int i; 201 202 for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++) 203 dvo_debugfs_files[i].data = dvo; 204 205 return drm_debugfs_create_files(dvo_debugfs_files, 206 ARRAY_SIZE(dvo_debugfs_files), 207 minor->debugfs_root, minor); 208 } 209 210 static void sti_dvo_disable(struct drm_bridge *bridge) 211 { 212 struct sti_dvo *dvo = bridge->driver_private; 213 214 if (!dvo->enabled) 215 return; 216 217 DRM_DEBUG_DRIVER("\n"); 218 219 if (dvo->config->awg_fwgen_fct) 220 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 221 222 writel(0x00000000, dvo->regs + DVO_DOF_CFG); 223 224 drm_panel_disable(dvo->panel); 225 226 /* Disable/unprepare dvo clock */ 227 clk_disable_unprepare(dvo->clk_pix); 228 clk_disable_unprepare(dvo->clk); 229 230 dvo->enabled = false; 231 } 232 233 static void sti_dvo_pre_enable(struct drm_bridge *bridge) 234 { 235 struct sti_dvo *dvo = bridge->driver_private; 236 struct dvo_config *config = dvo->config; 237 u32 val; 238 239 DRM_DEBUG_DRIVER("\n"); 240 241 if (dvo->enabled) 242 return; 243 244 /* Make sure DVO is disabled */ 245 writel(0x00000000, dvo->regs + DVO_DOF_CFG); 246 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 247 248 if (config->awg_fwgen_fct) { 249 u8 nb_instr; 250 u32 awg_ram_code[AWG_MAX_INST]; 251 /* Configure AWG */ 252 if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code)) 253 dvo_awg_configure(dvo, awg_ram_code, nb_instr); 254 else 255 return; 256 } 257 258 /* Prepare/enable clocks */ 259 if (clk_prepare_enable(dvo->clk_pix)) 260 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n"); 261 if (clk_prepare_enable(dvo->clk)) 262 DRM_ERROR("Failed to prepare/enable dvo clk\n"); 263 264 drm_panel_enable(dvo->panel); 265 266 /* Set LUT */ 267 writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW); 268 writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID); 269 writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH); 270 271 /* Digital output formatter config */ 272 val = (config->flags | DVO_DOF_EN); 273 writel(val, dvo->regs + DVO_DOF_CFG); 274 275 dvo->enabled = true; 276 } 277 278 static void sti_dvo_set_mode(struct drm_bridge *bridge, 279 const struct drm_display_mode *mode, 280 const struct drm_display_mode *adjusted_mode) 281 { 282 struct sti_dvo *dvo = bridge->driver_private; 283 struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc); 284 int rate = mode->clock * 1000; 285 struct clk *clkp; 286 int ret; 287 288 DRM_DEBUG_DRIVER("\n"); 289 290 memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode)); 291 292 /* According to the path used (main or aux), the dvo clocks should 293 * have a different parent clock. */ 294 if (mixer->id == STI_MIXER_MAIN) 295 clkp = dvo->clk_main_parent; 296 else 297 clkp = dvo->clk_aux_parent; 298 299 if (clkp) { 300 clk_set_parent(dvo->clk_pix, clkp); 301 clk_set_parent(dvo->clk, clkp); 302 } 303 304 /* DVO clocks = compositor clock */ 305 ret = clk_set_rate(dvo->clk_pix, rate); 306 if (ret < 0) { 307 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate); 308 return; 309 } 310 311 ret = clk_set_rate(dvo->clk, rate); 312 if (ret < 0) { 313 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate); 314 return; 315 } 316 317 /* For now, we only support 24bit data enable (DE) synchro format */ 318 dvo->config = &rgb_24bit_de_cfg; 319 } 320 321 static void sti_dvo_bridge_nope(struct drm_bridge *bridge) 322 { 323 /* do nothing */ 324 } 325 326 static const struct drm_bridge_funcs sti_dvo_bridge_funcs = { 327 .pre_enable = sti_dvo_pre_enable, 328 .enable = sti_dvo_bridge_nope, 329 .disable = sti_dvo_disable, 330 .post_disable = sti_dvo_bridge_nope, 331 .mode_set = sti_dvo_set_mode, 332 }; 333 334 static int sti_dvo_connector_get_modes(struct drm_connector *connector) 335 { 336 struct sti_dvo_connector *dvo_connector 337 = to_sti_dvo_connector(connector); 338 struct sti_dvo *dvo = dvo_connector->dvo; 339 340 if (dvo->panel) 341 return drm_panel_get_modes(dvo->panel); 342 343 return 0; 344 } 345 346 #define CLK_TOLERANCE_HZ 50 347 348 static int sti_dvo_connector_mode_valid(struct drm_connector *connector, 349 struct drm_display_mode *mode) 350 { 351 int target = mode->clock * 1000; 352 int target_min = target - CLK_TOLERANCE_HZ; 353 int target_max = target + CLK_TOLERANCE_HZ; 354 int result; 355 struct sti_dvo_connector *dvo_connector 356 = to_sti_dvo_connector(connector); 357 struct sti_dvo *dvo = dvo_connector->dvo; 358 359 result = clk_round_rate(dvo->clk_pix, target); 360 361 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n", 362 target, result); 363 364 if ((result < target_min) || (result > target_max)) { 365 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target); 366 return MODE_BAD; 367 } 368 369 return MODE_OK; 370 } 371 372 static const 373 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = { 374 .get_modes = sti_dvo_connector_get_modes, 375 .mode_valid = sti_dvo_connector_mode_valid, 376 }; 377 378 static enum drm_connector_status 379 sti_dvo_connector_detect(struct drm_connector *connector, bool force) 380 { 381 struct sti_dvo_connector *dvo_connector 382 = to_sti_dvo_connector(connector); 383 struct sti_dvo *dvo = dvo_connector->dvo; 384 385 DRM_DEBUG_DRIVER("\n"); 386 387 if (!dvo->panel) { 388 dvo->panel = of_drm_find_panel(dvo->panel_node); 389 if (IS_ERR(dvo->panel)) 390 dvo->panel = NULL; 391 else 392 drm_panel_attach(dvo->panel, connector); 393 } 394 395 if (dvo->panel) 396 return connector_status_connected; 397 398 return connector_status_disconnected; 399 } 400 401 static int sti_dvo_late_register(struct drm_connector *connector) 402 { 403 struct sti_dvo_connector *dvo_connector 404 = to_sti_dvo_connector(connector); 405 struct sti_dvo *dvo = dvo_connector->dvo; 406 407 if (dvo_debugfs_init(dvo, dvo->drm_dev->primary)) { 408 DRM_ERROR("DVO debugfs setup failed\n"); 409 return -EINVAL; 410 } 411 412 return 0; 413 } 414 415 static const struct drm_connector_funcs sti_dvo_connector_funcs = { 416 .fill_modes = drm_helper_probe_single_connector_modes, 417 .detect = sti_dvo_connector_detect, 418 .destroy = drm_connector_cleanup, 419 .reset = drm_atomic_helper_connector_reset, 420 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 421 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 422 .late_register = sti_dvo_late_register, 423 }; 424 425 static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev) 426 { 427 struct drm_encoder *encoder; 428 429 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 430 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) 431 return encoder; 432 } 433 434 return NULL; 435 } 436 437 static int sti_dvo_bind(struct device *dev, struct device *master, void *data) 438 { 439 struct sti_dvo *dvo = dev_get_drvdata(dev); 440 struct drm_device *drm_dev = data; 441 struct drm_encoder *encoder; 442 struct sti_dvo_connector *connector; 443 struct drm_connector *drm_connector; 444 struct drm_bridge *bridge; 445 int err; 446 447 /* Set the drm device handle */ 448 dvo->drm_dev = drm_dev; 449 450 encoder = sti_dvo_find_encoder(drm_dev); 451 if (!encoder) 452 return -ENOMEM; 453 454 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL); 455 if (!connector) 456 return -ENOMEM; 457 458 connector->dvo = dvo; 459 460 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL); 461 if (!bridge) 462 return -ENOMEM; 463 464 bridge->driver_private = dvo; 465 bridge->funcs = &sti_dvo_bridge_funcs; 466 bridge->of_node = dvo->dev.of_node; 467 drm_bridge_add(bridge); 468 469 err = drm_bridge_attach(encoder, bridge, NULL); 470 if (err) { 471 DRM_ERROR("Failed to attach bridge\n"); 472 return err; 473 } 474 475 dvo->bridge = bridge; 476 connector->encoder = encoder; 477 dvo->encoder = encoder; 478 479 drm_connector = (struct drm_connector *)connector; 480 481 drm_connector->polled = DRM_CONNECTOR_POLL_HPD; 482 483 drm_connector_init(drm_dev, drm_connector, 484 &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS); 485 drm_connector_helper_add(drm_connector, 486 &sti_dvo_connector_helper_funcs); 487 488 err = drm_connector_attach_encoder(drm_connector, encoder); 489 if (err) { 490 DRM_ERROR("Failed to attach a connector to a encoder\n"); 491 goto err_sysfs; 492 } 493 494 return 0; 495 496 err_sysfs: 497 drm_bridge_remove(bridge); 498 return -EINVAL; 499 } 500 501 static void sti_dvo_unbind(struct device *dev, 502 struct device *master, void *data) 503 { 504 struct sti_dvo *dvo = dev_get_drvdata(dev); 505 506 drm_bridge_remove(dvo->bridge); 507 } 508 509 static const struct component_ops sti_dvo_ops = { 510 .bind = sti_dvo_bind, 511 .unbind = sti_dvo_unbind, 512 }; 513 514 static int sti_dvo_probe(struct platform_device *pdev) 515 { 516 struct device *dev = &pdev->dev; 517 struct sti_dvo *dvo; 518 struct resource *res; 519 struct device_node *np = dev->of_node; 520 521 DRM_INFO("%s\n", __func__); 522 523 dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL); 524 if (!dvo) { 525 DRM_ERROR("Failed to allocate memory for DVO\n"); 526 return -ENOMEM; 527 } 528 529 dvo->dev = pdev->dev; 530 531 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg"); 532 if (!res) { 533 DRM_ERROR("Invalid dvo resource\n"); 534 return -ENOMEM; 535 } 536 dvo->regs = devm_ioremap_nocache(dev, res->start, 537 resource_size(res)); 538 if (!dvo->regs) 539 return -ENOMEM; 540 541 dvo->clk_pix = devm_clk_get(dev, "dvo_pix"); 542 if (IS_ERR(dvo->clk_pix)) { 543 DRM_ERROR("Cannot get dvo_pix clock\n"); 544 return PTR_ERR(dvo->clk_pix); 545 } 546 547 dvo->clk = devm_clk_get(dev, "dvo"); 548 if (IS_ERR(dvo->clk)) { 549 DRM_ERROR("Cannot get dvo clock\n"); 550 return PTR_ERR(dvo->clk); 551 } 552 553 dvo->clk_main_parent = devm_clk_get(dev, "main_parent"); 554 if (IS_ERR(dvo->clk_main_parent)) { 555 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n"); 556 dvo->clk_main_parent = NULL; 557 } 558 559 dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent"); 560 if (IS_ERR(dvo->clk_aux_parent)) { 561 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n"); 562 dvo->clk_aux_parent = NULL; 563 } 564 565 dvo->panel_node = of_parse_phandle(np, "sti,panel", 0); 566 if (!dvo->panel_node) 567 DRM_ERROR("No panel associated to the dvo output\n"); 568 of_node_put(dvo->panel_node); 569 570 platform_set_drvdata(pdev, dvo); 571 572 return component_add(&pdev->dev, &sti_dvo_ops); 573 } 574 575 static int sti_dvo_remove(struct platform_device *pdev) 576 { 577 component_del(&pdev->dev, &sti_dvo_ops); 578 return 0; 579 } 580 581 static const struct of_device_id dvo_of_match[] = { 582 { .compatible = "st,stih407-dvo", }, 583 { /* end node */ } 584 }; 585 MODULE_DEVICE_TABLE(of, dvo_of_match); 586 587 struct platform_driver sti_dvo_driver = { 588 .driver = { 589 .name = "sti-dvo", 590 .owner = THIS_MODULE, 591 .of_match_table = dvo_of_match, 592 }, 593 .probe = sti_dvo_probe, 594 .remove = sti_dvo_remove, 595 }; 596 597 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 598 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 599 MODULE_LICENSE("GPL"); 600