1 /* 2 * Copyright (C) STMicroelectronics SA 2014 3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics. 4 * License terms: GNU General Public License (GPL), version 2 5 */ 6 7 #include <linux/clk.h> 8 #include <linux/component.h> 9 #include <linux/debugfs.h> 10 #include <linux/module.h> 11 #include <linux/of_gpio.h> 12 #include <linux/platform_device.h> 13 14 #include <drm/drmP.h> 15 #include <drm/drm_atomic_helper.h> 16 #include <drm/drm_crtc_helper.h> 17 #include <drm/drm_panel.h> 18 19 #include "sti_awg_utils.h" 20 #include "sti_mixer.h" 21 22 /* DVO registers */ 23 #define DVO_AWG_DIGSYNC_CTRL 0x0000 24 #define DVO_DOF_CFG 0x0004 25 #define DVO_LUT_PROG_LOW 0x0008 26 #define DVO_LUT_PROG_MID 0x000C 27 #define DVO_LUT_PROG_HIGH 0x0010 28 #define DVO_DIGSYNC_INSTR_I 0x0100 29 30 #define DVO_AWG_CTRL_EN BIT(0) 31 #define DVO_AWG_FRAME_BASED_SYNC BIT(2) 32 33 #define DVO_DOF_EN_LOWBYTE BIT(0) 34 #define DVO_DOF_EN_MIDBYTE BIT(1) 35 #define DVO_DOF_EN_HIGHBYTE BIT(2) 36 #define DVO_DOF_EN BIT(6) 37 #define DVO_DOF_MOD_COUNT_SHIFT 8 38 39 #define DVO_LUT_ZERO 0 40 #define DVO_LUT_Y_G 1 41 #define DVO_LUT_Y_G_DEL 2 42 #define DVO_LUT_CB_B 3 43 #define DVO_LUT_CB_B_DEL 4 44 #define DVO_LUT_CR_R 5 45 #define DVO_LUT_CR_R_DEL 6 46 #define DVO_LUT_HOLD 7 47 48 struct dvo_config { 49 u32 flags; 50 u32 lowbyte; 51 u32 midbyte; 52 u32 highbyte; 53 int (*awg_fwgen_fct)( 54 struct awg_code_generation_params *fw_gen_params, 55 struct awg_timing *timing); 56 }; 57 58 static struct dvo_config rgb_24bit_de_cfg = { 59 .flags = (0L << DVO_DOF_MOD_COUNT_SHIFT), 60 .lowbyte = DVO_LUT_CR_R, 61 .midbyte = DVO_LUT_Y_G, 62 .highbyte = DVO_LUT_CB_B, 63 .awg_fwgen_fct = sti_awg_generate_code_data_enable_mode, 64 }; 65 66 /** 67 * STI digital video output structure 68 * 69 * @dev: driver device 70 * @drm_dev: pointer to drm device 71 * @mode: current display mode selected 72 * @regs: dvo registers 73 * @clk_pix: pixel clock for dvo 74 * @clk: clock for dvo 75 * @clk_main_parent: dvo parent clock if main path used 76 * @clk_aux_parent: dvo parent clock if aux path used 77 * @panel_node: panel node reference from device tree 78 * @panel: reference to the panel connected to the dvo 79 * @enabled: true if dvo is enabled else false 80 * @encoder: drm_encoder it is bound 81 */ 82 struct sti_dvo { 83 struct device dev; 84 struct drm_device *drm_dev; 85 struct drm_display_mode mode; 86 void __iomem *regs; 87 struct clk *clk_pix; 88 struct clk *clk; 89 struct clk *clk_main_parent; 90 struct clk *clk_aux_parent; 91 struct device_node *panel_node; 92 struct drm_panel *panel; 93 struct dvo_config *config; 94 bool enabled; 95 struct drm_encoder *encoder; 96 struct drm_bridge *bridge; 97 }; 98 99 struct sti_dvo_connector { 100 struct drm_connector drm_connector; 101 struct drm_encoder *encoder; 102 struct sti_dvo *dvo; 103 }; 104 105 #define to_sti_dvo_connector(x) \ 106 container_of(x, struct sti_dvo_connector, drm_connector) 107 108 #define BLANKING_LEVEL 16 109 int dvo_awg_generate_code(struct sti_dvo *dvo, u8 *ram_size, u32 *ram_code) 110 { 111 struct drm_display_mode *mode = &dvo->mode; 112 struct dvo_config *config = dvo->config; 113 struct awg_code_generation_params fw_gen_params; 114 struct awg_timing timing; 115 116 fw_gen_params.ram_code = ram_code; 117 fw_gen_params.instruction_offset = 0; 118 119 timing.total_lines = mode->vtotal; 120 timing.active_lines = mode->vdisplay; 121 timing.blanking_lines = mode->vsync_start - mode->vdisplay; 122 timing.trailing_lines = mode->vtotal - mode->vsync_start; 123 timing.total_pixels = mode->htotal; 124 timing.active_pixels = mode->hdisplay; 125 timing.blanking_pixels = mode->hsync_start - mode->hdisplay; 126 timing.trailing_pixels = mode->htotal - mode->hsync_start; 127 timing.blanking_level = BLANKING_LEVEL; 128 129 if (config->awg_fwgen_fct(&fw_gen_params, &timing)) { 130 DRM_ERROR("AWG firmware not properly generated\n"); 131 return -EINVAL; 132 } 133 134 *ram_size = fw_gen_params.instruction_offset; 135 136 return 0; 137 } 138 139 /* Configure AWG, writing instructions 140 * 141 * @dvo: pointer to DVO structure 142 * @awg_ram_code: pointer to AWG instructions table 143 * @nb: nb of AWG instructions 144 */ 145 static void dvo_awg_configure(struct sti_dvo *dvo, u32 *awg_ram_code, int nb) 146 { 147 int i; 148 149 DRM_DEBUG_DRIVER("\n"); 150 151 for (i = 0; i < nb; i++) 152 writel(awg_ram_code[i], 153 dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); 154 for (i = nb; i < AWG_MAX_INST; i++) 155 writel(0, dvo->regs + DVO_DIGSYNC_INSTR_I + i * 4); 156 157 writel(DVO_AWG_CTRL_EN, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 158 } 159 160 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \ 161 readl(dvo->regs + reg)) 162 163 static void dvo_dbg_awg_microcode(struct seq_file *s, void __iomem *reg) 164 { 165 unsigned int i; 166 167 seq_puts(s, "\n\n"); 168 seq_puts(s, " DVO AWG microcode:"); 169 for (i = 0; i < AWG_MAX_INST; i++) { 170 if (i % 8 == 0) 171 seq_printf(s, "\n %04X:", i); 172 seq_printf(s, " %04X", readl(reg + i * 4)); 173 } 174 } 175 176 static int dvo_dbg_show(struct seq_file *s, void *data) 177 { 178 struct drm_info_node *node = s->private; 179 struct sti_dvo *dvo = (struct sti_dvo *)node->info_ent->data; 180 181 seq_printf(s, "DVO: (vaddr = 0x%p)", dvo->regs); 182 DBGFS_DUMP(DVO_AWG_DIGSYNC_CTRL); 183 DBGFS_DUMP(DVO_DOF_CFG); 184 DBGFS_DUMP(DVO_LUT_PROG_LOW); 185 DBGFS_DUMP(DVO_LUT_PROG_MID); 186 DBGFS_DUMP(DVO_LUT_PROG_HIGH); 187 dvo_dbg_awg_microcode(s, dvo->regs + DVO_DIGSYNC_INSTR_I); 188 seq_puts(s, "\n"); 189 190 return 0; 191 } 192 193 static struct drm_info_list dvo_debugfs_files[] = { 194 { "dvo", dvo_dbg_show, 0, NULL }, 195 }; 196 197 static void dvo_debugfs_exit(struct sti_dvo *dvo, struct drm_minor *minor) 198 { 199 drm_debugfs_remove_files(dvo_debugfs_files, 200 ARRAY_SIZE(dvo_debugfs_files), 201 minor); 202 } 203 204 static int dvo_debugfs_init(struct sti_dvo *dvo, struct drm_minor *minor) 205 { 206 unsigned int i; 207 208 for (i = 0; i < ARRAY_SIZE(dvo_debugfs_files); i++) 209 dvo_debugfs_files[i].data = dvo; 210 211 return drm_debugfs_create_files(dvo_debugfs_files, 212 ARRAY_SIZE(dvo_debugfs_files), 213 minor->debugfs_root, minor); 214 } 215 216 static void sti_dvo_disable(struct drm_bridge *bridge) 217 { 218 struct sti_dvo *dvo = bridge->driver_private; 219 220 if (!dvo->enabled) 221 return; 222 223 DRM_DEBUG_DRIVER("\n"); 224 225 if (dvo->config->awg_fwgen_fct) 226 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 227 228 writel(0x00000000, dvo->regs + DVO_DOF_CFG); 229 230 if (dvo->panel) 231 dvo->panel->funcs->disable(dvo->panel); 232 233 /* Disable/unprepare dvo clock */ 234 clk_disable_unprepare(dvo->clk_pix); 235 clk_disable_unprepare(dvo->clk); 236 237 dvo->enabled = false; 238 } 239 240 static void sti_dvo_pre_enable(struct drm_bridge *bridge) 241 { 242 struct sti_dvo *dvo = bridge->driver_private; 243 struct dvo_config *config = dvo->config; 244 u32 val; 245 246 DRM_DEBUG_DRIVER("\n"); 247 248 if (dvo->enabled) 249 return; 250 251 /* Make sure DVO is disabled */ 252 writel(0x00000000, dvo->regs + DVO_DOF_CFG); 253 writel(0x00000000, dvo->regs + DVO_AWG_DIGSYNC_CTRL); 254 255 if (config->awg_fwgen_fct) { 256 u8 nb_instr; 257 u32 awg_ram_code[AWG_MAX_INST]; 258 /* Configure AWG */ 259 if (!dvo_awg_generate_code(dvo, &nb_instr, awg_ram_code)) 260 dvo_awg_configure(dvo, awg_ram_code, nb_instr); 261 else 262 return; 263 } 264 265 /* Prepare/enable clocks */ 266 if (clk_prepare_enable(dvo->clk_pix)) 267 DRM_ERROR("Failed to prepare/enable dvo_pix clk\n"); 268 if (clk_prepare_enable(dvo->clk)) 269 DRM_ERROR("Failed to prepare/enable dvo clk\n"); 270 271 if (dvo->panel) 272 dvo->panel->funcs->enable(dvo->panel); 273 274 /* Set LUT */ 275 writel(config->lowbyte, dvo->regs + DVO_LUT_PROG_LOW); 276 writel(config->midbyte, dvo->regs + DVO_LUT_PROG_MID); 277 writel(config->highbyte, dvo->regs + DVO_LUT_PROG_HIGH); 278 279 /* Digital output formatter config */ 280 val = (config->flags | DVO_DOF_EN); 281 writel(val, dvo->regs + DVO_DOF_CFG); 282 283 dvo->enabled = true; 284 } 285 286 static void sti_dvo_set_mode(struct drm_bridge *bridge, 287 struct drm_display_mode *mode, 288 struct drm_display_mode *adjusted_mode) 289 { 290 struct sti_dvo *dvo = bridge->driver_private; 291 struct sti_mixer *mixer = to_sti_mixer(dvo->encoder->crtc); 292 int rate = mode->clock * 1000; 293 struct clk *clkp; 294 int ret; 295 296 DRM_DEBUG_DRIVER("\n"); 297 298 memcpy(&dvo->mode, mode, sizeof(struct drm_display_mode)); 299 300 /* According to the path used (main or aux), the dvo clocks should 301 * have a different parent clock. */ 302 if (mixer->id == STI_MIXER_MAIN) 303 clkp = dvo->clk_main_parent; 304 else 305 clkp = dvo->clk_aux_parent; 306 307 if (clkp) { 308 clk_set_parent(dvo->clk_pix, clkp); 309 clk_set_parent(dvo->clk, clkp); 310 } 311 312 /* DVO clocks = compositor clock */ 313 ret = clk_set_rate(dvo->clk_pix, rate); 314 if (ret < 0) { 315 DRM_ERROR("Cannot set rate (%dHz) for dvo_pix clk\n", rate); 316 return; 317 } 318 319 ret = clk_set_rate(dvo->clk, rate); 320 if (ret < 0) { 321 DRM_ERROR("Cannot set rate (%dHz) for dvo clk\n", rate); 322 return; 323 } 324 325 /* For now, we only support 24bit data enable (DE) synchro format */ 326 dvo->config = &rgb_24bit_de_cfg; 327 } 328 329 static void sti_dvo_bridge_nope(struct drm_bridge *bridge) 330 { 331 /* do nothing */ 332 } 333 334 static const struct drm_bridge_funcs sti_dvo_bridge_funcs = { 335 .pre_enable = sti_dvo_pre_enable, 336 .enable = sti_dvo_bridge_nope, 337 .disable = sti_dvo_disable, 338 .post_disable = sti_dvo_bridge_nope, 339 .mode_set = sti_dvo_set_mode, 340 }; 341 342 static int sti_dvo_connector_get_modes(struct drm_connector *connector) 343 { 344 struct sti_dvo_connector *dvo_connector 345 = to_sti_dvo_connector(connector); 346 struct sti_dvo *dvo = dvo_connector->dvo; 347 348 if (dvo->panel) 349 return dvo->panel->funcs->get_modes(dvo->panel); 350 351 return 0; 352 } 353 354 #define CLK_TOLERANCE_HZ 50 355 356 static int sti_dvo_connector_mode_valid(struct drm_connector *connector, 357 struct drm_display_mode *mode) 358 { 359 int target = mode->clock * 1000; 360 int target_min = target - CLK_TOLERANCE_HZ; 361 int target_max = target + CLK_TOLERANCE_HZ; 362 int result; 363 struct sti_dvo_connector *dvo_connector 364 = to_sti_dvo_connector(connector); 365 struct sti_dvo *dvo = dvo_connector->dvo; 366 367 result = clk_round_rate(dvo->clk_pix, target); 368 369 DRM_DEBUG_DRIVER("target rate = %d => available rate = %d\n", 370 target, result); 371 372 if ((result < target_min) || (result > target_max)) { 373 DRM_DEBUG_DRIVER("dvo pixclk=%d not supported\n", target); 374 return MODE_BAD; 375 } 376 377 return MODE_OK; 378 } 379 380 static const 381 struct drm_connector_helper_funcs sti_dvo_connector_helper_funcs = { 382 .get_modes = sti_dvo_connector_get_modes, 383 .mode_valid = sti_dvo_connector_mode_valid, 384 }; 385 386 static enum drm_connector_status 387 sti_dvo_connector_detect(struct drm_connector *connector, bool force) 388 { 389 struct sti_dvo_connector *dvo_connector 390 = to_sti_dvo_connector(connector); 391 struct sti_dvo *dvo = dvo_connector->dvo; 392 393 DRM_DEBUG_DRIVER("\n"); 394 395 if (!dvo->panel) { 396 dvo->panel = of_drm_find_panel(dvo->panel_node); 397 if (dvo->panel) 398 drm_panel_attach(dvo->panel, connector); 399 } 400 401 if (dvo->panel) 402 return connector_status_connected; 403 404 return connector_status_disconnected; 405 } 406 407 static int sti_dvo_late_register(struct drm_connector *connector) 408 { 409 struct sti_dvo_connector *dvo_connector 410 = to_sti_dvo_connector(connector); 411 struct sti_dvo *dvo = dvo_connector->dvo; 412 413 if (dvo_debugfs_init(dvo, dvo->drm_dev->primary)) { 414 DRM_ERROR("DVO debugfs setup failed\n"); 415 return -EINVAL; 416 } 417 418 return 0; 419 } 420 421 static const struct drm_connector_funcs sti_dvo_connector_funcs = { 422 .dpms = drm_atomic_helper_connector_dpms, 423 .fill_modes = drm_helper_probe_single_connector_modes, 424 .detect = sti_dvo_connector_detect, 425 .destroy = drm_connector_cleanup, 426 .reset = drm_atomic_helper_connector_reset, 427 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, 428 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 429 .late_register = sti_dvo_late_register, 430 }; 431 432 static struct drm_encoder *sti_dvo_find_encoder(struct drm_device *dev) 433 { 434 struct drm_encoder *encoder; 435 436 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 437 if (encoder->encoder_type == DRM_MODE_ENCODER_LVDS) 438 return encoder; 439 } 440 441 return NULL; 442 } 443 444 static int sti_dvo_bind(struct device *dev, struct device *master, void *data) 445 { 446 struct sti_dvo *dvo = dev_get_drvdata(dev); 447 struct drm_device *drm_dev = data; 448 struct drm_encoder *encoder; 449 struct sti_dvo_connector *connector; 450 struct drm_connector *drm_connector; 451 struct drm_bridge *bridge; 452 int err; 453 454 /* Set the drm device handle */ 455 dvo->drm_dev = drm_dev; 456 457 encoder = sti_dvo_find_encoder(drm_dev); 458 if (!encoder) 459 return -ENOMEM; 460 461 connector = devm_kzalloc(dev, sizeof(*connector), GFP_KERNEL); 462 if (!connector) 463 return -ENOMEM; 464 465 connector->dvo = dvo; 466 467 bridge = devm_kzalloc(dev, sizeof(*bridge), GFP_KERNEL); 468 if (!bridge) 469 return -ENOMEM; 470 471 bridge->driver_private = dvo; 472 bridge->funcs = &sti_dvo_bridge_funcs; 473 bridge->of_node = dvo->dev.of_node; 474 err = drm_bridge_add(bridge); 475 if (err) { 476 DRM_ERROR("Failed to add bridge\n"); 477 return err; 478 } 479 480 err = drm_bridge_attach(drm_dev, bridge); 481 if (err) { 482 DRM_ERROR("Failed to attach bridge\n"); 483 return err; 484 } 485 486 dvo->bridge = bridge; 487 encoder->bridge = bridge; 488 connector->encoder = encoder; 489 dvo->encoder = encoder; 490 491 drm_connector = (struct drm_connector *)connector; 492 493 drm_connector->polled = DRM_CONNECTOR_POLL_HPD; 494 495 drm_connector_init(drm_dev, drm_connector, 496 &sti_dvo_connector_funcs, DRM_MODE_CONNECTOR_LVDS); 497 drm_connector_helper_add(drm_connector, 498 &sti_dvo_connector_helper_funcs); 499 500 err = drm_mode_connector_attach_encoder(drm_connector, encoder); 501 if (err) { 502 DRM_ERROR("Failed to attach a connector to a encoder\n"); 503 goto err_sysfs; 504 } 505 506 return 0; 507 508 err_sysfs: 509 drm_bridge_remove(bridge); 510 return -EINVAL; 511 } 512 513 static void sti_dvo_unbind(struct device *dev, 514 struct device *master, void *data) 515 { 516 struct sti_dvo *dvo = dev_get_drvdata(dev); 517 struct drm_device *drm_dev = data; 518 519 dvo_debugfs_exit(dvo, drm_dev->primary); 520 521 drm_bridge_remove(dvo->bridge); 522 } 523 524 static const struct component_ops sti_dvo_ops = { 525 .bind = sti_dvo_bind, 526 .unbind = sti_dvo_unbind, 527 }; 528 529 static int sti_dvo_probe(struct platform_device *pdev) 530 { 531 struct device *dev = &pdev->dev; 532 struct sti_dvo *dvo; 533 struct resource *res; 534 struct device_node *np = dev->of_node; 535 536 DRM_INFO("%s\n", __func__); 537 538 dvo = devm_kzalloc(dev, sizeof(*dvo), GFP_KERNEL); 539 if (!dvo) { 540 DRM_ERROR("Failed to allocate memory for DVO\n"); 541 return -ENOMEM; 542 } 543 544 dvo->dev = pdev->dev; 545 546 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dvo-reg"); 547 if (!res) { 548 DRM_ERROR("Invalid dvo resource\n"); 549 return -ENOMEM; 550 } 551 dvo->regs = devm_ioremap_nocache(dev, res->start, 552 resource_size(res)); 553 if (!dvo->regs) 554 return -ENOMEM; 555 556 dvo->clk_pix = devm_clk_get(dev, "dvo_pix"); 557 if (IS_ERR(dvo->clk_pix)) { 558 DRM_ERROR("Cannot get dvo_pix clock\n"); 559 return PTR_ERR(dvo->clk_pix); 560 } 561 562 dvo->clk = devm_clk_get(dev, "dvo"); 563 if (IS_ERR(dvo->clk)) { 564 DRM_ERROR("Cannot get dvo clock\n"); 565 return PTR_ERR(dvo->clk); 566 } 567 568 dvo->clk_main_parent = devm_clk_get(dev, "main_parent"); 569 if (IS_ERR(dvo->clk_main_parent)) { 570 DRM_DEBUG_DRIVER("Cannot get main_parent clock\n"); 571 dvo->clk_main_parent = NULL; 572 } 573 574 dvo->clk_aux_parent = devm_clk_get(dev, "aux_parent"); 575 if (IS_ERR(dvo->clk_aux_parent)) { 576 DRM_DEBUG_DRIVER("Cannot get aux_parent clock\n"); 577 dvo->clk_aux_parent = NULL; 578 } 579 580 dvo->panel_node = of_parse_phandle(np, "sti,panel", 0); 581 if (!dvo->panel_node) 582 DRM_ERROR("No panel associated to the dvo output\n"); 583 of_node_put(dvo->panel_node); 584 585 platform_set_drvdata(pdev, dvo); 586 587 return component_add(&pdev->dev, &sti_dvo_ops); 588 } 589 590 static int sti_dvo_remove(struct platform_device *pdev) 591 { 592 component_del(&pdev->dev, &sti_dvo_ops); 593 return 0; 594 } 595 596 static struct of_device_id dvo_of_match[] = { 597 { .compatible = "st,stih407-dvo", }, 598 { /* end node */ } 599 }; 600 MODULE_DEVICE_TABLE(of, dvo_of_match); 601 602 struct platform_driver sti_dvo_driver = { 603 .driver = { 604 .name = "sti-dvo", 605 .owner = THIS_MODULE, 606 .of_match_table = dvo_of_match, 607 }, 608 .probe = sti_dvo_probe, 609 .remove = sti_dvo_remove, 610 }; 611 612 MODULE_AUTHOR("Benjamin Gaignard <benjamin.gaignard@st.com>"); 613 MODULE_DESCRIPTION("STMicroelectronics SoC DRM driver"); 614 MODULE_LICENSE("GPL"); 615