1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) STMicroelectronics SA 2014 4 * Authors: Vincent Abriou <vincent.abriou@st.com> 5 * Fabien Dessenne <fabien.dessenne@st.com> 6 * for STMicroelectronics. 7 */ 8 9 #include <linux/dma-mapping.h> 10 #include <linux/seq_file.h> 11 12 #include <drm/drm_atomic.h> 13 #include <drm/drm_device.h> 14 #include <drm/drm_fb_dma_helper.h> 15 #include <drm/drm_framebuffer.h> 16 #include <drm/drm_gem_dma_helper.h> 17 18 #include "sti_compositor.h" 19 #include "sti_cursor.h" 20 #include "sti_plane.h" 21 #include "sti_vtg.h" 22 23 /* Registers */ 24 #define CUR_CTL 0x00 25 #define CUR_VPO 0x0C 26 #define CUR_PML 0x14 27 #define CUR_PMP 0x18 28 #define CUR_SIZE 0x1C 29 #define CUR_CML 0x20 30 #define CUR_AWS 0x28 31 #define CUR_AWE 0x2C 32 33 #define CUR_CTL_CLUT_UPDATE BIT(1) 34 35 #define STI_CURS_MIN_SIZE 1 36 #define STI_CURS_MAX_SIZE 128 37 38 /* 39 * pixmap dma buffer structure 40 * 41 * @paddr: physical address 42 * @size: buffer size 43 * @base: virtual address 44 */ 45 struct dma_pixmap { 46 dma_addr_t paddr; 47 size_t size; 48 void *base; 49 }; 50 51 /* 52 * STI Cursor structure 53 * 54 * @sti_plane: sti_plane structure 55 * @dev: driver device 56 * @regs: cursor registers 57 * @width: cursor width 58 * @height: cursor height 59 * @clut: color look up table 60 * @clut_paddr: color look up table physical address 61 * @pixmap: pixmap dma buffer (clut8-format cursor) 62 */ 63 struct sti_cursor { 64 struct sti_plane plane; 65 struct device *dev; 66 void __iomem *regs; 67 unsigned int width; 68 unsigned int height; 69 unsigned short *clut; 70 dma_addr_t clut_paddr; 71 struct dma_pixmap pixmap; 72 }; 73 74 static const uint32_t cursor_supported_formats[] = { 75 DRM_FORMAT_ARGB8888, 76 }; 77 78 #define to_sti_cursor(x) container_of(x, struct sti_cursor, plane) 79 80 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \ 81 readl(cursor->regs + reg)) 82 83 static void cursor_dbg_vpo(struct seq_file *s, u32 val) 84 { 85 seq_printf(s, "\txdo:%4d\tydo:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF); 86 } 87 88 static void cursor_dbg_size(struct seq_file *s, u32 val) 89 { 90 seq_printf(s, "\t%d x %d", val & 0x07FF, (val >> 16) & 0x07FF); 91 } 92 93 static void cursor_dbg_pml(struct seq_file *s, 94 struct sti_cursor *cursor, u32 val) 95 { 96 if (cursor->pixmap.paddr == val) 97 seq_printf(s, "\tVirt @: %p", cursor->pixmap.base); 98 } 99 100 static void cursor_dbg_cml(struct seq_file *s, 101 struct sti_cursor *cursor, u32 val) 102 { 103 if (cursor->clut_paddr == val) 104 seq_printf(s, "\tVirt @: %p", cursor->clut); 105 } 106 107 static int cursor_dbg_show(struct seq_file *s, void *data) 108 { 109 struct drm_info_node *node = s->private; 110 struct sti_cursor *cursor = (struct sti_cursor *)node->info_ent->data; 111 112 seq_printf(s, "%s: (vaddr = 0x%p)", 113 sti_plane_to_str(&cursor->plane), cursor->regs); 114 115 DBGFS_DUMP(CUR_CTL); 116 DBGFS_DUMP(CUR_VPO); 117 cursor_dbg_vpo(s, readl(cursor->regs + CUR_VPO)); 118 DBGFS_DUMP(CUR_PML); 119 cursor_dbg_pml(s, cursor, readl(cursor->regs + CUR_PML)); 120 DBGFS_DUMP(CUR_PMP); 121 DBGFS_DUMP(CUR_SIZE); 122 cursor_dbg_size(s, readl(cursor->regs + CUR_SIZE)); 123 DBGFS_DUMP(CUR_CML); 124 cursor_dbg_cml(s, cursor, readl(cursor->regs + CUR_CML)); 125 DBGFS_DUMP(CUR_AWS); 126 DBGFS_DUMP(CUR_AWE); 127 seq_putc(s, '\n'); 128 return 0; 129 } 130 131 static struct drm_info_list cursor_debugfs_files[] = { 132 { "cursor", cursor_dbg_show, 0, NULL }, 133 }; 134 135 static void cursor_debugfs_init(struct sti_cursor *cursor, 136 struct drm_minor *minor) 137 { 138 unsigned int i; 139 140 for (i = 0; i < ARRAY_SIZE(cursor_debugfs_files); i++) 141 cursor_debugfs_files[i].data = cursor; 142 143 drm_debugfs_create_files(cursor_debugfs_files, 144 ARRAY_SIZE(cursor_debugfs_files), 145 minor->debugfs_root, minor); 146 } 147 148 static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src) 149 { 150 u8 *dst = cursor->pixmap.base; 151 unsigned int i, j; 152 u32 a, r, g, b; 153 154 for (i = 0; i < cursor->height; i++) { 155 for (j = 0; j < cursor->width; j++) { 156 /* Pick the 2 higher bits of each component */ 157 a = (*src >> 30) & 3; 158 r = (*src >> 22) & 3; 159 g = (*src >> 14) & 3; 160 b = (*src >> 6) & 3; 161 *dst = a << 6 | r << 4 | g << 2 | b; 162 src++; 163 dst++; 164 } 165 } 166 } 167 168 static void sti_cursor_init(struct sti_cursor *cursor) 169 { 170 unsigned short *base = cursor->clut; 171 unsigned int a, r, g, b; 172 173 /* Assign CLUT values, ARGB444 format */ 174 for (a = 0; a < 4; a++) 175 for (r = 0; r < 4; r++) 176 for (g = 0; g < 4; g++) 177 for (b = 0; b < 4; b++) 178 *base++ = (a * 5) << 12 | 179 (r * 5) << 8 | 180 (g * 5) << 4 | 181 (b * 5); 182 } 183 184 static int sti_cursor_atomic_check(struct drm_plane *drm_plane, 185 struct drm_atomic_state *state) 186 { 187 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, 188 drm_plane); 189 struct sti_plane *plane = to_sti_plane(drm_plane); 190 struct sti_cursor *cursor = to_sti_cursor(plane); 191 struct drm_crtc *crtc = new_plane_state->crtc; 192 struct drm_framebuffer *fb = new_plane_state->fb; 193 struct drm_crtc_state *crtc_state; 194 struct drm_display_mode *mode; 195 int dst_x, dst_y, dst_w, dst_h; 196 int src_w, src_h; 197 198 /* no need for further checks if the plane is being disabled */ 199 if (!crtc || !fb) 200 return 0; 201 202 crtc_state = drm_atomic_get_crtc_state(state, crtc); 203 if (IS_ERR(crtc_state)) 204 return PTR_ERR(crtc_state); 205 206 mode = &crtc_state->mode; 207 dst_x = new_plane_state->crtc_x; 208 dst_y = new_plane_state->crtc_y; 209 dst_w = clamp_val(new_plane_state->crtc_w, 0, 210 mode->crtc_hdisplay - dst_x); 211 dst_h = clamp_val(new_plane_state->crtc_h, 0, 212 mode->crtc_vdisplay - dst_y); 213 /* src_x are in 16.16 format */ 214 src_w = new_plane_state->src_w >> 16; 215 src_h = new_plane_state->src_h >> 16; 216 217 if (src_w < STI_CURS_MIN_SIZE || 218 src_h < STI_CURS_MIN_SIZE || 219 src_w > STI_CURS_MAX_SIZE || 220 src_h > STI_CURS_MAX_SIZE) { 221 DRM_ERROR("Invalid cursor size (%dx%d)\n", 222 src_w, src_h); 223 return -EINVAL; 224 } 225 226 /* If the cursor size has changed, re-allocated the pixmap */ 227 if (!cursor->pixmap.base || 228 (cursor->width != src_w) || 229 (cursor->height != src_h)) { 230 cursor->width = src_w; 231 cursor->height = src_h; 232 233 if (cursor->pixmap.base) 234 dma_free_wc(cursor->dev, cursor->pixmap.size, 235 cursor->pixmap.base, cursor->pixmap.paddr); 236 237 cursor->pixmap.size = cursor->width * cursor->height; 238 239 cursor->pixmap.base = dma_alloc_wc(cursor->dev, 240 cursor->pixmap.size, 241 &cursor->pixmap.paddr, 242 GFP_KERNEL | GFP_DMA); 243 if (!cursor->pixmap.base) { 244 DRM_ERROR("Failed to allocate memory for pixmap\n"); 245 return -EINVAL; 246 } 247 } 248 249 if (!drm_fb_dma_get_gem_obj(fb, 0)) { 250 DRM_ERROR("Can't get DMA GEM object for fb\n"); 251 return -EINVAL; 252 } 253 254 DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n", 255 crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)), 256 drm_plane->base.id, sti_plane_to_str(plane)); 257 DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y); 258 259 return 0; 260 } 261 262 static void sti_cursor_atomic_update(struct drm_plane *drm_plane, 263 struct drm_atomic_state *state) 264 { 265 struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state, 266 drm_plane); 267 struct sti_plane *plane = to_sti_plane(drm_plane); 268 struct sti_cursor *cursor = to_sti_cursor(plane); 269 struct drm_crtc *crtc = newstate->crtc; 270 struct drm_framebuffer *fb = newstate->fb; 271 struct drm_display_mode *mode; 272 int dst_x, dst_y; 273 struct drm_gem_dma_object *dma_obj; 274 u32 y, x; 275 u32 val; 276 277 if (!crtc || !fb) 278 return; 279 280 mode = &crtc->mode; 281 dst_x = newstate->crtc_x; 282 dst_y = newstate->crtc_y; 283 284 dma_obj = drm_fb_dma_get_gem_obj(fb, 0); 285 286 /* Convert ARGB8888 to CLUT8 */ 287 sti_cursor_argb8888_to_clut8(cursor, (u32 *)dma_obj->vaddr); 288 289 /* AWS and AWE depend on the mode */ 290 y = sti_vtg_get_line_number(*mode, 0); 291 x = sti_vtg_get_pixel_number(*mode, 0); 292 val = y << 16 | x; 293 writel(val, cursor->regs + CUR_AWS); 294 y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1); 295 x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); 296 val = y << 16 | x; 297 writel(val, cursor->regs + CUR_AWE); 298 299 /* Set memory location, size, and position */ 300 writel(cursor->pixmap.paddr, cursor->regs + CUR_PML); 301 writel(cursor->width, cursor->regs + CUR_PMP); 302 writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE); 303 304 y = sti_vtg_get_line_number(*mode, dst_y); 305 x = sti_vtg_get_pixel_number(*mode, dst_x); 306 writel((y << 16) | x, cursor->regs + CUR_VPO); 307 308 /* Set and fetch CLUT */ 309 writel(cursor->clut_paddr, cursor->regs + CUR_CML); 310 writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL); 311 312 sti_plane_update_fps(plane, true, false); 313 314 plane->status = STI_PLANE_UPDATED; 315 } 316 317 static void sti_cursor_atomic_disable(struct drm_plane *drm_plane, 318 struct drm_atomic_state *state) 319 { 320 struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state, 321 drm_plane); 322 struct sti_plane *plane = to_sti_plane(drm_plane); 323 324 if (!oldstate->crtc) { 325 DRM_DEBUG_DRIVER("drm plane:%d not enabled\n", 326 drm_plane->base.id); 327 return; 328 } 329 330 DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n", 331 oldstate->crtc->base.id, 332 sti_mixer_to_str(to_sti_mixer(oldstate->crtc)), 333 drm_plane->base.id, sti_plane_to_str(plane)); 334 335 plane->status = STI_PLANE_DISABLING; 336 } 337 338 static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = { 339 .atomic_check = sti_cursor_atomic_check, 340 .atomic_update = sti_cursor_atomic_update, 341 .atomic_disable = sti_cursor_atomic_disable, 342 }; 343 344 static int sti_cursor_late_register(struct drm_plane *drm_plane) 345 { 346 struct sti_plane *plane = to_sti_plane(drm_plane); 347 struct sti_cursor *cursor = to_sti_cursor(plane); 348 349 cursor_debugfs_init(cursor, drm_plane->dev->primary); 350 351 return 0; 352 } 353 354 static const struct drm_plane_funcs sti_cursor_plane_helpers_funcs = { 355 .update_plane = drm_atomic_helper_update_plane, 356 .disable_plane = drm_atomic_helper_disable_plane, 357 .destroy = drm_plane_cleanup, 358 .reset = drm_atomic_helper_plane_reset, 359 .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state, 360 .atomic_destroy_state = drm_atomic_helper_plane_destroy_state, 361 .late_register = sti_cursor_late_register, 362 }; 363 364 struct drm_plane *sti_cursor_create(struct drm_device *drm_dev, 365 struct device *dev, int desc, 366 void __iomem *baseaddr, 367 unsigned int possible_crtcs) 368 { 369 struct sti_cursor *cursor; 370 size_t size; 371 int res; 372 373 cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL); 374 if (!cursor) { 375 DRM_ERROR("Failed to allocate memory for cursor\n"); 376 return NULL; 377 } 378 379 /* Allocate clut buffer */ 380 size = 0x100 * sizeof(unsigned short); 381 cursor->clut = dma_alloc_wc(dev, size, &cursor->clut_paddr, 382 GFP_KERNEL | GFP_DMA); 383 384 if (!cursor->clut) { 385 DRM_ERROR("Failed to allocate memory for cursor clut\n"); 386 goto err_clut; 387 } 388 389 cursor->dev = dev; 390 cursor->regs = baseaddr; 391 cursor->plane.desc = desc; 392 cursor->plane.status = STI_PLANE_DISABLED; 393 394 sti_cursor_init(cursor); 395 396 res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane, 397 possible_crtcs, 398 &sti_cursor_plane_helpers_funcs, 399 cursor_supported_formats, 400 ARRAY_SIZE(cursor_supported_formats), 401 NULL, DRM_PLANE_TYPE_CURSOR, NULL); 402 if (res) { 403 DRM_ERROR("Failed to initialize universal plane\n"); 404 goto err_plane; 405 } 406 407 drm_plane_helper_add(&cursor->plane.drm_plane, 408 &sti_cursor_helpers_funcs); 409 410 sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR); 411 412 return &cursor->plane.drm_plane; 413 414 err_plane: 415 dma_free_wc(dev, size, cursor->clut, cursor->clut_paddr); 416 err_clut: 417 devm_kfree(dev, cursor); 418 return NULL; 419 } 420