1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * DRM driver for Sitronix ST7586 panels 4 * 5 * Copyright 2017 David Lechner <david@lechnology.com> 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/gpio/consumer.h> 10 #include <linux/module.h> 11 #include <linux/property.h> 12 #include <linux/spi/spi.h> 13 #include <video/mipi_display.h> 14 15 #include <drm/clients/drm_client_setup.h> 16 #include <drm/drm_atomic_helper.h> 17 #include <drm/drm_damage_helper.h> 18 #include <drm/drm_drv.h> 19 #include <drm/drm_fb_dma_helper.h> 20 #include <drm/drm_fbdev_dma.h> 21 #include <drm/drm_format_helper.h> 22 #include <drm/drm_framebuffer.h> 23 #include <drm/drm_gem_atomic_helper.h> 24 #include <drm/drm_gem_dma_helper.h> 25 #include <drm/drm_gem_framebuffer_helper.h> 26 #include <drm/drm_managed.h> 27 #include <drm/drm_mipi_dbi.h> 28 #include <drm/drm_print.h> 29 #include <drm/drm_rect.h> 30 31 /* controller-specific commands */ 32 #define ST7586_DISP_MODE_GRAY 0x38 33 #define ST7586_DISP_MODE_MONO 0x39 34 #define ST7586_ENABLE_DDRAM 0x3a 35 #define ST7586_SET_DISP_DUTY 0xb0 36 #define ST7586_SET_PART_DISP 0xb4 37 #define ST7586_SET_NLINE_INV 0xb5 38 #define ST7586_SET_VOP 0xc0 39 #define ST7586_SET_BIAS_SYSTEM 0xc3 40 #define ST7586_SET_BOOST_LEVEL 0xc4 41 #define ST7586_SET_VOP_OFFSET 0xc7 42 #define ST7586_ENABLE_ANALOG 0xd0 43 #define ST7586_AUTO_READ_CTRL 0xd7 44 #define ST7586_OTP_RW_CTRL 0xe0 45 #define ST7586_OTP_CTRL_OUT 0xe1 46 #define ST7586_OTP_READ 0xe3 47 48 #define ST7586_DISP_CTRL_MX BIT(6) 49 #define ST7586_DISP_CTRL_MY BIT(7) 50 51 /* 52 * The ST7586 controller has an unusual pixel format where 2bpp grayscale is 53 * packed 3 pixels per byte with the first two pixels using 3 bits and the 3rd 54 * pixel using only 2 bits. 55 * 56 * | D7 | D6 | D5 || | || 2bpp | 57 * | (D4) | (D3) | (D2) || D1 | D0 || GRAY | 58 * +------+------+------++------+------++------+ 59 * | 1 | 1 | 1 || 1 | 1 || 0 0 | black 60 * | 1 | 0 | 0 || 1 | 0 || 0 1 | dark gray 61 * | 0 | 1 | 0 || 0 | 1 || 1 0 | light gray 62 * | 0 | 0 | 0 || 0 | 0 || 1 1 | white 63 */ 64 65 static const u8 st7586_lookup[] = { 0x7, 0x4, 0x2, 0x0 }; 66 67 static void st7586_xrgb8888_to_gray332(u8 *dst, void *vaddr, 68 struct drm_framebuffer *fb, 69 struct drm_rect *clip, 70 struct drm_format_conv_state *fmtcnv_state) 71 { 72 size_t len = (clip->x2 - clip->x1) * (clip->y2 - clip->y1); 73 unsigned int x, y; 74 u8 *src, *buf, val; 75 struct iosys_map dst_map, vmap; 76 77 buf = kmalloc(len, GFP_KERNEL); 78 if (!buf) 79 return; 80 81 iosys_map_set_vaddr(&dst_map, buf); 82 iosys_map_set_vaddr(&vmap, vaddr); 83 drm_fb_xrgb8888_to_gray8(&dst_map, NULL, &vmap, fb, clip, fmtcnv_state); 84 src = buf; 85 86 for (y = clip->y1; y < clip->y2; y++) { 87 for (x = clip->x1; x < clip->x2; x += 3) { 88 val = st7586_lookup[*src++ >> 6] << 5; 89 val |= st7586_lookup[*src++ >> 6] << 2; 90 val |= st7586_lookup[*src++ >> 6] >> 1; 91 *dst++ = val; 92 } 93 } 94 95 kfree(buf); 96 } 97 98 static int st7586_buf_copy(void *dst, struct iosys_map *src, struct drm_framebuffer *fb, 99 struct drm_rect *clip, struct drm_format_conv_state *fmtcnv_state) 100 { 101 int ret; 102 103 ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); 104 if (ret) 105 return ret; 106 107 st7586_xrgb8888_to_gray332(dst, src->vaddr, fb, clip, fmtcnv_state); 108 109 drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); 110 111 return 0; 112 } 113 114 static void st7586_fb_dirty(struct iosys_map *src, struct drm_framebuffer *fb, 115 struct drm_rect *rect, struct drm_format_conv_state *fmtcnv_state) 116 { 117 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(fb->dev); 118 struct mipi_dbi *dbi = &dbidev->dbi; 119 int start, end, ret = 0; 120 121 /* 3 pixels per byte, so grow clip to nearest multiple of 3 */ 122 rect->x1 = rounddown(rect->x1, 3); 123 rect->x2 = roundup(rect->x2, 3); 124 125 DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect)); 126 127 ret = st7586_buf_copy(dbidev->tx_buf, src, fb, rect, fmtcnv_state); 128 if (ret) 129 goto err_msg; 130 131 /* Pixels are packed 3 per byte */ 132 start = rect->x1 / 3; 133 end = rect->x2 / 3; 134 135 mipi_dbi_command(dbi, MIPI_DCS_SET_COLUMN_ADDRESS, 136 (start >> 8) & 0xFF, start & 0xFF, 137 (end >> 8) & 0xFF, (end - 1) & 0xFF); 138 mipi_dbi_command(dbi, MIPI_DCS_SET_PAGE_ADDRESS, 139 (rect->y1 >> 8) & 0xFF, rect->y1 & 0xFF, 140 (rect->y2 >> 8) & 0xFF, (rect->y2 - 1) & 0xFF); 141 142 ret = mipi_dbi_command_buf(dbi, MIPI_DCS_WRITE_MEMORY_START, 143 (u8 *)dbidev->tx_buf, 144 (end - start) * (rect->y2 - rect->y1)); 145 err_msg: 146 if (ret) 147 dev_err_once(fb->dev->dev, "Failed to update display %d\n", ret); 148 } 149 150 static void st7586_pipe_update(struct drm_simple_display_pipe *pipe, 151 struct drm_plane_state *old_state) 152 { 153 struct drm_plane_state *state = pipe->plane.state; 154 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(state); 155 struct drm_framebuffer *fb = state->fb; 156 struct drm_rect rect; 157 int idx; 158 159 if (!pipe->crtc.state->active) 160 return; 161 162 if (!drm_dev_enter(fb->dev, &idx)) 163 return; 164 165 if (drm_atomic_helper_damage_merged(old_state, state, &rect)) 166 st7586_fb_dirty(&shadow_plane_state->data[0], fb, &rect, 167 &shadow_plane_state->fmtcnv_state); 168 169 drm_dev_exit(idx); 170 } 171 172 static void st7586_pipe_enable(struct drm_simple_display_pipe *pipe, 173 struct drm_crtc_state *crtc_state, 174 struct drm_plane_state *plane_state) 175 { 176 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); 177 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); 178 struct drm_framebuffer *fb = plane_state->fb; 179 struct mipi_dbi *dbi = &dbidev->dbi; 180 struct drm_rect rect = { 181 .x1 = 0, 182 .x2 = fb->width, 183 .y1 = 0, 184 .y2 = fb->height, 185 }; 186 int idx, ret; 187 u8 addr_mode; 188 189 if (!drm_dev_enter(pipe->crtc.dev, &idx)) 190 return; 191 192 DRM_DEBUG_KMS("\n"); 193 194 ret = mipi_dbi_poweron_reset(dbidev); 195 if (ret) 196 goto out_exit; 197 198 mipi_dbi_command(dbi, ST7586_AUTO_READ_CTRL, 0x9f); 199 mipi_dbi_command(dbi, ST7586_OTP_RW_CTRL, 0x00); 200 201 msleep(10); 202 203 mipi_dbi_command(dbi, ST7586_OTP_READ); 204 205 msleep(20); 206 207 mipi_dbi_command(dbi, ST7586_OTP_CTRL_OUT); 208 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE); 209 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF); 210 211 msleep(50); 212 213 mipi_dbi_command(dbi, ST7586_SET_VOP_OFFSET, 0x00); 214 mipi_dbi_command(dbi, ST7586_SET_VOP, 0xe3, 0x00); 215 mipi_dbi_command(dbi, ST7586_SET_BIAS_SYSTEM, 0x02); 216 mipi_dbi_command(dbi, ST7586_SET_BOOST_LEVEL, 0x04); 217 mipi_dbi_command(dbi, ST7586_ENABLE_ANALOG, 0x1d); 218 mipi_dbi_command(dbi, ST7586_SET_NLINE_INV, 0x00); 219 mipi_dbi_command(dbi, ST7586_DISP_MODE_GRAY); 220 mipi_dbi_command(dbi, ST7586_ENABLE_DDRAM, 0x02); 221 222 switch (dbidev->rotation) { 223 default: 224 addr_mode = 0x00; 225 break; 226 case 90: 227 addr_mode = ST7586_DISP_CTRL_MY; 228 break; 229 case 180: 230 addr_mode = ST7586_DISP_CTRL_MX | ST7586_DISP_CTRL_MY; 231 break; 232 case 270: 233 addr_mode = ST7586_DISP_CTRL_MX; 234 break; 235 } 236 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode); 237 238 mipi_dbi_command(dbi, ST7586_SET_DISP_DUTY, 0x7f); 239 mipi_dbi_command(dbi, ST7586_SET_PART_DISP, 0xa0); 240 mipi_dbi_command(dbi, MIPI_DCS_SET_PARTIAL_ROWS, 0x00, 0x00, 0x00, 0x77); 241 mipi_dbi_command(dbi, MIPI_DCS_EXIT_INVERT_MODE); 242 243 msleep(100); 244 245 st7586_fb_dirty(&shadow_plane_state->data[0], fb, &rect, 246 &shadow_plane_state->fmtcnv_state); 247 248 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON); 249 out_exit: 250 drm_dev_exit(idx); 251 } 252 253 static void st7586_pipe_disable(struct drm_simple_display_pipe *pipe) 254 { 255 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev); 256 257 /* 258 * This callback is not protected by drm_dev_enter/exit since we want to 259 * turn off the display on regular driver unload. It's highly unlikely 260 * that the underlying SPI controller is gone should this be called after 261 * unplug. 262 */ 263 264 DRM_DEBUG_KMS("\n"); 265 266 mipi_dbi_command(&dbidev->dbi, MIPI_DCS_SET_DISPLAY_OFF); 267 } 268 269 static const u32 st7586_formats[] = { 270 DRM_FORMAT_XRGB8888, 271 }; 272 273 static const struct drm_simple_display_pipe_funcs st7586_pipe_funcs = { 274 .mode_valid = mipi_dbi_pipe_mode_valid, 275 .enable = st7586_pipe_enable, 276 .disable = st7586_pipe_disable, 277 .update = st7586_pipe_update, 278 .begin_fb_access = mipi_dbi_pipe_begin_fb_access, 279 .end_fb_access = mipi_dbi_pipe_end_fb_access, 280 .reset_plane = mipi_dbi_pipe_reset_plane, 281 .duplicate_plane_state = mipi_dbi_pipe_duplicate_plane_state, 282 .destroy_plane_state = mipi_dbi_pipe_destroy_plane_state, 283 }; 284 285 static const struct drm_display_mode st7586_mode = { 286 DRM_SIMPLE_MODE(178, 128, 37, 27), 287 }; 288 289 DEFINE_DRM_GEM_DMA_FOPS(st7586_fops); 290 291 static const struct drm_driver st7586_driver = { 292 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, 293 .fops = &st7586_fops, 294 DRM_GEM_DMA_DRIVER_OPS_VMAP, 295 DRM_FBDEV_DMA_DRIVER_OPS, 296 .debugfs_init = mipi_dbi_debugfs_init, 297 .name = "st7586", 298 .desc = "Sitronix ST7586", 299 .major = 1, 300 .minor = 0, 301 }; 302 303 static const struct of_device_id st7586_of_match[] = { 304 { .compatible = "lego,ev3-lcd" }, 305 {}, 306 }; 307 MODULE_DEVICE_TABLE(of, st7586_of_match); 308 309 static const struct spi_device_id st7586_id[] = { 310 { "ev3-lcd", 0 }, 311 { }, 312 }; 313 MODULE_DEVICE_TABLE(spi, st7586_id); 314 315 static int st7586_probe(struct spi_device *spi) 316 { 317 struct device *dev = &spi->dev; 318 struct mipi_dbi_dev *dbidev; 319 struct drm_device *drm; 320 struct mipi_dbi *dbi; 321 struct gpio_desc *a0; 322 u32 rotation = 0; 323 size_t bufsize; 324 int ret; 325 326 dbidev = devm_drm_dev_alloc(dev, &st7586_driver, 327 struct mipi_dbi_dev, drm); 328 if (IS_ERR(dbidev)) 329 return PTR_ERR(dbidev); 330 331 dbi = &dbidev->dbi; 332 drm = &dbidev->drm; 333 334 bufsize = (st7586_mode.vdisplay + 2) / 3 * st7586_mode.hdisplay; 335 336 dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); 337 if (IS_ERR(dbi->reset)) 338 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n"); 339 340 a0 = devm_gpiod_get(dev, "a0", GPIOD_OUT_LOW); 341 if (IS_ERR(a0)) 342 return dev_err_probe(dev, PTR_ERR(a0), "Failed to get GPIO 'a0'\n"); 343 344 device_property_read_u32(dev, "rotation", &rotation); 345 346 ret = mipi_dbi_spi_init(spi, dbi, a0); 347 if (ret) 348 return ret; 349 350 /* Cannot read from this controller via SPI */ 351 dbi->read_commands = NULL; 352 353 ret = mipi_dbi_dev_init_with_formats(dbidev, &st7586_pipe_funcs, 354 st7586_formats, ARRAY_SIZE(st7586_formats), 355 &st7586_mode, rotation, bufsize); 356 if (ret) 357 return ret; 358 359 /* 360 * we are using 8-bit data, so we are not actually swapping anything, 361 * but setting mipi->swap_bytes makes mipi_dbi_typec3_command() do the 362 * right thing and not use 16-bit transfers (which results in swapped 363 * bytes on little-endian systems and causes out of order data to be 364 * sent to the display). 365 */ 366 dbi->swap_bytes = true; 367 368 drm_mode_config_reset(drm); 369 370 ret = drm_dev_register(drm, 0); 371 if (ret) 372 return ret; 373 374 spi_set_drvdata(spi, drm); 375 376 drm_client_setup(drm, NULL); 377 378 return 0; 379 } 380 381 static void st7586_remove(struct spi_device *spi) 382 { 383 struct drm_device *drm = spi_get_drvdata(spi); 384 385 drm_dev_unplug(drm); 386 drm_atomic_helper_shutdown(drm); 387 } 388 389 static void st7586_shutdown(struct spi_device *spi) 390 { 391 drm_atomic_helper_shutdown(spi_get_drvdata(spi)); 392 } 393 394 static struct spi_driver st7586_spi_driver = { 395 .driver = { 396 .name = "st7586", 397 .of_match_table = st7586_of_match, 398 }, 399 .id_table = st7586_id, 400 .probe = st7586_probe, 401 .remove = st7586_remove, 402 .shutdown = st7586_shutdown, 403 }; 404 module_spi_driver(st7586_spi_driver); 405 406 MODULE_DESCRIPTION("Sitronix ST7586 DRM driver"); 407 MODULE_AUTHOR("David Lechner <david@lechnology.com>"); 408 MODULE_LICENSE("GPL"); 409