1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * shmob_drm_plane.c -- SH Mobile DRM Planes 4 * 5 * Copyright (C) 2012 Renesas Electronics Corporation 6 * 7 * Laurent Pinchart (laurent.pinchart@ideasonboard.com) 8 */ 9 10 #include <drm/drm_crtc.h> 11 #include <drm/drm_fb_dma_helper.h> 12 #include <drm/drm_fourcc.h> 13 #include <drm/drm_framebuffer.h> 14 #include <drm/drm_gem_dma_helper.h> 15 16 #include "shmob_drm_drv.h" 17 #include "shmob_drm_kms.h" 18 #include "shmob_drm_plane.h" 19 #include "shmob_drm_regs.h" 20 21 struct shmob_drm_plane { 22 struct drm_plane plane; 23 unsigned int index; 24 unsigned int alpha; 25 26 const struct shmob_drm_format_info *format; 27 unsigned long dma[2]; 28 29 unsigned int src_x; 30 unsigned int src_y; 31 unsigned int crtc_x; 32 unsigned int crtc_y; 33 unsigned int crtc_w; 34 unsigned int crtc_h; 35 }; 36 37 #define to_shmob_plane(p) container_of(p, struct shmob_drm_plane, plane) 38 39 static void shmob_drm_plane_compute_base(struct shmob_drm_plane *splane, 40 struct drm_framebuffer *fb, 41 int x, int y) 42 { 43 struct drm_gem_dma_object *gem; 44 unsigned int bpp; 45 46 bpp = splane->format->yuv ? 8 : splane->format->bpp; 47 gem = drm_fb_dma_get_gem_obj(fb, 0); 48 splane->dma[0] = gem->dma_addr + fb->offsets[0] 49 + y * fb->pitches[0] + x * bpp / 8; 50 51 if (splane->format->yuv) { 52 bpp = splane->format->bpp - 8; 53 gem = drm_fb_dma_get_gem_obj(fb, 1); 54 splane->dma[1] = gem->dma_addr + fb->offsets[1] 55 + y / (bpp == 4 ? 2 : 1) * fb->pitches[1] 56 + x * (bpp == 16 ? 2 : 1); 57 } 58 } 59 60 static void __shmob_drm_plane_setup(struct shmob_drm_plane *splane, 61 struct drm_framebuffer *fb) 62 { 63 struct shmob_drm_device *sdev = splane->plane.dev->dev_private; 64 u32 format; 65 66 /* TODO: Support ROP3 mode */ 67 format = LDBBSIFR_EN | (splane->alpha << LDBBSIFR_LAY_SHIFT); 68 69 switch (splane->format->fourcc) { 70 case DRM_FORMAT_RGB565: 71 case DRM_FORMAT_NV21: 72 case DRM_FORMAT_NV61: 73 case DRM_FORMAT_NV42: 74 format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW; 75 break; 76 case DRM_FORMAT_RGB888: 77 case DRM_FORMAT_NV12: 78 case DRM_FORMAT_NV16: 79 case DRM_FORMAT_NV24: 80 format |= LDBBSIFR_SWPL | LDBBSIFR_SWPW | LDBBSIFR_SWPB; 81 break; 82 case DRM_FORMAT_ARGB8888: 83 case DRM_FORMAT_XRGB8888: 84 default: 85 format |= LDBBSIFR_SWPL; 86 break; 87 } 88 89 switch (splane->format->fourcc) { 90 case DRM_FORMAT_RGB565: 91 format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB16; 92 break; 93 case DRM_FORMAT_RGB888: 94 format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDBBSIFR_RPKF_RGB24; 95 break; 96 case DRM_FORMAT_ARGB8888: 97 format |= LDBBSIFR_AL_PK | LDBBSIFR_RY | LDDFR_PKF_ARGB32; 98 break; 99 case DRM_FORMAT_XRGB8888: 100 format |= LDBBSIFR_AL_1 | LDBBSIFR_RY | LDDFR_PKF_ARGB32; 101 break; 102 case DRM_FORMAT_NV12: 103 case DRM_FORMAT_NV21: 104 format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_420; 105 break; 106 case DRM_FORMAT_NV16: 107 case DRM_FORMAT_NV61: 108 format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_422; 109 break; 110 case DRM_FORMAT_NV24: 111 case DRM_FORMAT_NV42: 112 format |= LDBBSIFR_AL_1 | LDBBSIFR_CHRR_444; 113 break; 114 } 115 116 #define plane_reg_dump(sdev, splane, reg) \ 117 dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x 0x%08x\n", __func__, \ 118 splane->index, #reg, \ 119 lcdc_read(sdev, reg(splane->index)), \ 120 lcdc_read(sdev, reg(splane->index) + LCDC_SIDE_B_OFFSET)) 121 122 plane_reg_dump(sdev, splane, LDBnBSIFR); 123 plane_reg_dump(sdev, splane, LDBnBSSZR); 124 plane_reg_dump(sdev, splane, LDBnBLOCR); 125 plane_reg_dump(sdev, splane, LDBnBSMWR); 126 plane_reg_dump(sdev, splane, LDBnBSAYR); 127 plane_reg_dump(sdev, splane, LDBnBSACR); 128 129 lcdc_write(sdev, LDBCR, LDBCR_UPC(splane->index)); 130 dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x\n", __func__, splane->index, 131 "LDBCR", lcdc_read(sdev, LDBCR)); 132 133 lcdc_write(sdev, LDBnBSIFR(splane->index), format); 134 135 lcdc_write(sdev, LDBnBSSZR(splane->index), 136 (splane->crtc_h << LDBBSSZR_BVSS_SHIFT) | 137 (splane->crtc_w << LDBBSSZR_BHSS_SHIFT)); 138 lcdc_write(sdev, LDBnBLOCR(splane->index), 139 (splane->crtc_y << LDBBLOCR_CVLC_SHIFT) | 140 (splane->crtc_x << LDBBLOCR_CHLC_SHIFT)); 141 lcdc_write(sdev, LDBnBSMWR(splane->index), 142 fb->pitches[0] << LDBBSMWR_BSMW_SHIFT); 143 144 shmob_drm_plane_compute_base(splane, fb, splane->src_x, splane->src_y); 145 146 lcdc_write(sdev, LDBnBSAYR(splane->index), splane->dma[0]); 147 if (splane->format->yuv) 148 lcdc_write(sdev, LDBnBSACR(splane->index), splane->dma[1]); 149 150 lcdc_write(sdev, LDBCR, 151 LDBCR_UPF(splane->index) | LDBCR_UPD(splane->index)); 152 dev_dbg(sdev->ddev->dev, "%s(%u): %s 0x%08x\n", __func__, splane->index, 153 "LDBCR", lcdc_read(sdev, LDBCR)); 154 155 plane_reg_dump(sdev, splane, LDBnBSIFR); 156 plane_reg_dump(sdev, splane, LDBnBSSZR); 157 plane_reg_dump(sdev, splane, LDBnBLOCR); 158 plane_reg_dump(sdev, splane, LDBnBSMWR); 159 plane_reg_dump(sdev, splane, LDBnBSAYR); 160 plane_reg_dump(sdev, splane, LDBnBSACR); 161 } 162 163 void shmob_drm_plane_setup(struct drm_plane *plane) 164 { 165 struct shmob_drm_plane *splane = to_shmob_plane(plane); 166 167 if (plane->fb == NULL) 168 return; 169 170 __shmob_drm_plane_setup(splane, plane->fb); 171 } 172 173 static int 174 shmob_drm_plane_update(struct drm_plane *plane, struct drm_crtc *crtc, 175 struct drm_framebuffer *fb, int crtc_x, int crtc_y, 176 unsigned int crtc_w, unsigned int crtc_h, 177 uint32_t src_x, uint32_t src_y, 178 uint32_t src_w, uint32_t src_h, 179 struct drm_modeset_acquire_ctx *ctx) 180 { 181 struct shmob_drm_plane *splane = to_shmob_plane(plane); 182 struct shmob_drm_device *sdev = plane->dev->dev_private; 183 const struct shmob_drm_format_info *format; 184 185 format = shmob_drm_format_info(fb->format->format); 186 if (format == NULL) { 187 dev_dbg(sdev->dev, "update_plane: unsupported format %08x\n", 188 fb->format->format); 189 return -EINVAL; 190 } 191 192 if (src_w >> 16 != crtc_w || src_h >> 16 != crtc_h) { 193 dev_dbg(sdev->dev, "%s: scaling not supported\n", __func__); 194 return -EINVAL; 195 } 196 197 splane->format = format; 198 199 splane->src_x = src_x >> 16; 200 splane->src_y = src_y >> 16; 201 splane->crtc_x = crtc_x; 202 splane->crtc_y = crtc_y; 203 splane->crtc_w = crtc_w; 204 splane->crtc_h = crtc_h; 205 206 __shmob_drm_plane_setup(splane, fb); 207 return 0; 208 } 209 210 static int shmob_drm_plane_disable(struct drm_plane *plane, 211 struct drm_modeset_acquire_ctx *ctx) 212 { 213 struct shmob_drm_plane *splane = to_shmob_plane(plane); 214 struct shmob_drm_device *sdev = plane->dev->dev_private; 215 216 splane->format = NULL; 217 218 lcdc_write(sdev, LDBnBSIFR(splane->index), 0); 219 return 0; 220 } 221 222 static void shmob_drm_plane_destroy(struct drm_plane *plane) 223 { 224 drm_plane_force_disable(plane); 225 drm_plane_cleanup(plane); 226 } 227 228 static const struct drm_plane_funcs shmob_drm_plane_funcs = { 229 .update_plane = shmob_drm_plane_update, 230 .disable_plane = shmob_drm_plane_disable, 231 .destroy = shmob_drm_plane_destroy, 232 }; 233 234 static const uint32_t formats[] = { 235 DRM_FORMAT_RGB565, 236 DRM_FORMAT_RGB888, 237 DRM_FORMAT_ARGB8888, 238 DRM_FORMAT_XRGB8888, 239 DRM_FORMAT_NV12, 240 DRM_FORMAT_NV21, 241 DRM_FORMAT_NV16, 242 DRM_FORMAT_NV61, 243 DRM_FORMAT_NV24, 244 DRM_FORMAT_NV42, 245 }; 246 247 int shmob_drm_plane_create(struct shmob_drm_device *sdev, unsigned int index) 248 { 249 struct shmob_drm_plane *splane; 250 int ret; 251 252 splane = devm_kzalloc(sdev->dev, sizeof(*splane), GFP_KERNEL); 253 if (splane == NULL) 254 return -ENOMEM; 255 256 splane->index = index; 257 splane->alpha = 255; 258 259 ret = drm_universal_plane_init(sdev->ddev, &splane->plane, 1, 260 &shmob_drm_plane_funcs, 261 formats, ARRAY_SIZE(formats), NULL, 262 DRM_PLANE_TYPE_OVERLAY, NULL); 263 264 return ret; 265 } 266