xref: /linux/drivers/gpu/drm/radeon/trinity_smc.c (revision c4ee0af3fa0dc65f690fc908f02b8355f9576ea0)
1 /*
2  * Copyright 2012 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  */
23 
24 #include "drmP.h"
25 #include "radeon.h"
26 #include "trinityd.h"
27 #include "trinity_dpm.h"
28 #include "ppsmc.h"
29 
30 struct trinity_ps *trinity_get_ps(struct radeon_ps *rps);
31 struct trinity_power_info *trinity_get_pi(struct radeon_device *rdev);
32 
33 static int trinity_notify_message_to_smu(struct radeon_device *rdev, u32 id)
34 {
35 	int i;
36 	u32 v = 0;
37 
38 	WREG32(SMC_MESSAGE_0, id);
39 	for (i = 0; i < rdev->usec_timeout; i++) {
40 		if (RREG32(SMC_RESP_0) != 0)
41 			break;
42 		udelay(1);
43 	}
44 	v = RREG32(SMC_RESP_0);
45 
46 	if (v != 1) {
47 		if (v == 0xFF) {
48 			DRM_ERROR("SMC failed to handle the message!\n");
49 			return -EINVAL;
50 		} else if (v == 0xFE) {
51 			DRM_ERROR("Unknown SMC message!\n");
52 			return -EINVAL;
53 		}
54 	}
55 
56 	return 0;
57 }
58 
59 int trinity_dpm_bapm_enable(struct radeon_device *rdev, bool enable)
60 {
61 	if (enable)
62 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_EnableBAPM);
63 	else
64 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DisableBAPM);
65 }
66 
67 int trinity_dpm_config(struct radeon_device *rdev, bool enable)
68 {
69 	if (enable)
70 		WREG32_SMC(SMU_SCRATCH0, 1);
71 	else
72 		WREG32_SMC(SMU_SCRATCH0, 0);
73 
74 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_Config);
75 }
76 
77 int trinity_dpm_force_state(struct radeon_device *rdev, u32 n)
78 {
79 	WREG32_SMC(SMU_SCRATCH0, n);
80 
81 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_ForceState);
82 }
83 
84 int trinity_dpm_n_levels_disabled(struct radeon_device *rdev, u32 n)
85 {
86 	WREG32_SMC(SMU_SCRATCH0, n);
87 
88 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DPM_N_LevelsDisabled);
89 }
90 
91 int trinity_uvd_dpm_config(struct radeon_device *rdev)
92 {
93 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_UVD_DPM_Config);
94 }
95 
96 int trinity_dpm_no_forced_level(struct radeon_device *rdev)
97 {
98 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel);
99 }
100 
101 int trinity_dce_enable_voltage_adjustment(struct radeon_device *rdev,
102 					  bool enable)
103 {
104 	if (enable)
105 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DCE_AllowVoltageAdjustment);
106 	else
107 		return trinity_notify_message_to_smu(rdev, PPSMC_MSG_DCE_RemoveVoltageAdjustment);
108 }
109 
110 int trinity_gfx_dynamic_mgpg_config(struct radeon_device *rdev)
111 {
112 	return trinity_notify_message_to_smu(rdev, PPSMC_MSG_PG_SIMD_Config);
113 }
114 
115 void trinity_acquire_mutex(struct radeon_device *rdev)
116 {
117 	int i;
118 
119 	WREG32(SMC_INT_REQ, 1);
120 	for (i = 0; i < rdev->usec_timeout; i++) {
121 		if ((RREG32(SMC_INT_REQ) & 0xffff) == 1)
122 			break;
123 		udelay(1);
124 	}
125 }
126 
127 void trinity_release_mutex(struct radeon_device *rdev)
128 {
129 	WREG32(SMC_INT_REQ, 0);
130 }
131