xref: /linux/drivers/gpu/drm/radeon/si_blit_shaders.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
148c0c902SAlex Deucher /*
248c0c902SAlex Deucher  * Copyright 2011 Advanced Micro Devices, Inc.
348c0c902SAlex Deucher  *
448c0c902SAlex Deucher  * Permission is hereby granted, free of charge, to any person obtaining a
548c0c902SAlex Deucher  * copy of this software and associated documentation files (the "Software"),
648c0c902SAlex Deucher  * to deal in the Software without restriction, including without limitation
748c0c902SAlex Deucher  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
848c0c902SAlex Deucher  * and/or sell copies of the Software, and to permit persons to whom the
948c0c902SAlex Deucher  * Software is furnished to do so, subject to the following conditions:
1048c0c902SAlex Deucher  *
1148c0c902SAlex Deucher  * The above copyright notice and this permission notice (including the next
1248c0c902SAlex Deucher  * paragraph) shall be included in all copies or substantial portions of the
1348c0c902SAlex Deucher  * Software.
1448c0c902SAlex Deucher  *
1548c0c902SAlex Deucher  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1648c0c902SAlex Deucher  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1748c0c902SAlex Deucher  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1848c0c902SAlex Deucher  * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
1948c0c902SAlex Deucher  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
2048c0c902SAlex Deucher  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
2148c0c902SAlex Deucher  * DEALINGS IN THE SOFTWARE.
2248c0c902SAlex Deucher  *
2348c0c902SAlex Deucher  */
2448c0c902SAlex Deucher 
2548c0c902SAlex Deucher #ifndef SI_BLIT_SHADERS_H
2648c0c902SAlex Deucher #define SI_BLIT_SHADERS_H
2748c0c902SAlex Deucher 
28*b0778bb0STom Rix static const u32 si_default_state[] = {
29*b0778bb0STom Rix 	0xc0066900,
30*b0778bb0STom Rix 	0x00000000,
31*b0778bb0STom Rix 	0x00000060, /* DB_RENDER_CONTROL */
32*b0778bb0STom Rix 	0x00000000, /* DB_COUNT_CONTROL */
33*b0778bb0STom Rix 	0x00000000, /* DB_DEPTH_VIEW */
34*b0778bb0STom Rix 	0x0000002a, /* DB_RENDER_OVERRIDE */
35*b0778bb0STom Rix 	0x00000000, /* DB_RENDER_OVERRIDE2 */
36*b0778bb0STom Rix 	0x00000000, /* DB_HTILE_DATA_BASE */
3748c0c902SAlex Deucher 
38*b0778bb0STom Rix 	0xc0046900,
39*b0778bb0STom Rix 	0x00000008,
40*b0778bb0STom Rix 	0x00000000, /* DB_DEPTH_BOUNDS_MIN */
41*b0778bb0STom Rix 	0x00000000, /* DB_DEPTH_BOUNDS_MAX */
42*b0778bb0STom Rix 	0x00000000, /* DB_STENCIL_CLEAR */
43*b0778bb0STom Rix 	0x00000000, /* DB_DEPTH_CLEAR */
44*b0778bb0STom Rix 
45*b0778bb0STom Rix 	0xc0036900,
46*b0778bb0STom Rix 	0x0000000f,
47*b0778bb0STom Rix 	0x00000000, /* DB_DEPTH_INFO */
48*b0778bb0STom Rix 	0x00000000, /* DB_Z_INFO */
49*b0778bb0STom Rix 	0x00000000, /* DB_STENCIL_INFO */
50*b0778bb0STom Rix 
51*b0778bb0STom Rix 	0xc0016900,
52*b0778bb0STom Rix 	0x00000080,
53*b0778bb0STom Rix 	0x00000000, /* PA_SC_WINDOW_OFFSET */
54*b0778bb0STom Rix 
55*b0778bb0STom Rix 	0xc00d6900,
56*b0778bb0STom Rix 	0x00000083,
57*b0778bb0STom Rix 	0x0000ffff, /* PA_SC_CLIPRECT_RULE */
58*b0778bb0STom Rix 	0x00000000, /* PA_SC_CLIPRECT_0_TL */
59*b0778bb0STom Rix 	0x20002000, /* PA_SC_CLIPRECT_0_BR */
60*b0778bb0STom Rix 	0x00000000,
61*b0778bb0STom Rix 	0x20002000,
62*b0778bb0STom Rix 	0x00000000,
63*b0778bb0STom Rix 	0x20002000,
64*b0778bb0STom Rix 	0x00000000,
65*b0778bb0STom Rix 	0x20002000,
66*b0778bb0STom Rix 	0xaaaaaaaa, /* PA_SC_EDGERULE */
67*b0778bb0STom Rix 	0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
68*b0778bb0STom Rix 	0x0000000f, /* CB_TARGET_MASK */
69*b0778bb0STom Rix 	0x0000000f, /* CB_SHADER_MASK */
70*b0778bb0STom Rix 
71*b0778bb0STom Rix 	0xc0226900,
72*b0778bb0STom Rix 	0x00000094,
73*b0778bb0STom Rix 	0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
74*b0778bb0STom Rix 	0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
75*b0778bb0STom Rix 	0x80000000,
76*b0778bb0STom Rix 	0x20002000,
77*b0778bb0STom Rix 	0x80000000,
78*b0778bb0STom Rix 	0x20002000,
79*b0778bb0STom Rix 	0x80000000,
80*b0778bb0STom Rix 	0x20002000,
81*b0778bb0STom Rix 	0x80000000,
82*b0778bb0STom Rix 	0x20002000,
83*b0778bb0STom Rix 	0x80000000,
84*b0778bb0STom Rix 	0x20002000,
85*b0778bb0STom Rix 	0x80000000,
86*b0778bb0STom Rix 	0x20002000,
87*b0778bb0STom Rix 	0x80000000,
88*b0778bb0STom Rix 	0x20002000,
89*b0778bb0STom Rix 	0x80000000,
90*b0778bb0STom Rix 	0x20002000,
91*b0778bb0STom Rix 	0x80000000,
92*b0778bb0STom Rix 	0x20002000,
93*b0778bb0STom Rix 	0x80000000,
94*b0778bb0STom Rix 	0x20002000,
95*b0778bb0STom Rix 	0x80000000,
96*b0778bb0STom Rix 	0x20002000,
97*b0778bb0STom Rix 	0x80000000,
98*b0778bb0STom Rix 	0x20002000,
99*b0778bb0STom Rix 	0x80000000,
100*b0778bb0STom Rix 	0x20002000,
101*b0778bb0STom Rix 	0x80000000,
102*b0778bb0STom Rix 	0x20002000,
103*b0778bb0STom Rix 	0x80000000,
104*b0778bb0STom Rix 	0x20002000,
105*b0778bb0STom Rix 	0x00000000, /* PA_SC_VPORT_ZMIN_0 */
106*b0778bb0STom Rix 	0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
107*b0778bb0STom Rix 
108*b0778bb0STom Rix 	0xc0026900,
109*b0778bb0STom Rix 	0x000000d9,
110*b0778bb0STom Rix 	0x00000000, /* CP_RINGID */
111*b0778bb0STom Rix 	0x00000000, /* CP_VMID */
112*b0778bb0STom Rix 
113*b0778bb0STom Rix 	0xc0046900,
114*b0778bb0STom Rix 	0x00000100,
115*b0778bb0STom Rix 	0xffffffff, /* VGT_MAX_VTX_INDX */
116*b0778bb0STom Rix 	0x00000000, /* VGT_MIN_VTX_INDX */
117*b0778bb0STom Rix 	0x00000000, /* VGT_INDX_OFFSET */
118*b0778bb0STom Rix 	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
119*b0778bb0STom Rix 
120*b0778bb0STom Rix 	0xc0046900,
121*b0778bb0STom Rix 	0x00000105,
122*b0778bb0STom Rix 	0x00000000, /* CB_BLEND_RED */
123*b0778bb0STom Rix 	0x00000000, /* CB_BLEND_GREEN */
124*b0778bb0STom Rix 	0x00000000, /* CB_BLEND_BLUE */
125*b0778bb0STom Rix 	0x00000000, /* CB_BLEND_ALPHA */
126*b0778bb0STom Rix 
127*b0778bb0STom Rix 	0xc0016900,
128*b0778bb0STom Rix 	0x000001e0,
129*b0778bb0STom Rix 	0x00000000, /* CB_BLEND0_CONTROL */
130*b0778bb0STom Rix 
131*b0778bb0STom Rix 	0xc00e6900,
132*b0778bb0STom Rix 	0x00000200,
133*b0778bb0STom Rix 	0x00000000, /* DB_DEPTH_CONTROL */
134*b0778bb0STom Rix 	0x00000000, /* DB_EQAA */
135*b0778bb0STom Rix 	0x00cc0010, /* CB_COLOR_CONTROL */
136*b0778bb0STom Rix 	0x00000210, /* DB_SHADER_CONTROL */
137*b0778bb0STom Rix 	0x00010000, /* PA_CL_CLIP_CNTL */
138*b0778bb0STom Rix 	0x00000004, /* PA_SU_SC_MODE_CNTL */
139*b0778bb0STom Rix 	0x00000100, /* PA_CL_VTE_CNTL */
140*b0778bb0STom Rix 	0x00000000, /* PA_CL_VS_OUT_CNTL */
141*b0778bb0STom Rix 	0x00000000, /* PA_CL_NANINF_CNTL */
142*b0778bb0STom Rix 	0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
143*b0778bb0STom Rix 	0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
144*b0778bb0STom Rix 	0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
145*b0778bb0STom Rix 	0x00000000, /*  */
146*b0778bb0STom Rix 	0x00000000, /*  */
147*b0778bb0STom Rix 
148*b0778bb0STom Rix 	0xc0116900,
149*b0778bb0STom Rix 	0x00000280,
150*b0778bb0STom Rix 	0x00000000, /* PA_SU_POINT_SIZE */
151*b0778bb0STom Rix 	0x00000000, /* PA_SU_POINT_MINMAX */
152*b0778bb0STom Rix 	0x00000008, /* PA_SU_LINE_CNTL */
153*b0778bb0STom Rix 	0x00000000, /* PA_SC_LINE_STIPPLE */
154*b0778bb0STom Rix 	0x00000000, /* VGT_OUTPUT_PATH_CNTL */
155*b0778bb0STom Rix 	0x00000000, /* VGT_HOS_CNTL */
156*b0778bb0STom Rix 	0x00000000,
157*b0778bb0STom Rix 	0x00000000,
158*b0778bb0STom Rix 	0x00000000,
159*b0778bb0STom Rix 	0x00000000,
160*b0778bb0STom Rix 	0x00000000,
161*b0778bb0STom Rix 	0x00000000,
162*b0778bb0STom Rix 	0x00000000,
163*b0778bb0STom Rix 	0x00000000,
164*b0778bb0STom Rix 	0x00000000,
165*b0778bb0STom Rix 	0x00000000,
166*b0778bb0STom Rix 	0x00000000, /* VGT_GS_MODE */
167*b0778bb0STom Rix 
168*b0778bb0STom Rix 	0xc0026900,
169*b0778bb0STom Rix 	0x00000292,
170*b0778bb0STom Rix 	0x00000000, /* PA_SC_MODE_CNTL_0 */
171*b0778bb0STom Rix 	0x00000000, /* PA_SC_MODE_CNTL_1 */
172*b0778bb0STom Rix 
173*b0778bb0STom Rix 	0xc0016900,
174*b0778bb0STom Rix 	0x000002a1,
175*b0778bb0STom Rix 	0x00000000, /* VGT_PRIMITIVEID_EN */
176*b0778bb0STom Rix 
177*b0778bb0STom Rix 	0xc0016900,
178*b0778bb0STom Rix 	0x000002a5,
179*b0778bb0STom Rix 	0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
180*b0778bb0STom Rix 
181*b0778bb0STom Rix 	0xc0026900,
182*b0778bb0STom Rix 	0x000002a8,
183*b0778bb0STom Rix 	0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
184*b0778bb0STom Rix 	0x00000000,
185*b0778bb0STom Rix 
186*b0778bb0STom Rix 	0xc0026900,
187*b0778bb0STom Rix 	0x000002ad,
188*b0778bb0STom Rix 	0x00000000, /* VGT_REUSE_OFF */
189*b0778bb0STom Rix 	0x00000000,
190*b0778bb0STom Rix 
191*b0778bb0STom Rix 	0xc0016900,
192*b0778bb0STom Rix 	0x000002d5,
193*b0778bb0STom Rix 	0x00000000, /* VGT_SHADER_STAGES_EN */
194*b0778bb0STom Rix 
195*b0778bb0STom Rix 	0xc0016900,
196*b0778bb0STom Rix 	0x000002dc,
197*b0778bb0STom Rix 	0x0000aa00, /* DB_ALPHA_TO_MASK */
198*b0778bb0STom Rix 
199*b0778bb0STom Rix 	0xc0066900,
200*b0778bb0STom Rix 	0x000002de,
201*b0778bb0STom Rix 	0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
202*b0778bb0STom Rix 	0x00000000,
203*b0778bb0STom Rix 	0x00000000,
204*b0778bb0STom Rix 	0x00000000,
205*b0778bb0STom Rix 	0x00000000,
206*b0778bb0STom Rix 	0x00000000,
207*b0778bb0STom Rix 
208*b0778bb0STom Rix 	0xc0026900,
209*b0778bb0STom Rix 	0x000002e5,
210*b0778bb0STom Rix 	0x00000000, /* VGT_STRMOUT_CONFIG */
211*b0778bb0STom Rix 	0x00000000,
212*b0778bb0STom Rix 
213*b0778bb0STom Rix 	0xc01b6900,
214*b0778bb0STom Rix 	0x000002f5,
215*b0778bb0STom Rix 	0x76543210, /* PA_SC_CENTROID_PRIORITY_0 */
216*b0778bb0STom Rix 	0xfedcba98, /* PA_SC_CENTROID_PRIORITY_1 */
217*b0778bb0STom Rix 	0x00000000, /* PA_SC_LINE_CNTL */
218*b0778bb0STom Rix 	0x00000000, /* PA_SC_AA_CONFIG */
219*b0778bb0STom Rix 	0x00000005, /* PA_SU_VTX_CNTL */
220*b0778bb0STom Rix 	0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
221*b0778bb0STom Rix 	0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
222*b0778bb0STom Rix 	0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
223*b0778bb0STom Rix 	0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
224*b0778bb0STom Rix 	0x00000000, /* PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 */
225*b0778bb0STom Rix 	0x00000000,
226*b0778bb0STom Rix 	0x00000000,
227*b0778bb0STom Rix 	0x00000000,
228*b0778bb0STom Rix 	0x00000000,
229*b0778bb0STom Rix 	0x00000000,
230*b0778bb0STom Rix 	0x00000000,
231*b0778bb0STom Rix 	0x00000000,
232*b0778bb0STom Rix 	0x00000000,
233*b0778bb0STom Rix 	0x00000000,
234*b0778bb0STom Rix 	0x00000000,
235*b0778bb0STom Rix 	0x00000000,
236*b0778bb0STom Rix 	0x00000000,
237*b0778bb0STom Rix 	0x00000000,
238*b0778bb0STom Rix 	0x00000000,
239*b0778bb0STom Rix 	0x00000000,
240*b0778bb0STom Rix 	0xffffffff, /* PA_SC_AA_MASK_X0Y0_X1Y0 */
241*b0778bb0STom Rix 	0xffffffff,
242*b0778bb0STom Rix 
243*b0778bb0STom Rix 	0xc0026900,
244*b0778bb0STom Rix 	0x00000316,
245*b0778bb0STom Rix 	0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
246*b0778bb0STom Rix 	0x00000010, /*  */
247*b0778bb0STom Rix };
248*b0778bb0STom Rix 
249*b0778bb0STom Rix static const u32 si_default_size = ARRAY_SIZE(si_default_state);
25048c0c902SAlex Deucher 
25148c0c902SAlex Deucher #endif
252