1 /* 2 * Copyright 2011 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 #ifndef __RV770_SMC_H__ 24 #define __RV770_SMC_H__ 25 26 #include "ppsmc.h" 27 28 #pragma pack(push, 1) 29 30 #define RV770_SMC_TABLE_ADDRESS 0xB000 31 32 #define RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE 3 33 34 struct RV770_SMC_SCLK_VALUE { 35 uint32_t vCG_SPLL_FUNC_CNTL; 36 uint32_t vCG_SPLL_FUNC_CNTL_2; 37 uint32_t vCG_SPLL_FUNC_CNTL_3; 38 uint32_t vCG_SPLL_SPREAD_SPECTRUM; 39 uint32_t vCG_SPLL_SPREAD_SPECTRUM_2; 40 uint32_t sclk_value; 41 }; 42 43 typedef struct RV770_SMC_SCLK_VALUE RV770_SMC_SCLK_VALUE; 44 45 struct RV770_SMC_MCLK_VALUE { 46 uint32_t vMPLL_AD_FUNC_CNTL; 47 uint32_t vMPLL_AD_FUNC_CNTL_2; 48 uint32_t vMPLL_DQ_FUNC_CNTL; 49 uint32_t vMPLL_DQ_FUNC_CNTL_2; 50 uint32_t vMCLK_PWRMGT_CNTL; 51 uint32_t vDLL_CNTL; 52 uint32_t vMPLL_SS; 53 uint32_t vMPLL_SS2; 54 uint32_t mclk_value; 55 }; 56 57 typedef struct RV770_SMC_MCLK_VALUE RV770_SMC_MCLK_VALUE; 58 59 60 struct RV730_SMC_MCLK_VALUE { 61 uint32_t vMCLK_PWRMGT_CNTL; 62 uint32_t vDLL_CNTL; 63 uint32_t vMPLL_FUNC_CNTL; 64 uint32_t vMPLL_FUNC_CNTL2; 65 uint32_t vMPLL_FUNC_CNTL3; 66 uint32_t vMPLL_SS; 67 uint32_t vMPLL_SS2; 68 uint32_t mclk_value; 69 }; 70 71 typedef struct RV730_SMC_MCLK_VALUE RV730_SMC_MCLK_VALUE; 72 73 struct RV770_SMC_VOLTAGE_VALUE { 74 uint16_t value; 75 uint8_t index; 76 uint8_t padding; 77 }; 78 79 typedef struct RV770_SMC_VOLTAGE_VALUE RV770_SMC_VOLTAGE_VALUE; 80 81 union RV7XX_SMC_MCLK_VALUE { 82 RV770_SMC_MCLK_VALUE mclk770; 83 RV730_SMC_MCLK_VALUE mclk730; 84 }; 85 86 typedef union RV7XX_SMC_MCLK_VALUE RV7XX_SMC_MCLK_VALUE, *LPRV7XX_SMC_MCLK_VALUE; 87 88 struct RV770_SMC_HW_PERFORMANCE_LEVEL { 89 uint8_t arbValue; 90 union{ 91 uint8_t seqValue; 92 uint8_t ACIndex; 93 }; 94 uint8_t displayWatermark; 95 uint8_t gen2PCIE; 96 uint8_t gen2XSP; 97 uint8_t backbias; 98 uint8_t strobeMode; 99 uint8_t mcFlags; 100 uint32_t aT; 101 uint32_t bSP; 102 RV770_SMC_SCLK_VALUE sclk; 103 RV7XX_SMC_MCLK_VALUE mclk; 104 RV770_SMC_VOLTAGE_VALUE vddc; 105 RV770_SMC_VOLTAGE_VALUE mvdd; 106 RV770_SMC_VOLTAGE_VALUE vddci; 107 uint8_t reserved1; 108 uint8_t reserved2; 109 uint8_t stateFlags; 110 uint8_t padding; 111 }; 112 113 #define SMC_STROBE_RATIO 0x0F 114 #define SMC_STROBE_ENABLE 0x10 115 116 #define SMC_MC_EDC_RD_FLAG 0x01 117 #define SMC_MC_EDC_WR_FLAG 0x02 118 #define SMC_MC_RTT_ENABLE 0x04 119 #define SMC_MC_STUTTER_EN 0x08 120 121 typedef struct RV770_SMC_HW_PERFORMANCE_LEVEL RV770_SMC_HW_PERFORMANCE_LEVEL; 122 123 struct RV770_SMC_SWSTATE { 124 uint8_t flags; 125 uint8_t padding1; 126 uint8_t padding2; 127 uint8_t padding3; 128 RV770_SMC_HW_PERFORMANCE_LEVEL levels[RV770_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; 129 }; 130 131 typedef struct RV770_SMC_SWSTATE RV770_SMC_SWSTATE; 132 133 #define RV770_SMC_VOLTAGEMASK_VDDC 0 134 #define RV770_SMC_VOLTAGEMASK_MVDD 1 135 #define RV770_SMC_VOLTAGEMASK_VDDCI 2 136 #define RV770_SMC_VOLTAGEMASK_MAX 4 137 138 struct RV770_SMC_VOLTAGEMASKTABLE { 139 uint8_t highMask[RV770_SMC_VOLTAGEMASK_MAX]; 140 uint32_t lowMask[RV770_SMC_VOLTAGEMASK_MAX]; 141 }; 142 143 typedef struct RV770_SMC_VOLTAGEMASKTABLE RV770_SMC_VOLTAGEMASKTABLE; 144 145 #define MAX_NO_VREG_STEPS 32 146 147 struct RV770_SMC_STATETABLE { 148 uint8_t thermalProtectType; 149 uint8_t systemFlags; 150 uint8_t maxVDDCIndexInPPTable; 151 uint8_t extraFlags; 152 uint8_t highSMIO[MAX_NO_VREG_STEPS]; 153 uint32_t lowSMIO[MAX_NO_VREG_STEPS]; 154 RV770_SMC_VOLTAGEMASKTABLE voltageMaskTable; 155 RV770_SMC_SWSTATE initialState; 156 RV770_SMC_SWSTATE ACPIState; 157 RV770_SMC_SWSTATE driverState; 158 RV770_SMC_SWSTATE ULVState; 159 }; 160 161 typedef struct RV770_SMC_STATETABLE RV770_SMC_STATETABLE; 162 163 #define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01 164 165 #pragma pack(pop) 166 167 #define RV770_SMC_SOFT_REGISTERS_START 0x104 168 169 #define RV770_SMC_SOFT_REGISTER_mclk_chg_timeout 0x0 170 #define RV770_SMC_SOFT_REGISTER_baby_step_timer 0x8 171 #define RV770_SMC_SOFT_REGISTER_delay_bbias 0xC 172 #define RV770_SMC_SOFT_REGISTER_delay_vreg 0x10 173 #define RV770_SMC_SOFT_REGISTER_delay_acpi 0x2C 174 #define RV770_SMC_SOFT_REGISTER_seq_index 0x64 175 #define RV770_SMC_SOFT_REGISTER_mvdd_chg_time 0x68 176 #define RV770_SMC_SOFT_REGISTER_mclk_switch_lim 0x78 177 #define RV770_SMC_SOFT_REGISTER_mc_block_delay 0x90 178 #define RV770_SMC_SOFT_REGISTER_uvd_enabled 0x9C 179 #define RV770_SMC_SOFT_REGISTER_is_asic_lombok 0xA0 180 181 int rv770_copy_bytes_to_smc(struct radeon_device *rdev, 182 u16 smc_start_address, const u8 *src, 183 u16 byte_count, u16 limit); 184 void rv770_start_smc(struct radeon_device *rdev); 185 void rv770_reset_smc(struct radeon_device *rdev); 186 void rv770_stop_smc_clock(struct radeon_device *rdev); 187 void rv770_start_smc_clock(struct radeon_device *rdev); 188 bool rv770_is_smc_running(struct radeon_device *rdev); 189 PPSMC_Result rv770_send_msg_to_smc(struct radeon_device *rdev, PPSMC_Msg msg); 190 PPSMC_Result rv770_wait_for_smc_inactive(struct radeon_device *rdev); 191 int rv770_read_smc_sram_dword(struct radeon_device *rdev, 192 u16 smc_address, u32 *value, u16 limit); 193 int rv770_write_smc_sram_dword(struct radeon_device *rdev, 194 u16 smc_address, u32 value, u16 limit); 195 int rv770_load_smc_ucode(struct radeon_device *rdev, 196 u16 limit); 197 198 #endif 199